2 * Copyright (C) 2008-2012 ST-Ericsson
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/platform_device.h>
15 #include <linux/clk.h>
17 #include <linux/platform_data/db8500_thermal.h>
18 #include <linux/amba/bus.h>
19 #include <linux/amba/pl022.h>
20 #include <linux/amba/serial.h>
21 #include <linux/mfd/abx500/ab8500.h>
22 #include <linux/regulator/ab8500.h>
23 #include <linux/regulator/fixed.h>
24 #include <linux/regulator/driver.h>
25 #include <linux/mfd/tps6105x.h>
26 #include <linux/platform_data/leds-lp55xx.h>
27 #include <linux/input.h>
28 #include <linux/delay.h>
29 #include <linux/leds.h>
30 #include <linux/pinctrl/consumer.h>
31 #include <linux/platform_data/pinctrl-nomadik.h>
32 #include <linux/platform_data/dma-ste-dma40.h>
34 #include <asm/mach-types.h>
40 #include "ste-dma40-db8500.h"
41 #include "db8500-regs.h"
42 #include "devices-db8500.h"
43 #include "board-mop500.h"
44 #include "board-mop500-regulators.h"
46 struct ab8500_platform_data ab8500_platdata = {
47 .irq_base = MOP500_AB8500_IRQ_BASE,
48 .regulator = &ab8500_regulator_plat_data,
51 #ifdef CONFIG_STE_DMA40
52 static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
53 .mode = STEDMA40_MODE_LOGICAL,
54 .dir = DMA_DEV_TO_MEM,
55 .dev_type = DB8500_DMA_DEV8_SSP0,
58 static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
59 .mode = STEDMA40_MODE_LOGICAL,
60 .dir = DMA_MEM_TO_DEV,
61 .dev_type = DB8500_DMA_DEV8_SSP0,
65 struct pl022_ssp_controller ssp0_plat = {
67 #ifdef CONFIG_STE_DMA40
69 .dma_filter = stedma40_filter,
70 .dma_rx_param = &ssp0_dma_cfg_rx,
71 .dma_tx_param = &ssp0_dma_cfg_tx,
75 /* on this platform, gpio 31,142,144,214 &
76 * 224 are connected as chip selects
81 #ifdef CONFIG_STE_DMA40
82 static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
83 .mode = STEDMA40_MODE_LOGICAL,
84 .dir = DMA_DEV_TO_MEM,
85 .dev_type = DB8500_DMA_DEV13_UART0,
88 static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
89 .mode = STEDMA40_MODE_LOGICAL,
90 .dir = DMA_MEM_TO_DEV,
91 .dev_type = DB8500_DMA_DEV13_UART0,
94 static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
95 .mode = STEDMA40_MODE_LOGICAL,
96 .dir = DMA_DEV_TO_MEM,
97 .dev_type = DB8500_DMA_DEV12_UART1,
100 static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
101 .mode = STEDMA40_MODE_LOGICAL,
102 .dir = DMA_MEM_TO_DEV,
103 .dev_type = DB8500_DMA_DEV12_UART1,
106 static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
107 .mode = STEDMA40_MODE_LOGICAL,
108 .dir = DMA_DEV_TO_MEM,
109 .dev_type = DB8500_DMA_DEV11_UART2,
112 static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
113 .mode = STEDMA40_MODE_LOGICAL,
114 .dir = DMA_MEM_TO_DEV,
115 .dev_type = DB8500_DMA_DEV11_UART2,
119 struct amba_pl011_data uart0_plat = {
120 #ifdef CONFIG_STE_DMA40
121 .dma_filter = stedma40_filter,
122 .dma_rx_param = &uart0_dma_cfg_rx,
123 .dma_tx_param = &uart0_dma_cfg_tx,
127 struct amba_pl011_data uart1_plat = {
128 #ifdef CONFIG_STE_DMA40
129 .dma_filter = stedma40_filter,
130 .dma_rx_param = &uart1_dma_cfg_rx,
131 .dma_tx_param = &uart1_dma_cfg_tx,
135 struct amba_pl011_data uart2_plat = {
136 #ifdef CONFIG_STE_DMA40
137 .dma_filter = stedma40_filter,
138 .dma_rx_param = &uart2_dma_cfg_rx,
139 .dma_tx_param = &uart2_dma_cfg_tx,
143 static void __init mop500_uart_init(struct device *parent)
145 db8500_add_uart0(parent, &uart0_plat);
146 db8500_add_uart1(parent, &uart1_plat);
147 db8500_add_uart2(parent, &uart2_plat);
150 static void __init mop500_init_machine(void)
152 struct device *parent = NULL;
154 platform_device_register(&db8500_prcmu_device);
156 parent = u8500_init_devices();
158 mop500_uart_init(parent);
160 /* This board has full regulator constraints */
161 regulator_has_full_constraints();
165 static void __init snowball_init_machine(void)
167 struct device *parent = NULL;
169 platform_device_register(&db8500_prcmu_device);
171 parent = u8500_init_devices();
173 mop500_uart_init(parent);
175 /* This board has full regulator constraints */
176 regulator_has_full_constraints();
179 static void __init hrefv60_init_machine(void)
181 struct device *parent = NULL;
183 platform_device_register(&db8500_prcmu_device);
185 parent = u8500_init_devices();
187 mop500_uart_init(parent);
189 /* This board has full regulator constraints */
190 regulator_has_full_constraints();
193 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
194 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
195 .atag_offset = 0x100,
196 .smp = smp_ops(ux500_smp_ops),
197 .map_io = u8500_map_io,
198 .init_irq = ux500_init_irq,
199 /* we re-use nomadik timer here */
200 .init_time = ux500_timer_init,
201 .init_machine = mop500_init_machine,
202 .init_late = ux500_init_late,
203 .restart = ux500_restart,
206 MACHINE_START(U8520, "ST-Ericsson U8520 Platform HREFP520")
207 .atag_offset = 0x100,
208 .map_io = u8500_map_io,
209 .init_irq = ux500_init_irq,
210 .init_time = ux500_timer_init,
211 .init_machine = mop500_init_machine,
212 .init_late = ux500_init_late,
213 .restart = ux500_restart,
216 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
217 .atag_offset = 0x100,
218 .smp = smp_ops(ux500_smp_ops),
219 .map_io = u8500_map_io,
220 .init_irq = ux500_init_irq,
221 .init_time = ux500_timer_init,
222 .init_machine = hrefv60_init_machine,
223 .init_late = ux500_init_late,
224 .restart = ux500_restart,
227 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
228 .atag_offset = 0x100,
229 .smp = smp_ops(ux500_smp_ops),
230 .map_io = u8500_map_io,
231 .init_irq = ux500_init_irq,
232 /* we re-use nomadik timer here */
233 .init_time = ux500_timer_init,
234 .init_machine = snowball_init_machine,
236 .restart = ux500_restart,