2 * arch/arm/mach-tegra/include/mach/debug-macro.S
4 * Copyright (C) 2010,2011 Google, Inc.
5 * Copyright (C) 2011-2012 NVIDIA CORPORATION. All Rights Reserved.
8 * Colin Cross <ccross@google.com>
9 * Erik Gilling <konkers@google.com>
10 * Doug Anderson <dianders@chromium.org>
11 * Stephen Warren <swarren@nvidia.com>
13 * Portions based on mach-omap2's debug-macro.S
14 * Copyright (C) 1994-1999 Russell King
16 * This software is licensed under the terms of the GNU General Public
17 * License version 2, as published by the Free Software Foundation, and
18 * may be copied, distributed, and modified under those terms.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
27 #include <linux/serial_reg.h>
30 #include <mach/iomap.h>
31 #include <mach/irammap.h>
33 .macro addruart, rp, rv, tmp
34 adr \rp, 99f @ actual addr of 99f
35 ldr \rv, [\rp] @ linked addr is stored there
36 sub \rv, \rv, \rp @ offset between the two
37 ldr \rp, [\rp, #4] @ linked tegra_uart_config
38 sub \tmp, \rp, \rv @ actual tegra_uart_config
39 ldr \rp, [\tmp] @ Load tegra_uart_config
40 cmp \rp, #1 @ needs intitialization?
41 bne 100f @ no; go load the addresses
42 mov \rv, #0 @ yes; record init is done
44 mov \rp, #TEGRA_IRAM_BASE @ See if cookie is in IRAM
45 ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET]
46 movw \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE & 0xffff
47 movt \rp, #TEGRA_IRAM_DEBUG_UART_COOKIE >> 16
48 cmp \rv, \rp @ Cookie present?
49 bne 100f @ No, use default UART
50 mov \rp, #TEGRA_IRAM_BASE @ Load UART address from IRAM
51 ldr \rv, [\rp, #TEGRA_IRAM_DEBUG_UART_OFFSET + 4]
52 str \rv, [\tmp, #4] @ Store in tegra_uart_phys
53 sub \rv, \rv, #IO_APB_PHYS @ Calculate virt address
54 add \rv, \rv, #IO_APB_VIRT
55 str \rv, [\tmp, #8] @ Store in tegra_uart_virt
60 .word tegra_uart_config
63 100: ldr \rp, [\tmp, #4] @ Load tegra_uart_phys
64 ldr \rv, [\tmp, #8] @ Load tegra_uart_virt
70 * Code below is swiped from <asm/hardware/debug-8250.S>, but add an extra
71 * check to make sure that we aren't in the CONFIG_TEGRA_DEBUG_UART_NONE case.
72 * We use the fact that all 5 valid UART addresses all have something in the
76 .macro senduart, rd, rx
78 strneb \rd, [\rx, #UART_TX << UART_SHIFT]
82 .macro busyuart, rd, rx
85 1001: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT]
86 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
87 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
92 .macro waituart, rd, rx
96 1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT]
97 tst \rd, #UART_MSR_CTS