Pileus Git - ~andy/linux/blob - arch/arm/mach-tegra/board-seaboard-pinmux.c

   1 /*
   2  * Copyright (C) 2010-2012 NVIDIA Corporation
   3  * Copyright (C) 2011 Google, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #include <linux/kernel.h>
  17
  18 #include "board-seaboard.h"
  19 #include "board-pinmux.h"
  20
  21 static unsigned long seaboard_pincfg_drive_sdio1[] = {
  22         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, 0),
  23         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SCHMITT, 0),
  24         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_LOW_POWER_MODE, 3),
  25         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, 31),
  26         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, 31),
  27         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, 3),
  28         TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, 3),
  29 };
  30
  31 static struct pinctrl_map common_map[] = {
  32         TEGRA_MAP_MUXCONF("ata",   "ide",           none, driven),
  33         TEGRA_MAP_MUXCONF("atb",   "sdio4",         none, driven),
  34         TEGRA_MAP_MUXCONF("atc",   "nand",          none, driven),
  35         TEGRA_MAP_MUXCONF("atd",   "gmi",           none, driven),
  36         TEGRA_MAP_MUXCONF("ate",   "gmi",           none, tristate),
  37         TEGRA_MAP_MUXCONF("cdev1", "plla_out",      none, driven),
  38         TEGRA_MAP_MUXCONF("cdev2", "pllp_out4",     none, driven),
  39         TEGRA_MAP_MUXCONF("crtp",  "crt",           up,   tristate),
  40         TEGRA_MAP_MUXCONF("csus",  "vi_sensor_clk", none, tristate),
  41         TEGRA_MAP_MUXCONF("dap1",  "dap1",          none, driven),
  42         TEGRA_MAP_MUXCONF("dap2",  "dap2",          none, driven),
  43         TEGRA_MAP_MUXCONF("dap3",  "dap3",          none, tristate),
  44         TEGRA_MAP_MUXCONF("dap4",  "dap4",          none, driven),
  45         TEGRA_MAP_MUXCONF("dta",   "vi",            down, driven),
  46         TEGRA_MAP_MUXCONF("dtb",   "vi",            down, driven),
  47         TEGRA_MAP_MUXCONF("dtc",   "vi",            down, driven),
  48         TEGRA_MAP_MUXCONF("dtd",   "vi",            down, driven),
  49         TEGRA_MAP_MUXCONF("dte",   "vi",            down, tristate),
  50         TEGRA_MAP_MUXCONF("dtf",   "i2c3",          none, driven),
  51         TEGRA_MAP_MUXCONF("gma",   "sdio4",         none, driven),
  52         TEGRA_MAP_MUXCONF("gmb",   "gmi",           up,   tristate),
  53         TEGRA_MAP_MUXCONF("gmc",   "uartd",         none, driven),
  54         TEGRA_MAP_MUXCONF("gme",   "sdio4",         none, driven),
  55         TEGRA_MAP_MUXCONF("gpu",   "pwm",           none, driven),
  56         TEGRA_MAP_MUXCONF("gpu7",  "rtck",          none, driven),
  57         TEGRA_MAP_MUXCONF("gpv",   "pcie",          none, tristate),
  58         TEGRA_MAP_MUXCONF("hdint", "hdmi",          na,   tristate),
  59         TEGRA_MAP_MUXCONF("i2cp",  "i2cp",          none, driven),
  60         TEGRA_MAP_MUXCONF("irrx",  "uartb",         none, driven),
  61         TEGRA_MAP_MUXCONF("irtx",  "uartb",         none, driven),
  62         TEGRA_MAP_MUXCONF("kbca",  "kbc",           up,   driven),
  63         TEGRA_MAP_MUXCONF("kbcb",  "kbc",           up,   driven),
  64         TEGRA_MAP_MUXCONF("kbcc",  "kbc",           up,   driven),
  65         TEGRA_MAP_MUXCONF("kbcd",  "kbc",           up,   driven),
  66         TEGRA_MAP_MUXCONF("kbce",  "kbc",           up,   driven),
  67         TEGRA_MAP_MUXCONF("kbcf",  "kbc",           up,   driven),
  68         TEGRA_MAP_MUXCONF("lcsn",  "rsvd4",         na,   tristate),
  69         TEGRA_MAP_MUXCONF("ld0",   "displaya",      na,   driven),
  70         TEGRA_MAP_MUXCONF("ld1",   "displaya",      na,   driven),
  71         TEGRA_MAP_MUXCONF("ld10",  "displaya",      na,   driven),
  72         TEGRA_MAP_MUXCONF("ld11",  "displaya",      na,   driven),
  73         TEGRA_MAP_MUXCONF("ld12",  "displaya",      na,   driven),
  74         TEGRA_MAP_MUXCONF("ld13",  "displaya",      na,   driven),
  75         TEGRA_MAP_MUXCONF("ld14",  "displaya",      na,   driven),
  76         TEGRA_MAP_MUXCONF("ld15",  "displaya",      na,   driven),
  77         TEGRA_MAP_MUXCONF("ld16",  "displaya",      na,   driven),
  78         TEGRA_MAP_MUXCONF("ld17",  "displaya",      na,   driven),
  79         TEGRA_MAP_MUXCONF("ld2",   "displaya",      na,   driven),
  80         TEGRA_MAP_MUXCONF("ld3",   "displaya",      na,   driven),
  81         TEGRA_MAP_MUXCONF("ld4",   "displaya",      na,   driven),
  82         TEGRA_MAP_MUXCONF("ld5",   "displaya",      na,   driven),
  83         TEGRA_MAP_MUXCONF("ld6",   "displaya",      na,   driven),
  84         TEGRA_MAP_MUXCONF("ld7",   "displaya",      na,   driven),
  85         TEGRA_MAP_MUXCONF("ld8",   "displaya",      na,   driven),
  86         TEGRA_MAP_MUXCONF("ld9",   "displaya",      na,   driven),
  87         TEGRA_MAP_MUXCONF("ldc",   "rsvd4",         na,   tristate),
  88         TEGRA_MAP_MUXCONF("ldi",   "displaya",      na,   driven),
  89         TEGRA_MAP_MUXCONF("lhp0",  "displaya",      na,   driven),
  90         TEGRA_MAP_MUXCONF("lhp1",  "displaya",      na,   driven),
  91         TEGRA_MAP_MUXCONF("lhp2",  "displaya",      na,   driven),
  92         TEGRA_MAP_MUXCONF("lhs",   "displaya",      na,   driven),
  93         TEGRA_MAP_MUXCONF("lm0",   "rsvd4",         na,   driven),
  94         TEGRA_MAP_MUXCONF("lm1",   "crt",           na,   tristate),
  95         TEGRA_MAP_MUXCONF("lpp",   "displaya",      na,   driven),
  96         TEGRA_MAP_MUXCONF("lpw1",  "rsvd4",         na,   tristate),
  97         TEGRA_MAP_MUXCONF("lsc0",  "displaya",      na,   driven),
  98         TEGRA_MAP_MUXCONF("lsdi",  "rsvd4",         na,   tristate),
  99         TEGRA_MAP_MUXCONF("lspi",  "displaya",      na,   driven),
 100         TEGRA_MAP_MUXCONF("lvp0",  "rsvd4",         na,   tristate),
 101         TEGRA_MAP_MUXCONF("lvp1",  "displaya",      na,   driven),
 102         TEGRA_MAP_MUXCONF("lvs",   "displaya",      na,   driven),
 103         TEGRA_MAP_MUXCONF("owc",   "rsvd2",         none, tristate),
 104         TEGRA_MAP_MUXCONF("pmc",   "pwr_on",        na,   driven),
 105         TEGRA_MAP_MUXCONF("pta",   "hdmi",          none, driven),
 106         TEGRA_MAP_MUXCONF("rm",    "i2c1",          none, driven),
 107         TEGRA_MAP_MUXCONF("sdb",   "sdio3",         na,   driven),
 108         TEGRA_MAP_MUXCONF("sdc",   "sdio3",         none, driven),
 109         TEGRA_MAP_MUXCONF("sdd",   "sdio3",         none, driven),
 110         TEGRA_MAP_MUXCONF("sdio1", "sdio1",         up,   driven),
 111         TEGRA_MAP_MUXCONF("slxa",  "pcie",          up,   tristate),
 112         TEGRA_MAP_MUXCONF("slxd",  "spdif",         none, driven),
 113         TEGRA_MAP_MUXCONF("slxk",  "pcie",          none, driven),
 114         TEGRA_MAP_MUXCONF("spdi",  "rsvd2",         none, driven),
 115         TEGRA_MAP_MUXCONF("spdo",  "rsvd2",         none, driven),
 116         TEGRA_MAP_MUXCONF("spib",  "gmi",           none, tristate),
 117         TEGRA_MAP_MUXCONF("spid",  "spi1",          none, tristate),
 118         TEGRA_MAP_MUXCONF("spie",  "spi1",          none, tristate),
 119         TEGRA_MAP_MUXCONF("spif",  "spi1",          down, tristate),
 120         TEGRA_MAP_MUXCONF("spih",  "spi2_alt",      up,   tristate),
 121         TEGRA_MAP_MUXCONF("uaa",   "ulpi",          up,   driven),
 122         TEGRA_MAP_MUXCONF("uab",   "ulpi",          up,   driven),
 123         TEGRA_MAP_MUXCONF("uac",   "rsvd2",         none, driven),
 124         TEGRA_MAP_MUXCONF("uad",   "irda",          none, driven),
 125         TEGRA_MAP_MUXCONF("uca",   "uartc",         none, driven),
 126         TEGRA_MAP_MUXCONF("ucb",   "uartc",         none, driven),
 127         TEGRA_MAP_MUXCONF("uda",   "ulpi",          none, driven),
 128         TEGRA_MAP_CONF("ck32",    none, na),
 129         TEGRA_MAP_CONF("ddrc",    none, na),
 130         TEGRA_MAP_CONF("pmca",    none, na),
 131         TEGRA_MAP_CONF("pmcb",    none, na),
 132         TEGRA_MAP_CONF("pmcc",    none, na),
 133         TEGRA_MAP_CONF("pmcd",    none, na),
 134         TEGRA_MAP_CONF("pmce",    none, na),
 135         TEGRA_MAP_CONF("xm2c",    none, na),
 136         TEGRA_MAP_CONF("xm2d",    none, na),
 137         TEGRA_MAP_CONF("ls",      up,   na),
 138         TEGRA_MAP_CONF("lc",      up,   na),
 139         TEGRA_MAP_CONF("ld17_0",  down, na),
 140         TEGRA_MAP_CONF("ld19_18", down, na),
 141         TEGRA_MAP_CONF("ld21_20", down, na),
 142         TEGRA_MAP_CONF("ld23_22", down, na),
 143 };
 144
 145 static struct pinctrl_map seaboard_map[] = {
 146         TEGRA_MAP_MUXCONF("ddc",   "rsvd2",         none, tristate),
 147         TEGRA_MAP_MUXCONF("gmd",   "sflash",        none, driven),
 148         TEGRA_MAP_MUXCONF("lpw0",  "hdmi",          na,   driven),
 149         TEGRA_MAP_MUXCONF("lpw2",  "hdmi",          na,   driven),
 150         TEGRA_MAP_MUXCONF("lsc1",  "hdmi",          na,   tristate),
 151         TEGRA_MAP_MUXCONF("lsck",  "hdmi",          na,   tristate),
 152         TEGRA_MAP_MUXCONF("lsda",  "hdmi",          na,   tristate),
 153         TEGRA_MAP_MUXCONF("slxc",  "spdif",         none, tristate),
 154         TEGRA_MAP_MUXCONF("spia",  "gmi",           up,   tristate),
 155         TEGRA_MAP_MUXCONF("spic",  "gmi",           up,   driven),
 156         TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      up,   tristate),
 157         PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, "drive_sdio1", seaboard_pincfg_drive_sdio1),
 158 };
 159
 160 static struct pinctrl_map ventana_map[] = {
 161         TEGRA_MAP_MUXCONF("ddc",   "rsvd2",         none, driven),
 162         TEGRA_MAP_MUXCONF("gmd",   "sflash",        none, tristate),
 163         TEGRA_MAP_MUXCONF("lpw0",  "displaya",      na,   driven),
 164         TEGRA_MAP_MUXCONF("lpw2",  "displaya",      na,   driven),
 165         TEGRA_MAP_MUXCONF("lsc1",  "displaya",      na,   driven),
 166         TEGRA_MAP_MUXCONF("lsck",  "displaya",      na,   tristate),
 167         TEGRA_MAP_MUXCONF("lsda",  "displaya",      na,   tristate),
 168         TEGRA_MAP_MUXCONF("slxc",  "sdio3",         none, driven),
 169         TEGRA_MAP_MUXCONF("spia",  "gmi",           none, tristate),
 170         TEGRA_MAP_MUXCONF("spic",  "gmi",           none, tristate),
 171         TEGRA_MAP_MUXCONF("spig",  "spi2_alt",      none, tristate),
 172 };
 173
 174 static struct tegra_board_pinmux_conf common_conf = {
 175         .maps = common_map,
 176         .map_count = ARRAY_SIZE(common_map),
 177 };
 178
 179 static struct tegra_board_pinmux_conf seaboard_conf = {
 180         .maps = seaboard_map,
 181         .map_count = ARRAY_SIZE(seaboard_map),
 182 };
 183
 184 static struct tegra_board_pinmux_conf ventana_conf = {
 185         .maps = ventana_map,
 186         .map_count = ARRAY_SIZE(ventana_map),
 187 };
 188
 189 void seaboard_pinmux_init(void)
 190 {
 191         tegra_board_pinmux_init(&common_conf, &seaboard_conf);
 192 }
 193
 194 void ventana_pinmux_init(void)
 195 {
 196         tegra_board_pinmux_init(&common_conf, &ventana_conf);
 197 }