Pileus Git - ~andy/linux/blob - arch/arm/mach-shmobile/setup-r8a7779.c

   1 /*
   2  * r8a7779 processor support
   3  *
   4  * Copyright (C) 2011  Renesas Solutions Corp.
   5  * Copyright (C) 2011  Magnus Damm
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/irq.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/input.h>
  27 #include <linux/io.h>
  28 #include <linux/serial_sci.h>
  29 #include <linux/sh_intc.h>
  30 #include <linux/sh_timer.h>
  31 #include <mach/hardware.h>
  32 #include <mach/irqs.h>
  33 #include <mach/r8a7779.h>
  34 #include <mach/common.h>
  35 #include <asm/mach-types.h>
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/time.h>
  38 #include <asm/mach/map.h>
  39 #include <asm/hardware/cache-l2x0.h>
  40
  41 static struct map_desc r8a7779_io_desc[] __initdata = {
  42         /* 2M entity map for 0xf0000000 (MPCORE) */
  43         {
  44                 .virtual        = 0xf0000000,
  45                 .pfn            = __phys_to_pfn(0xf0000000),
  46                 .length         = SZ_2M,
  47                 .type           = MT_DEVICE_NONSHARED
  48         },
  49         /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  50         {
  51                 .virtual        = 0xfe000000,
  52                 .pfn            = __phys_to_pfn(0xfe000000),
  53                 .length         = SZ_16M,
  54                 .type           = MT_DEVICE_NONSHARED
  55         },
  56 };
  57
  58 void __init r8a7779_map_io(void)
  59 {
  60         iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  61 }
  62
  63 static struct resource r8a7779_pfc_resources[] = {
  64         [0] = {
  65                 .start  = 0xfffc0000,
  66                 .end    = 0xfffc023b,
  67                 .flags  = IORESOURCE_MEM,
  68         },
  69         [1] = {
  70                 .start  = 0xffc40000,
  71                 .end    = 0xffc46fff,
  72                 .flags  = IORESOURCE_MEM,
  73         }
  74 };
  75
  76 static struct platform_device r8a7779_pfc_device = {
  77         .name           = "pfc-r8a7779",
  78         .id             = -1,
  79         .resource       = r8a7779_pfc_resources,
  80         .num_resources  = ARRAY_SIZE(r8a7779_pfc_resources),
  81 };
  82
  83 void __init r8a7779_pinmux_init(void)
  84 {
  85         platform_device_register(&r8a7779_pfc_device);
  86 }
  87
  88 static struct plat_sci_port scif0_platform_data = {
  89         .mapbase        = 0xffe40000,
  90         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  91         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  92         .scbrr_algo_id  = SCBRR_ALGO_2,
  93         .type           = PORT_SCIF,
  94         .irqs           = { gic_spi(88), gic_spi(88),
  95                             gic_spi(88), gic_spi(88) },
  96 };
  97
  98 static struct platform_device scif0_device = {
  99         .name           = "sh-sci",
 100         .id             = 0,
 101         .dev            = {
 102                 .platform_data  = &scif0_platform_data,
 103         },
 104 };
 105
 106 static struct plat_sci_port scif1_platform_data = {
 107         .mapbase        = 0xffe41000,
 108         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 109         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 110         .scbrr_algo_id  = SCBRR_ALGO_2,
 111         .type           = PORT_SCIF,
 112         .irqs           = { gic_spi(89), gic_spi(89),
 113                             gic_spi(89), gic_spi(89) },
 114 };
 115
 116 static struct platform_device scif1_device = {
 117         .name           = "sh-sci",
 118         .id             = 1,
 119         .dev            = {
 120                 .platform_data  = &scif1_platform_data,
 121         },
 122 };
 123
 124 static struct plat_sci_port scif2_platform_data = {
 125         .mapbase        = 0xffe42000,
 126         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 127         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 128         .scbrr_algo_id  = SCBRR_ALGO_2,
 129         .type           = PORT_SCIF,
 130         .irqs           = { gic_spi(90), gic_spi(90),
 131                             gic_spi(90), gic_spi(90) },
 132 };
 133
 134 static struct platform_device scif2_device = {
 135         .name           = "sh-sci",
 136         .id             = 2,
 137         .dev            = {
 138                 .platform_data  = &scif2_platform_data,
 139         },
 140 };
 141
 142 static struct plat_sci_port scif3_platform_data = {
 143         .mapbase        = 0xffe43000,
 144         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 145         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 146         .scbrr_algo_id  = SCBRR_ALGO_2,
 147         .type           = PORT_SCIF,
 148         .irqs           = { gic_spi(91), gic_spi(91),
 149                             gic_spi(91), gic_spi(91) },
 150 };
 151
 152 static struct platform_device scif3_device = {
 153         .name           = "sh-sci",
 154         .id             = 3,
 155         .dev            = {
 156                 .platform_data  = &scif3_platform_data,
 157         },
 158 };
 159
 160 static struct plat_sci_port scif4_platform_data = {
 161         .mapbase        = 0xffe44000,
 162         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 163         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 164         .scbrr_algo_id  = SCBRR_ALGO_2,
 165         .type           = PORT_SCIF,
 166         .irqs           = { gic_spi(92), gic_spi(92),
 167                             gic_spi(92), gic_spi(92) },
 168 };
 169
 170 static struct platform_device scif4_device = {
 171         .name           = "sh-sci",
 172         .id             = 4,
 173         .dev            = {
 174                 .platform_data  = &scif4_platform_data,
 175         },
 176 };
 177
 178 static struct plat_sci_port scif5_platform_data = {
 179         .mapbase        = 0xffe45000,
 180         .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 181         .scscr          = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
 182         .scbrr_algo_id  = SCBRR_ALGO_2,
 183         .type           = PORT_SCIF,
 184         .irqs           = { gic_spi(93), gic_spi(93),
 185                             gic_spi(93), gic_spi(93) },
 186 };
 187
 188 static struct platform_device scif5_device = {
 189         .name           = "sh-sci",
 190         .id             = 5,
 191         .dev            = {
 192                 .platform_data  = &scif5_platform_data,
 193         },
 194 };
 195
 196 /* TMU */
 197 static struct sh_timer_config tmu00_platform_data = {
 198         .name = "TMU00",
 199         .channel_offset = 0x4,
 200         .timer_bit = 0,
 201         .clockevent_rating = 200,
 202 };
 203
 204 static struct resource tmu00_resources[] = {
 205         [0] = {
 206                 .name   = "TMU00",
 207                 .start  = 0xffd80008,
 208                 .end    = 0xffd80013,
 209                 .flags  = IORESOURCE_MEM,
 210         },
 211         [1] = {
 212                 .start  = gic_spi(32),
 213                 .flags  = IORESOURCE_IRQ,
 214         },
 215 };
 216
 217 static struct platform_device tmu00_device = {
 218         .name           = "sh_tmu",
 219         .id             = 0,
 220         .dev = {
 221                 .platform_data  = &tmu00_platform_data,
 222         },
 223         .resource       = tmu00_resources,
 224         .num_resources  = ARRAY_SIZE(tmu00_resources),
 225 };
 226
 227 static struct sh_timer_config tmu01_platform_data = {
 228         .name = "TMU01",
 229         .channel_offset = 0x10,
 230         .timer_bit = 1,
 231         .clocksource_rating = 200,
 232 };
 233
 234 static struct resource tmu01_resources[] = {
 235         [0] = {
 236                 .name   = "TMU01",
 237                 .start  = 0xffd80014,
 238                 .end    = 0xffd8001f,
 239                 .flags  = IORESOURCE_MEM,
 240         },
 241         [1] = {
 242                 .start  = gic_spi(33),
 243                 .flags  = IORESOURCE_IRQ,
 244         },
 245 };
 246
 247 static struct platform_device tmu01_device = {
 248         .name           = "sh_tmu",
 249         .id             = 1,
 250         .dev = {
 251                 .platform_data  = &tmu01_platform_data,
 252         },
 253         .resource       = tmu01_resources,
 254         .num_resources  = ARRAY_SIZE(tmu01_resources),
 255 };
 256
 257 /* I2C */
 258 static struct resource rcar_i2c0_res[] = {
 259         {
 260                 .start  = 0xffc70000,
 261                 .end    = 0xffc70fff,
 262                 .flags  = IORESOURCE_MEM,
 263         }, {
 264                 .start  = gic_spi(79),
 265                 .flags  = IORESOURCE_IRQ,
 266         },
 267 };
 268
 269 static struct platform_device i2c0_device = {
 270         .name           = "i2c-rcar",
 271         .id             = 0,
 272         .resource       = rcar_i2c0_res,
 273         .num_resources  = ARRAY_SIZE(rcar_i2c0_res),
 274 };
 275
 276 static struct resource rcar_i2c1_res[] = {
 277         {
 278                 .start  = 0xffc71000,
 279                 .end    = 0xffc71fff,
 280                 .flags  = IORESOURCE_MEM,
 281         }, {
 282                 .start  = gic_spi(82),
 283                 .flags  = IORESOURCE_IRQ,
 284         },
 285 };
 286
 287 static struct platform_device i2c1_device = {
 288         .name           = "i2c-rcar",
 289         .id             = 1,
 290         .resource       = rcar_i2c1_res,
 291         .num_resources  = ARRAY_SIZE(rcar_i2c1_res),
 292 };
 293
 294 static struct resource rcar_i2c2_res[] = {
 295         {
 296                 .start  = 0xffc72000,
 297                 .end    = 0xffc72fff,
 298                 .flags  = IORESOURCE_MEM,
 299         }, {
 300                 .start  = gic_spi(80),
 301                 .flags  = IORESOURCE_IRQ,
 302         },
 303 };
 304
 305 static struct platform_device i2c2_device = {
 306         .name           = "i2c-rcar",
 307         .id             = 2,
 308         .resource       = rcar_i2c2_res,
 309         .num_resources  = ARRAY_SIZE(rcar_i2c2_res),
 310 };
 311
 312 static struct resource rcar_i2c3_res[] = {
 313         {
 314                 .start  = 0xffc73000,
 315                 .end    = 0xffc73fff,
 316                 .flags  = IORESOURCE_MEM,
 317         }, {
 318                 .start  = gic_spi(81),
 319                 .flags  = IORESOURCE_IRQ,
 320         },
 321 };
 322
 323 static struct platform_device i2c3_device = {
 324         .name           = "i2c-rcar",
 325         .id             = 3,
 326         .resource       = rcar_i2c3_res,
 327         .num_resources  = ARRAY_SIZE(rcar_i2c3_res),
 328 };
 329
 330 static struct platform_device *r8a7779_early_devices[] __initdata = {
 331         &scif0_device,
 332         &scif1_device,
 333         &scif2_device,
 334         &scif3_device,
 335         &scif4_device,
 336         &scif5_device,
 337         &tmu00_device,
 338         &tmu01_device,
 339         &i2c0_device,
 340         &i2c1_device,
 341         &i2c2_device,
 342         &i2c3_device,
 343 };
 344
 345 static struct platform_device *r8a7779_late_devices[] __initdata = {
 346 };
 347
 348 void __init r8a7779_add_standard_devices(void)
 349 {
 350 #ifdef CONFIG_CACHE_L2X0
 351         /* Early BRESP enable, Shared attribute override enable, 64K*16way */
 352         l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
 353 #endif
 354         r8a7779_pm_init();
 355
 356         r8a7779_init_pm_domains();
 357
 358         platform_add_devices(r8a7779_early_devices,
 359                             ARRAY_SIZE(r8a7779_early_devices));
 360         platform_add_devices(r8a7779_late_devices,
 361                             ARRAY_SIZE(r8a7779_late_devices));
 362 }
 363
 364 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
 365 void __init __weak r8a7779_register_twd(void) { }
 366
 367 void __init r8a7779_earlytimer_init(void)
 368 {
 369         r8a7779_clock_init();
 370         shmobile_earlytimer_init();
 371         r8a7779_register_twd();
 372 }
 373
 374 void __init r8a7779_add_early_devices(void)
 375 {
 376         early_platform_add_devices(r8a7779_early_devices,
 377                                    ARRAY_SIZE(r8a7779_early_devices));
 378
 379         /* Early serial console setup is not included here due to
 380          * memory map collisions. The SCIF serial ports in r8a7779
 381          * are difficult to entity map 1:1 due to collision with the
 382          * virtual memory range used by the coherent DMA code on ARM.
 383          *
 384          * Anyone wanting to debug early can remove UPF_IOREMAP from
 385          * the sh-sci serial console platform data, adjust mapbase
 386          * to a static M:N virt:phys mapping that needs to be added to
 387          * the mappings passed with iotable_init() above.
 388          *
 389          * Then add a call to shmobile_setup_console() from this function.
 390          *
 391          * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
 392          * command line in case of the marzen board.
 393          */
 394 }