Pileus Git - ~andy/linux/blob - arch/arm/mach-shmobile/pfc-r8a7740.c

   1 /*
   2  * R8A7740 processor support
   3  *
   4  * Copyright (C) 2011  Renesas Solutions Corp.
   5  * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; version 2 of the
  10  * License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  20  */
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/gpio.h>
  24 #include <mach/r8a7740.h>
  25 #include <mach/irqs.h>
  26
  27 #define CPU_ALL_PORT(fn, pfx, sfx)                                      \
  28         PORT_10(fn, pfx, sfx),          PORT_90(fn, pfx, sfx),          \
  29         PORT_10(fn, pfx##10, sfx),      PORT_90(fn, pfx##1, sfx),       \
  30         PORT_10(fn, pfx##20, sfx),                                      \
  31         PORT_1(fn, pfx##210, sfx),      PORT_1(fn, pfx##211, sfx)
  32
  33 enum {
  34         PINMUX_RESERVED = 0,
  35
  36         /* PORT0_DATA -> PORT211_DATA */
  37         PINMUX_DATA_BEGIN,
  38         PORT_ALL(DATA),
  39         PINMUX_DATA_END,
  40
  41         /* PORT0_IN -> PORT211_IN */
  42         PINMUX_INPUT_BEGIN,
  43         PORT_ALL(IN),
  44         PINMUX_INPUT_END,
  45
  46         /* PORT0_IN_PU -> PORT211_IN_PU */
  47         PINMUX_INPUT_PULLUP_BEGIN,
  48         PORT_ALL(IN_PU),
  49         PINMUX_INPUT_PULLUP_END,
  50
  51         /* PORT0_IN_PD -> PORT211_IN_PD */
  52         PINMUX_INPUT_PULLDOWN_BEGIN,
  53         PORT_ALL(IN_PD),
  54         PINMUX_INPUT_PULLDOWN_END,
  55
  56         /* PORT0_OUT -> PORT211_OUT */
  57         PINMUX_OUTPUT_BEGIN,
  58         PORT_ALL(OUT),
  59         PINMUX_OUTPUT_END,
  60
  61         PINMUX_FUNCTION_BEGIN,
  62         PORT_ALL(FN_IN),        /* PORT0_FN_IN -> PORT211_FN_IN */
  63         PORT_ALL(FN_OUT),       /* PORT0_FN_OUT -> PORT211_FN_OUT */
  64         PORT_ALL(FN0),          /* PORT0_FN0 -> PORT211_FN0 */
  65         PORT_ALL(FN1),          /* PORT0_FN1 -> PORT211_FN1 */
  66         PORT_ALL(FN2),          /* PORT0_FN2 -> PORT211_FN2 */
  67         PORT_ALL(FN3),          /* PORT0_FN3 -> PORT211_FN3 */
  68         PORT_ALL(FN4),          /* PORT0_FN4 -> PORT211_FN4 */
  69         PORT_ALL(FN5),          /* PORT0_FN5 -> PORT211_FN5 */
  70         PORT_ALL(FN6),          /* PORT0_FN6 -> PORT211_FN6 */
  71         PORT_ALL(FN7),          /* PORT0_FN7 -> PORT211_FN7 */
  72
  73         MSEL1CR_31_0,   MSEL1CR_31_1,
  74         MSEL1CR_30_0,   MSEL1CR_30_1,
  75         MSEL1CR_29_0,   MSEL1CR_29_1,
  76         MSEL1CR_28_0,   MSEL1CR_28_1,
  77         MSEL1CR_27_0,   MSEL1CR_27_1,
  78         MSEL1CR_26_0,   MSEL1CR_26_1,
  79         MSEL1CR_16_0,   MSEL1CR_16_1,
  80         MSEL1CR_15_0,   MSEL1CR_15_1,
  81         MSEL1CR_14_0,   MSEL1CR_14_1,
  82         MSEL1CR_13_0,   MSEL1CR_13_1,
  83         MSEL1CR_12_0,   MSEL1CR_12_1,
  84         MSEL1CR_9_0,    MSEL1CR_9_1,
  85         MSEL1CR_7_0,    MSEL1CR_7_1,
  86         MSEL1CR_6_0,    MSEL1CR_6_1,
  87         MSEL1CR_5_0,    MSEL1CR_5_1,
  88         MSEL1CR_4_0,    MSEL1CR_4_1,
  89         MSEL1CR_3_0,    MSEL1CR_3_1,
  90         MSEL1CR_2_0,    MSEL1CR_2_1,
  91         MSEL1CR_0_0,    MSEL1CR_0_1,
  92
  93         MSEL3CR_15_0,   MSEL3CR_15_1, /* Trace / Debug ? */
  94         MSEL3CR_6_0,    MSEL3CR_6_1,
  95
  96         MSEL4CR_19_0,   MSEL4CR_19_1,
  97         MSEL4CR_18_0,   MSEL4CR_18_1,
  98         MSEL4CR_15_0,   MSEL4CR_15_1,
  99         MSEL4CR_10_0,   MSEL4CR_10_1,
 100         MSEL4CR_6_0,    MSEL4CR_6_1,
 101         MSEL4CR_4_0,    MSEL4CR_4_1,
 102         MSEL4CR_1_0,    MSEL4CR_1_1,
 103
 104         MSEL5CR_31_0,   MSEL5CR_31_1, /* irq/fiq output */
 105         MSEL5CR_30_0,   MSEL5CR_30_1,
 106         MSEL5CR_29_0,   MSEL5CR_29_1,
 107         MSEL5CR_27_0,   MSEL5CR_27_1,
 108         MSEL5CR_25_0,   MSEL5CR_25_1,
 109         MSEL5CR_23_0,   MSEL5CR_23_1,
 110         MSEL5CR_21_0,   MSEL5CR_21_1,
 111         MSEL5CR_19_0,   MSEL5CR_19_1,
 112         MSEL5CR_17_0,   MSEL5CR_17_1,
 113         MSEL5CR_15_0,   MSEL5CR_15_1,
 114         MSEL5CR_14_0,   MSEL5CR_14_1,
 115         MSEL5CR_13_0,   MSEL5CR_13_1,
 116         MSEL5CR_12_0,   MSEL5CR_12_1,
 117         MSEL5CR_11_0,   MSEL5CR_11_1,
 118         MSEL5CR_10_0,   MSEL5CR_10_1,
 119         MSEL5CR_8_0,    MSEL5CR_8_1,
 120         MSEL5CR_7_0,    MSEL5CR_7_1,
 121         MSEL5CR_6_0,    MSEL5CR_6_1,
 122         MSEL5CR_5_0,    MSEL5CR_5_1,
 123         MSEL5CR_4_0,    MSEL5CR_4_1,
 124         MSEL5CR_3_0,    MSEL5CR_3_1,
 125         MSEL5CR_2_0,    MSEL5CR_2_1,
 126         MSEL5CR_0_0,    MSEL5CR_0_1,
 127         PINMUX_FUNCTION_END,
 128
 129         PINMUX_MARK_BEGIN,
 130
 131         /* IRQ */
 132         IRQ0_PORT2_MARK,        IRQ0_PORT13_MARK,
 133         IRQ1_MARK,
 134         IRQ2_PORT11_MARK,       IRQ2_PORT12_MARK,
 135         IRQ3_PORT10_MARK,       IRQ3_PORT14_MARK,
 136         IRQ4_PORT15_MARK,       IRQ4_PORT172_MARK,
 137         IRQ5_PORT0_MARK,        IRQ5_PORT1_MARK,
 138         IRQ6_PORT121_MARK,      IRQ6_PORT173_MARK,
 139         IRQ7_PORT120_MARK,      IRQ7_PORT209_MARK,
 140         IRQ8_MARK,
 141         IRQ9_PORT118_MARK,      IRQ9_PORT210_MARK,
 142         IRQ10_MARK,
 143         IRQ11_MARK,
 144         IRQ12_PORT42_MARK,      IRQ12_PORT97_MARK,
 145         IRQ13_PORT64_MARK,      IRQ13_PORT98_MARK,
 146         IRQ14_PORT63_MARK,      IRQ14_PORT99_MARK,
 147         IRQ15_PORT62_MARK,      IRQ15_PORT100_MARK,
 148         IRQ16_PORT68_MARK,      IRQ16_PORT211_MARK,
 149         IRQ17_MARK,
 150         IRQ18_MARK,
 151         IRQ19_MARK,
 152         IRQ20_MARK,
 153         IRQ21_MARK,
 154         IRQ22_MARK,
 155         IRQ23_MARK,
 156         IRQ24_MARK,
 157         IRQ25_MARK,
 158         IRQ26_PORT58_MARK,      IRQ26_PORT81_MARK,
 159         IRQ27_PORT57_MARK,      IRQ27_PORT168_MARK,
 160         IRQ28_PORT56_MARK,      IRQ28_PORT169_MARK,
 161         IRQ29_PORT50_MARK,      IRQ29_PORT170_MARK,
 162         IRQ30_PORT49_MARK,      IRQ30_PORT171_MARK,
 163         IRQ31_PORT41_MARK,      IRQ31_PORT167_MARK,
 164
 165         /* Function */
 166
 167         /* DBGT */
 168         DBGMDT2_MARK,   DBGMDT1_MARK,   DBGMDT0_MARK,
 169         DBGMD10_MARK,   DBGMD11_MARK,   DBGMD20_MARK,
 170         DBGMD21_MARK,
 171
 172         /* FSI */
 173         FSIAISLD_PORT0_MARK,    /* FSIAISLD Port 0/5 */
 174         FSIAISLD_PORT5_MARK,
 175         FSIASPDIF_PORT9_MARK,   /* FSIASPDIF Port 9/18 */
 176         FSIASPDIF_PORT18_MARK,
 177         FSIAOSLD1_MARK, FSIAOSLD2_MARK, FSIAOLR_MARK,
 178         FSIAOBT_MARK,   FSIAOSLD_MARK,  FSIAOMC_MARK,
 179         FSIACK_MARK,    FSIAILR_MARK,   FSIAIBT_MARK,
 180
 181         /* FMSI */
 182         FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */
 183         FMSISLD_PORT6_MARK,
 184         FMSIILR_MARK,   FMSIIBT_MARK,   FMSIOLR_MARK,   FMSIOBT_MARK,
 185         FMSICK_MARK,    FMSOILR_MARK,   FMSOIBT_MARK,   FMSOOLR_MARK,
 186         FMSOOBT_MARK,   FMSOSLD_MARK,   FMSOCK_MARK,
 187
 188         /* SCIFA0 */
 189         SCIFA0_SCK_MARK,        SCIFA0_CTS_MARK,        SCIFA0_RTS_MARK,
 190         SCIFA0_RXD_MARK,        SCIFA0_TXD_MARK,
 191
 192         /* SCIFA1 */
 193         SCIFA1_CTS_MARK,        SCIFA1_SCK_MARK,        SCIFA1_RXD_MARK,
 194         SCIFA1_TXD_MARK,        SCIFA1_RTS_MARK,
 195
 196         /* SCIFA2 */
 197         SCIFA2_SCK_PORT22_MARK, /* SCIFA2_SCK Port 22/199 */
 198         SCIFA2_SCK_PORT199_MARK,
 199         SCIFA2_RXD_MARK,        SCIFA2_TXD_MARK,
 200         SCIFA2_CTS_MARK,        SCIFA2_RTS_MARK,
 201
 202         /* SCIFA3 */
 203         SCIFA3_RTS_PORT105_MARK, /* MSEL5CR_8_0 */
 204         SCIFA3_SCK_PORT116_MARK,
 205         SCIFA3_CTS_PORT117_MARK,
 206         SCIFA3_RXD_PORT174_MARK,
 207         SCIFA3_TXD_PORT175_MARK,
 208
 209         SCIFA3_RTS_PORT161_MARK, /* MSEL5CR_8_1 */
 210         SCIFA3_SCK_PORT158_MARK,
 211         SCIFA3_CTS_PORT162_MARK,
 212         SCIFA3_RXD_PORT159_MARK,
 213         SCIFA3_TXD_PORT160_MARK,
 214
 215         /* SCIFA4 */
 216         SCIFA4_RXD_PORT12_MARK, /* MSEL5CR[12:11] = 00 */
 217         SCIFA4_TXD_PORT13_MARK,
 218
 219         SCIFA4_RXD_PORT204_MARK, /* MSEL5CR[12:11] = 01 */
 220         SCIFA4_TXD_PORT203_MARK,
 221
 222         SCIFA4_RXD_PORT94_MARK, /* MSEL5CR[12:11] = 10 */
 223         SCIFA4_TXD_PORT93_MARK,
 224
 225         SCIFA4_SCK_PORT21_MARK, /* SCIFA4_SCK Port 21/205 */
 226         SCIFA4_SCK_PORT205_MARK,
 227
 228         /* SCIFA5 */
 229         SCIFA5_TXD_PORT20_MARK, /* MSEL5CR[15:14] = 00 */
 230         SCIFA5_RXD_PORT10_MARK,
 231
 232         SCIFA5_RXD_PORT207_MARK, /* MSEL5CR[15:14] = 01 */
 233         SCIFA5_TXD_PORT208_MARK,
 234
 235         SCIFA5_TXD_PORT91_MARK, /* MSEL5CR[15:14] = 10 */
 236         SCIFA5_RXD_PORT92_MARK,
 237
 238         SCIFA5_SCK_PORT23_MARK, /* SCIFA5_SCK Port 23/206 */
 239         SCIFA5_SCK_PORT206_MARK,
 240
 241         /* SCIFA6 */
 242         SCIFA6_SCK_MARK,        SCIFA6_RXD_MARK,        SCIFA6_TXD_MARK,
 243
 244         /* SCIFA7 */
 245         SCIFA7_TXD_MARK,        SCIFA7_RXD_MARK,
 246
 247         /* SCIFAB */
 248         SCIFB_SCK_PORT190_MARK, /* MSEL5CR_17_0 */
 249         SCIFB_RXD_PORT191_MARK,
 250         SCIFB_TXD_PORT192_MARK,
 251         SCIFB_RTS_PORT186_MARK,
 252         SCIFB_CTS_PORT187_MARK,
 253
 254         SCIFB_SCK_PORT2_MARK, /* MSEL5CR_17_1 */
 255         SCIFB_RXD_PORT3_MARK,
 256         SCIFB_TXD_PORT4_MARK,
 257         SCIFB_RTS_PORT172_MARK,
 258         SCIFB_CTS_PORT173_MARK,
 259
 260         /* LCD0 */
 261         LCDC0_SELECT_MARK,
 262
 263         LCD0_D0_MARK,   LCD0_D1_MARK,   LCD0_D2_MARK,   LCD0_D3_MARK,
 264         LCD0_D4_MARK,   LCD0_D5_MARK,   LCD0_D6_MARK,   LCD0_D7_MARK,
 265         LCD0_D8_MARK,   LCD0_D9_MARK,   LCD0_D10_MARK,  LCD0_D11_MARK,
 266         LCD0_D12_MARK,  LCD0_D13_MARK,  LCD0_D14_MARK,  LCD0_D15_MARK,
 267         LCD0_D16_MARK,  LCD0_D17_MARK,
 268         LCD0_DON_MARK,  LCD0_VCPWC_MARK,        LCD0_VEPWC_MARK,
 269         LCD0_DCK_MARK,  LCD0_VSYN_MARK, /* for RGB */
 270         LCD0_HSYN_MARK, LCD0_DISP_MARK, /* for RGB */
 271         LCD0_WR_MARK,   LCD0_RD_MARK,   /* for SYS */
 272         LCD0_CS_MARK,   LCD0_RS_MARK,   /* for SYS */
 273
 274         LCD0_D21_PORT158_MARK,  LCD0_D23_PORT159_MARK, /* MSEL5CR_6_1 */
 275         LCD0_D22_PORT160_MARK,  LCD0_D20_PORT161_MARK,
 276         LCD0_D19_PORT162_MARK,  LCD0_D18_PORT163_MARK,
 277         LCD0_LCLK_PORT165_MARK,
 278
 279         LCD0_D18_PORT40_MARK,   LCD0_D22_PORT0_MARK, /* MSEL5CR_6_0 */
 280         LCD0_D23_PORT1_MARK,    LCD0_D21_PORT2_MARK,
 281         LCD0_D20_PORT3_MARK,    LCD0_D19_PORT4_MARK,
 282         LCD0_LCLK_PORT102_MARK,
 283
 284         /* LCD1 */
 285         LCDC1_SELECT_MARK,
 286
 287         LCD1_D0_MARK,   LCD1_D1_MARK,   LCD1_D2_MARK,   LCD1_D3_MARK,
 288         LCD1_D4_MARK,   LCD1_D5_MARK,   LCD1_D6_MARK,   LCD1_D7_MARK,
 289         LCD1_D8_MARK,   LCD1_D9_MARK,   LCD1_D10_MARK,  LCD1_D11_MARK,
 290         LCD1_D12_MARK,  LCD1_D13_MARK,  LCD1_D14_MARK,  LCD1_D15_MARK,
 291         LCD1_D16_MARK,  LCD1_D17_MARK,  LCD1_D18_MARK,  LCD1_D19_MARK,
 292         LCD1_D20_MARK,  LCD1_D21_MARK,  LCD1_D22_MARK,  LCD1_D23_MARK,
 293         LCD1_DON_MARK,  LCD1_VCPWC_MARK,
 294         LCD1_LCLK_MARK, LCD1_VEPWC_MARK,
 295
 296         LCD1_DCK_MARK,  LCD1_VSYN_MARK, /* for RGB */
 297         LCD1_HSYN_MARK, LCD1_DISP_MARK, /* for RGB */
 298         LCD1_RS_MARK,   LCD1_CS_MARK,   /* for SYS */
 299         LCD1_RD_MARK,   LCD1_WR_MARK,   /* for SYS */
 300
 301         /* RSPI */
 302         RSPI_SSL0_A_MARK,       RSPI_SSL1_A_MARK,       RSPI_SSL2_A_MARK,
 303         RSPI_SSL3_A_MARK,       RSPI_CK_A_MARK,         RSPI_MOSI_A_MARK,
 304         RSPI_MISO_A_MARK,
 305
 306         /* VIO CKO */
 307         VIO_CKO1_MARK, /* needs fixup */
 308         VIO_CKO2_MARK,
 309         VIO_CKO_1_MARK,
 310         VIO_CKO_MARK,
 311
 312         /* VIO0 */
 313         VIO0_D0_MARK,   VIO0_D1_MARK,   VIO0_D2_MARK,   VIO0_D3_MARK,
 314         VIO0_D4_MARK,   VIO0_D5_MARK,   VIO0_D6_MARK,   VIO0_D7_MARK,
 315         VIO0_D8_MARK,   VIO0_D9_MARK,   VIO0_D10_MARK,  VIO0_D11_MARK,
 316         VIO0_D12_MARK,  VIO0_VD_MARK,   VIO0_HD_MARK,   VIO0_CLK_MARK,
 317         VIO0_FIELD_MARK,
 318
 319         VIO0_D13_PORT26_MARK, /* MSEL5CR_27_0 */
 320         VIO0_D14_PORT25_MARK,
 321         VIO0_D15_PORT24_MARK,
 322
 323         VIO0_D13_PORT22_MARK, /* MSEL5CR_27_1 */
 324         VIO0_D14_PORT95_MARK,
 325         VIO0_D15_PORT96_MARK,
 326
 327         /* VIO1 */
 328         VIO1_D0_MARK,   VIO1_D1_MARK,   VIO1_D2_MARK,   VIO1_D3_MARK,
 329         VIO1_D4_MARK,   VIO1_D5_MARK,   VIO1_D6_MARK,   VIO1_D7_MARK,
 330         VIO1_VD_MARK,   VIO1_HD_MARK,   VIO1_CLK_MARK,  VIO1_FIELD_MARK,
 331
 332         /* TPU0 */
 333         TPU0TO0_MARK,   TPU0TO1_MARK,   TPU0TO3_MARK,
 334         TPU0TO2_PORT66_MARK, /* TPU0TO2 Port 66/202 */
 335         TPU0TO2_PORT202_MARK,
 336
 337         /* SSP1 0 */
 338         STP0_IPD0_MARK, STP0_IPD1_MARK, STP0_IPD2_MARK, STP0_IPD3_MARK,
 339         STP0_IPD4_MARK, STP0_IPD5_MARK, STP0_IPD6_MARK, STP0_IPD7_MARK,
 340         STP0_IPEN_MARK, STP0_IPCLK_MARK,        STP0_IPSYNC_MARK,
 341
 342         /* SSP1 1 */
 343         STP1_IPD1_MARK, STP1_IPD2_MARK, STP1_IPD3_MARK, STP1_IPD4_MARK,
 344         STP1_IPD5_MARK, STP1_IPD6_MARK, STP1_IPD7_MARK, STP1_IPCLK_MARK,
 345         STP1_IPSYNC_MARK,
 346
 347         STP1_IPD0_PORT186_MARK, /* MSEL5CR_23_0 */
 348         STP1_IPEN_PORT187_MARK,
 349
 350         STP1_IPD0_PORT194_MARK, /* MSEL5CR_23_1 */
 351         STP1_IPEN_PORT193_MARK,
 352
 353         /* SIM */
 354         SIM_RST_MARK,   SIM_CLK_MARK,
 355         SIM_D_PORT22_MARK, /* SIM_D  Port 22/199 */
 356         SIM_D_PORT199_MARK,
 357
 358         /* SDHI0 */
 359         SDHI0_D0_MARK,  SDHI0_D1_MARK,  SDHI0_D2_MARK,  SDHI0_D3_MARK,
 360         SDHI0_CD_MARK,  SDHI0_WP_MARK,  SDHI0_CMD_MARK, SDHI0_CLK_MARK,
 361
 362         /* SDHI1 */
 363         SDHI1_D0_MARK,  SDHI1_D1_MARK,  SDHI1_D2_MARK,  SDHI1_D3_MARK,
 364         SDHI1_CD_MARK,  SDHI1_WP_MARK,  SDHI1_CMD_MARK, SDHI1_CLK_MARK,
 365
 366         /* SDHI2 */
 367         SDHI2_D0_MARK,  SDHI2_D1_MARK,  SDHI2_D2_MARK,  SDHI2_D3_MARK,
 368         SDHI2_CLK_MARK, SDHI2_CMD_MARK,
 369
 370         SDHI2_CD_PORT24_MARK, /* MSEL5CR_19_0 */
 371         SDHI2_WP_PORT25_MARK,
 372
 373         SDHI2_WP_PORT177_MARK, /* MSEL5CR_19_1 */
 374         SDHI2_CD_PORT202_MARK,
 375
 376         /* MSIOF2 */
 377         MSIOF2_TXD_MARK,        MSIOF2_RXD_MARK,        MSIOF2_TSCK_MARK,
 378         MSIOF2_SS2_MARK,        MSIOF2_TSYNC_MARK,      MSIOF2_SS1_MARK,
 379         MSIOF2_MCK1_MARK,       MSIOF2_MCK0_MARK,       MSIOF2_RSYNC_MARK,
 380         MSIOF2_RSCK_MARK,
 381
 382         /* KEYSC */
 383         KEYIN4_MARK,    KEYIN5_MARK,    KEYIN6_MARK,    KEYIN7_MARK,
 384         KEYOUT0_MARK,   KEYOUT1_MARK,   KEYOUT2_MARK,   KEYOUT3_MARK,
 385         KEYOUT4_MARK,   KEYOUT5_MARK,   KEYOUT6_MARK,   KEYOUT7_MARK,
 386
 387         KEYIN0_PORT43_MARK, /* MSEL4CR_18_0 */
 388         KEYIN1_PORT44_MARK,
 389         KEYIN2_PORT45_MARK,
 390         KEYIN3_PORT46_MARK,
 391
 392         KEYIN0_PORT58_MARK, /* MSEL4CR_18_1 */
 393         KEYIN1_PORT57_MARK,
 394         KEYIN2_PORT56_MARK,
 395         KEYIN3_PORT55_MARK,
 396
 397         /* VOU */
 398         DV_D0_MARK,     DV_D1_MARK,     DV_D2_MARK,     DV_D3_MARK,
 399         DV_D4_MARK,     DV_D5_MARK,     DV_D6_MARK,     DV_D7_MARK,
 400         DV_D8_MARK,     DV_D9_MARK,     DV_D10_MARK,    DV_D11_MARK,
 401         DV_D12_MARK,    DV_D13_MARK,    DV_D14_MARK,    DV_D15_MARK,
 402         DV_CLK_MARK,    DV_VSYNC_MARK,  DV_HSYNC_MARK,
 403
 404         /* MEMC */
 405         MEMC_AD0_MARK,  MEMC_AD1_MARK,  MEMC_AD2_MARK,  MEMC_AD3_MARK,
 406         MEMC_AD4_MARK,  MEMC_AD5_MARK,  MEMC_AD6_MARK,  MEMC_AD7_MARK,
 407         MEMC_AD8_MARK,  MEMC_AD9_MARK,  MEMC_AD10_MARK, MEMC_AD11_MARK,
 408         MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK, MEMC_AD15_MARK,
 409         MEMC_CS0_MARK,  MEMC_INT_MARK,  MEMC_NWE_MARK,  MEMC_NOE_MARK,
 410
 411         MEMC_CS1_MARK, /* MSEL4CR_6_0 */
 412         MEMC_ADV_MARK,
 413         MEMC_WAIT_MARK,
 414         MEMC_BUSCLK_MARK,
 415
 416         MEMC_A1_MARK, /* MSEL4CR_6_1 */
 417         MEMC_DREQ0_MARK,
 418         MEMC_DREQ1_MARK,
 419         MEMC_A0_MARK,
 420
 421         /* MMC */
 422         MMC0_D0_PORT68_MARK,    MMC0_D1_PORT69_MARK,    MMC0_D2_PORT70_MARK,
 423         MMC0_D3_PORT71_MARK,    MMC0_D4_PORT72_MARK,    MMC0_D5_PORT73_MARK,
 424         MMC0_D6_PORT74_MARK,    MMC0_D7_PORT75_MARK,    MMC0_CLK_PORT66_MARK,
 425         MMC0_CMD_PORT67_MARK,   /* MSEL4CR_15_0 */
 426
 427         MMC1_D0_PORT149_MARK,   MMC1_D1_PORT148_MARK,   MMC1_D2_PORT147_MARK,
 428         MMC1_D3_PORT146_MARK,   MMC1_D4_PORT145_MARK,   MMC1_D5_PORT144_MARK,
 429         MMC1_D6_PORT143_MARK,   MMC1_D7_PORT142_MARK,   MMC1_CLK_PORT103_MARK,
 430         MMC1_CMD_PORT104_MARK,  /* MSEL4CR_15_1 */
 431
 432         /* MSIOF0 */
 433         MSIOF0_SS1_MARK,        MSIOF0_SS2_MARK,        MSIOF0_RXD_MARK,
 434         MSIOF0_TXD_MARK,        MSIOF0_MCK0_MARK,       MSIOF0_MCK1_MARK,
 435         MSIOF0_RSYNC_MARK,      MSIOF0_RSCK_MARK,       MSIOF0_TSCK_MARK,
 436         MSIOF0_TSYNC_MARK,
 437
 438         /* MSIOF1 */
 439         MSIOF1_RSCK_MARK,       MSIOF1_RSYNC_MARK,
 440         MSIOF1_MCK0_MARK,       MSIOF1_MCK1_MARK,
 441
 442         MSIOF1_SS2_PORT116_MARK,        MSIOF1_SS1_PORT117_MARK,
 443         MSIOF1_RXD_PORT118_MARK,        MSIOF1_TXD_PORT119_MARK,
 444         MSIOF1_TSYNC_PORT120_MARK,
 445         MSIOF1_TSCK_PORT121_MARK,       /* MSEL4CR_10_0 */
 446
 447         MSIOF1_SS1_PORT67_MARK,         MSIOF1_TSCK_PORT72_MARK,
 448         MSIOF1_TSYNC_PORT73_MARK,       MSIOF1_TXD_PORT74_MARK,
 449         MSIOF1_RXD_PORT75_MARK,
 450         MSIOF1_SS2_PORT202_MARK,        /* MSEL4CR_10_1 */
 451
 452         /* GPIO */
 453         GPO0_MARK,      GPI0_MARK,      GPO1_MARK,      GPI1_MARK,
 454
 455         /* USB0 */
 456         USB0_OCI_MARK,  USB0_PPON_MARK, VBUS_MARK,
 457
 458         /* USB1 */
 459         USB1_OCI_MARK,  USB1_PPON_MARK,
 460
 461         /* BBIF1 */
 462         BBIF1_RXD_MARK,         BBIF1_TXD_MARK,         BBIF1_TSYNC_MARK,
 463         BBIF1_TSCK_MARK,        BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
 464         BBIF1_FLOW_MARK,        BBIF1_RX_FLOW_N_MARK,
 465
 466         /* BBIF2 */
 467         BBIF2_TXD2_PORT5_MARK, /* MSEL5CR_0_0 */
 468         BBIF2_RXD2_PORT60_MARK,
 469         BBIF2_TSYNC2_PORT6_MARK,
 470         BBIF2_TSCK2_PORT59_MARK,
 471
 472         BBIF2_RXD2_PORT90_MARK, /* MSEL5CR_0_1 */
 473         BBIF2_TXD2_PORT183_MARK,
 474         BBIF2_TSCK2_PORT89_MARK,
 475         BBIF2_TSYNC2_PORT184_MARK,
 476
 477         /* BSC / FLCTL / PCMCIA */
 478         CS0_MARK,       CS2_MARK,       CS4_MARK,
 479         CS5B_MARK,      CS6A_MARK,
 480         CS5A_PORT105_MARK, /* CS5A PORT 19/105 */
 481         CS5A_PORT19_MARK,
 482         IOIS16_MARK, /* ? */
 483
 484         A0_MARK,        A1_MARK,        A2_MARK,        A3_MARK,
 485         A4_FOE_MARK,    /* share with FLCTL */
 486         A5_FCDE_MARK,   /* share with FLCTL */
 487         A6_MARK,        A7_MARK,        A8_MARK,        A9_MARK,
 488         A10_MARK,       A11_MARK,       A12_MARK,       A13_MARK,
 489         A14_MARK,       A15_MARK,       A16_MARK,       A17_MARK,
 490         A18_MARK,       A19_MARK,       A20_MARK,       A21_MARK,
 491         A22_MARK,       A23_MARK,       A24_MARK,       A25_MARK,
 492         A26_MARK,
 493
 494         D0_NAF0_MARK,   D1_NAF1_MARK,   D2_NAF2_MARK,   /* share with FLCTL */
 495         D3_NAF3_MARK,   D4_NAF4_MARK,   D5_NAF5_MARK,   /* share with FLCTL */
 496         D6_NAF6_MARK,   D7_NAF7_MARK,   D8_NAF8_MARK,   /* share with FLCTL */
 497         D9_NAF9_MARK,   D10_NAF10_MARK, D11_NAF11_MARK, /* share with FLCTL */
 498         D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, /* share with FLCTL */
 499         D15_NAF15_MARK,                                 /* share with FLCTL */
 500         D16_MARK,       D17_MARK,       D18_MARK,       D19_MARK,
 501         D20_MARK,       D21_MARK,       D22_MARK,       D23_MARK,
 502         D24_MARK,       D25_MARK,       D26_MARK,       D27_MARK,
 503         D28_MARK,       D29_MARK,       D30_MARK,       D31_MARK,
 504
 505         WE0_FWE_MARK,   /* share with FLCTL */
 506         WE1_MARK,
 507         WE2_ICIORD_MARK,        /* share with PCMCIA */
 508         WE3_ICIOWR_MARK,        /* share with PCMCIA */
 509         CKO_MARK,       BS_MARK,        RDWR_MARK,
 510         RD_FSC_MARK,    /* share with FLCTL */
 511         WAIT_PORT177_MARK, /* WAIT Port 90/177 */
 512         WAIT_PORT90_MARK,
 513
 514         FCE0_MARK,      FCE1_MARK,      FRB_MARK, /* FLCTL */
 515
 516         /* IRDA */
 517         IRDA_FIRSEL_MARK,       IRDA_IN_MARK,   IRDA_OUT_MARK,
 518
 519         /* ATAPI */
 520         IDE_D0_MARK,    IDE_D1_MARK,    IDE_D2_MARK,    IDE_D3_MARK,
 521         IDE_D4_MARK,    IDE_D5_MARK,    IDE_D6_MARK,    IDE_D7_MARK,
 522         IDE_D8_MARK,    IDE_D9_MARK,    IDE_D10_MARK,   IDE_D11_MARK,
 523         IDE_D12_MARK,   IDE_D13_MARK,   IDE_D14_MARK,   IDE_D15_MARK,
 524         IDE_A0_MARK,    IDE_A1_MARK,    IDE_A2_MARK,    IDE_CS0_MARK,
 525         IDE_CS1_MARK,   IDE_IOWR_MARK,  IDE_IORD_MARK,  IDE_IORDY_MARK,
 526         IDE_INT_MARK,           IDE_RST_MARK,           IDE_DIRECTION_MARK,
 527         IDE_EXBUF_ENB_MARK,     IDE_IODACK_MARK,        IDE_IODREQ_MARK,
 528
 529         /* RMII */
 530         RMII_CRS_DV_MARK,       RMII_RX_ER_MARK,        RMII_RXD0_MARK,
 531         RMII_RXD1_MARK,         RMII_TX_EN_MARK,        RMII_TXD0_MARK,
 532         RMII_MDC_MARK,          RMII_TXD1_MARK,         RMII_MDIO_MARK,
 533         RMII_REF50CK_MARK,      /* for RMII */
 534         RMII_REF125CK_MARK,     /* for GMII */
 535
 536         /* GEther */
 537         ET_TX_CLK_MARK, ET_TX_EN_MARK,  ET_ETXD0_MARK,  ET_ETXD1_MARK,
 538         ET_ETXD2_MARK,  ET_ETXD3_MARK,
 539         ET_ETXD4_MARK,  ET_ETXD5_MARK, /* for GEther */
 540         ET_ETXD6_MARK,  ET_ETXD7_MARK, /* for GEther */
 541         ET_COL_MARK,    ET_TX_ER_MARK,  ET_RX_CLK_MARK, ET_RX_DV_MARK,
 542         ET_ERXD0_MARK,  ET_ERXD1_MARK,  ET_ERXD2_MARK,  ET_ERXD3_MARK,
 543         ET_ERXD4_MARK,  ET_ERXD5_MARK, /* for GEther */
 544         ET_ERXD6_MARK,  ET_ERXD7_MARK, /* for GEther */
 545         ET_RX_ER_MARK,  ET_CRS_MARK,            ET_MDC_MARK,    ET_MDIO_MARK,
 546         ET_LINK_MARK,   ET_PHY_INT_MARK,        ET_WOL_MARK,    ET_GTX_CLK_MARK,
 547
 548         /* DMA0 */
 549         DREQ0_MARK,     DACK0_MARK,
 550
 551         /* DMA1 */
 552         DREQ1_MARK,     DACK1_MARK,
 553
 554         /* SYSC */
 555         RESETOUTS_MARK,         RESETP_PULLUP_MARK,     RESETP_PLAIN_MARK,
 556
 557         /* IRREM */
 558         IROUT_MARK,
 559
 560         /* SDENC */
 561         SDENC_CPG_MARK,         SDENC_DV_CLKI_MARK,
 562
 563         /* DEBUG */
 564         EDEBGREQ_PULLUP_MARK,   /* for JTAG */
 565         EDEBGREQ_PULLDOWN_MARK,
 566
 567         TRACEAUD_FROM_VIO_MARK, /* for TRACE/AUD */
 568         TRACEAUD_FROM_LCDC0_MARK,
 569         TRACEAUD_FROM_MEMC_MARK,
 570
 571         PINMUX_MARK_END,
 572 };
 573
 574 static pinmux_enum_t pinmux_data[] = {
 575         /* specify valid pin states for each pin in GPIO mode */
 576
 577         /* I/O and Pull U/D */
 578         PORT_DATA_IO_PD(0),             PORT_DATA_IO_PD(1),
 579         PORT_DATA_IO_PD(2),             PORT_DATA_IO_PD(3),
 580         PORT_DATA_IO_PD(4),             PORT_DATA_IO_PD(5),
 581         PORT_DATA_IO_PD(6),             PORT_DATA_IO(7),
 582         PORT_DATA_IO(8),                PORT_DATA_IO(9),
 583
 584         PORT_DATA_IO_PD(10),            PORT_DATA_IO_PD(11),
 585         PORT_DATA_IO_PD(12),            PORT_DATA_IO_PU_PD(13),
 586         PORT_DATA_IO_PD(14),            PORT_DATA_IO_PD(15),
 587         PORT_DATA_IO_PD(16),            PORT_DATA_IO_PD(17),
 588         PORT_DATA_IO(18),               PORT_DATA_IO_PU(19),
 589
 590         PORT_DATA_IO_PU_PD(20),         PORT_DATA_IO_PD(21),
 591         PORT_DATA_IO_PU_PD(22),         PORT_DATA_IO(23),
 592         PORT_DATA_IO_PU(24),            PORT_DATA_IO_PU(25),
 593         PORT_DATA_IO_PU(26),            PORT_DATA_IO_PU(27),
 594         PORT_DATA_IO_PU(28),            PORT_DATA_IO_PU(29),
 595
 596         PORT_DATA_IO_PU(30),            PORT_DATA_IO_PD(31),
 597         PORT_DATA_IO_PD(32),            PORT_DATA_IO_PD(33),
 598         PORT_DATA_IO_PD(34),            PORT_DATA_IO_PU(35),
 599         PORT_DATA_IO_PU(36),            PORT_DATA_IO_PD(37),
 600         PORT_DATA_IO_PU(38),            PORT_DATA_IO_PD(39),
 601
 602         PORT_DATA_IO_PU_PD(40),         PORT_DATA_IO_PD(41),
 603         PORT_DATA_IO_PD(42),            PORT_DATA_IO_PU_PD(43),
 604         PORT_DATA_IO_PU_PD(44),         PORT_DATA_IO_PU_PD(45),
 605         PORT_DATA_IO_PU_PD(46),         PORT_DATA_IO_PU_PD(47),
 606         PORT_DATA_IO_PU_PD(48),         PORT_DATA_IO_PU_PD(49),
 607
 608         PORT_DATA_IO_PU_PD(50),         PORT_DATA_IO_PD(51),
 609         PORT_DATA_IO_PD(52),            PORT_DATA_IO_PD(53),
 610         PORT_DATA_IO_PD(54),            PORT_DATA_IO_PU_PD(55),
 611         PORT_DATA_IO_PU_PD(56),         PORT_DATA_IO_PU_PD(57),
 612         PORT_DATA_IO_PU_PD(58),         PORT_DATA_IO_PU_PD(59),
 613
 614         PORT_DATA_IO_PU_PD(60),         PORT_DATA_IO_PD(61),
 615         PORT_DATA_IO_PD(62),            PORT_DATA_IO_PD(63),
 616         PORT_DATA_IO_PD(64),            PORT_DATA_IO_PD(65),
 617         PORT_DATA_IO_PU_PD(66),         PORT_DATA_IO_PU_PD(67),
 618         PORT_DATA_IO_PU_PD(68),         PORT_DATA_IO_PU_PD(69),
 619
 620         PORT_DATA_IO_PU_PD(70),         PORT_DATA_IO_PU_PD(71),
 621         PORT_DATA_IO_PU_PD(72),         PORT_DATA_IO_PU_PD(73),
 622         PORT_DATA_IO_PU_PD(74),         PORT_DATA_IO_PU_PD(75),
 623         PORT_DATA_IO_PU_PD(76),         PORT_DATA_IO_PU_PD(77),
 624         PORT_DATA_IO_PU_PD(78),         PORT_DATA_IO_PU_PD(79),
 625
 626         PORT_DATA_IO_PU_PD(80),         PORT_DATA_IO_PU_PD(81),
 627         PORT_DATA_IO(82),               PORT_DATA_IO_PU_PD(83),
 628         PORT_DATA_IO(84),               PORT_DATA_IO_PD(85),
 629         PORT_DATA_IO_PD(86),            PORT_DATA_IO_PD(87),
 630         PORT_DATA_IO_PD(88),            PORT_DATA_IO_PD(89),
 631
 632         PORT_DATA_IO_PD(90),            PORT_DATA_IO_PU_PD(91),
 633         PORT_DATA_IO_PU_PD(92),         PORT_DATA_IO_PU_PD(93),
 634         PORT_DATA_IO_PU_PD(94),         PORT_DATA_IO_PU_PD(95),
 635         PORT_DATA_IO_PU_PD(96),         PORT_DATA_IO_PU_PD(97),
 636         PORT_DATA_IO_PU_PD(98),         PORT_DATA_IO_PU_PD(99),
 637
 638         PORT_DATA_IO_PU_PD(100),        PORT_DATA_IO(101),
 639         PORT_DATA_IO_PU(102),           PORT_DATA_IO_PU_PD(103),
 640         PORT_DATA_IO_PU(104),           PORT_DATA_IO_PU(105),
 641         PORT_DATA_IO_PU_PD(106),        PORT_DATA_IO(107),
 642         PORT_DATA_IO(108),              PORT_DATA_IO(109),
 643
 644         PORT_DATA_IO(110),              PORT_DATA_IO(111),
 645         PORT_DATA_IO(112),              PORT_DATA_IO(113),
 646         PORT_DATA_IO_PU_PD(114),        PORT_DATA_IO(115),
 647         PORT_DATA_IO_PD(116),           PORT_DATA_IO_PD(117),
 648         PORT_DATA_IO_PD(118),           PORT_DATA_IO_PD(119),
 649
 650         PORT_DATA_IO_PD(120),           PORT_DATA_IO_PD(121),
 651         PORT_DATA_IO_PD(122),           PORT_DATA_IO_PD(123),
 652         PORT_DATA_IO_PD(124),           PORT_DATA_IO(125),
 653         PORT_DATA_IO(126),              PORT_DATA_IO(127),
 654         PORT_DATA_IO(128),              PORT_DATA_IO(129),
 655
 656         PORT_DATA_IO(130),              PORT_DATA_IO(131),
 657         PORT_DATA_IO(132),              PORT_DATA_IO(133),
 658         PORT_DATA_IO(134),              PORT_DATA_IO(135),
 659         PORT_DATA_IO(136),              PORT_DATA_IO(137),
 660         PORT_DATA_IO(138),              PORT_DATA_IO(139),
 661
 662         PORT_DATA_IO(140),              PORT_DATA_IO(141),
 663         PORT_DATA_IO_PU(142),           PORT_DATA_IO_PU(143),
 664         PORT_DATA_IO_PU(144),           PORT_DATA_IO_PU(145),
 665         PORT_DATA_IO_PU(146),           PORT_DATA_IO_PU(147),
 666         PORT_DATA_IO_PU(148),           PORT_DATA_IO_PU(149),
 667
 668         PORT_DATA_IO_PU(150),           PORT_DATA_IO_PU(151),
 669         PORT_DATA_IO_PU(152),           PORT_DATA_IO_PU(153),
 670         PORT_DATA_IO_PU(154),           PORT_DATA_IO_PU(155),
 671         PORT_DATA_IO_PU(156),           PORT_DATA_IO_PU(157),
 672         PORT_DATA_IO_PD(158),           PORT_DATA_IO_PD(159),
 673
 674         PORT_DATA_IO_PU_PD(160),        PORT_DATA_IO_PD(161),
 675         PORT_DATA_IO_PD(162),           PORT_DATA_IO_PD(163),
 676         PORT_DATA_IO_PD(164),           PORT_DATA_IO_PD(165),
 677         PORT_DATA_IO_PU(166),           PORT_DATA_IO_PU(167),
 678         PORT_DATA_IO_PU(168),           PORT_DATA_IO_PU(169),
 679
 680         PORT_DATA_IO_PU(170),           PORT_DATA_IO_PU(171),
 681         PORT_DATA_IO_PD(172),           PORT_DATA_IO_PD(173),
 682         PORT_DATA_IO_PD(174),           PORT_DATA_IO_PD(175),
 683         PORT_DATA_IO_PU(176),           PORT_DATA_IO_PU_PD(177),
 684         PORT_DATA_IO_PU(178),           PORT_DATA_IO_PD(179),
 685
 686         PORT_DATA_IO_PD(180),           PORT_DATA_IO_PU(181),
 687         PORT_DATA_IO_PU(182),           PORT_DATA_IO(183),
 688         PORT_DATA_IO_PD(184),           PORT_DATA_IO_PD(185),
 689         PORT_DATA_IO_PD(186),           PORT_DATA_IO_PD(187),
 690         PORT_DATA_IO_PD(188),           PORT_DATA_IO_PD(189),
 691
 692         PORT_DATA_IO_PD(190),           PORT_DATA_IO_PD(191),
 693         PORT_DATA_IO_PD(192),           PORT_DATA_IO_PU_PD(193),
 694         PORT_DATA_IO_PU_PD(194),        PORT_DATA_IO_PD(195),
 695         PORT_DATA_IO_PU_PD(196),        PORT_DATA_IO_PD(197),
 696         PORT_DATA_IO_PU_PD(198),        PORT_DATA_IO_PU_PD(199),
 697
 698         PORT_DATA_IO_PU_PD(200),        PORT_DATA_IO_PU(201),
 699         PORT_DATA_IO_PU_PD(202),        PORT_DATA_IO(203),
 700         PORT_DATA_IO_PU_PD(204),        PORT_DATA_IO_PU_PD(205),
 701         PORT_DATA_IO_PU_PD(206),        PORT_DATA_IO_PU_PD(207),
 702         PORT_DATA_IO_PU_PD(208),        PORT_DATA_IO_PD(209),
 703
 704         PORT_DATA_IO_PD(210),           PORT_DATA_IO_PD(211),
 705
 706         /* Port0 */
 707         PINMUX_DATA(DBGMDT2_MARK,               PORT0_FN1),
 708         PINMUX_DATA(FSIAISLD_PORT0_MARK,        PORT0_FN2,      MSEL5CR_3_0),
 709         PINMUX_DATA(FSIAOSLD1_MARK,             PORT0_FN3),
 710         PINMUX_DATA(LCD0_D22_PORT0_MARK,        PORT0_FN4,      MSEL5CR_6_0),
 711         PINMUX_DATA(SCIFA7_RXD_MARK,            PORT0_FN6),
 712         PINMUX_DATA(LCD1_D4_MARK,               PORT0_FN7),
 713         PINMUX_DATA(IRQ5_PORT0_MARK,            PORT0_FN0,      MSEL1CR_5_0),
 714
 715         /* Port1 */
 716         PINMUX_DATA(DBGMDT1_MARK,               PORT1_FN1),
 717         PINMUX_DATA(FMSISLD_PORT1_MARK,         PORT1_FN2,      MSEL5CR_5_0),
 718         PINMUX_DATA(FSIAOSLD2_MARK,             PORT1_FN3),
 719         PINMUX_DATA(LCD0_D23_PORT1_MARK,        PORT1_FN4,      MSEL5CR_6_0),
 720         PINMUX_DATA(SCIFA7_TXD_MARK,            PORT1_FN6),
 721         PINMUX_DATA(LCD1_D3_MARK,               PORT1_FN7),
 722         PINMUX_DATA(IRQ5_PORT1_MARK,            PORT1_FN0,      MSEL1CR_5_1),
 723
 724         /* Port2 */
 725         PINMUX_DATA(DBGMDT0_MARK,               PORT2_FN1),
 726         PINMUX_DATA(SCIFB_SCK_PORT2_MARK,       PORT2_FN2,      MSEL5CR_17_1),
 727         PINMUX_DATA(LCD0_D21_PORT2_MARK,        PORT2_FN4,      MSEL5CR_6_0),
 728         PINMUX_DATA(LCD1_D2_MARK,               PORT2_FN7),
 729         PINMUX_DATA(IRQ0_PORT2_MARK,            PORT2_FN0,      MSEL1CR_0_1),
 730
 731         /* Port3 */
 732         PINMUX_DATA(DBGMD21_MARK,               PORT3_FN1),
 733         PINMUX_DATA(SCIFB_RXD_PORT3_MARK,       PORT3_FN2,      MSEL5CR_17_1),
 734         PINMUX_DATA(LCD0_D20_PORT3_MARK,        PORT3_FN4,      MSEL5CR_6_0),
 735         PINMUX_DATA(LCD1_D1_MARK,               PORT3_FN7),
 736
 737         /* Port4 */
 738         PINMUX_DATA(DBGMD20_MARK,               PORT4_FN1),
 739         PINMUX_DATA(SCIFB_TXD_PORT4_MARK,       PORT4_FN2,      MSEL5CR_17_1),
 740         PINMUX_DATA(LCD0_D19_PORT4_MARK,        PORT4_FN4,      MSEL5CR_6_0),
 741         PINMUX_DATA(LCD1_D0_MARK,               PORT4_FN7),
 742
 743         /* Port5 */
 744         PINMUX_DATA(DBGMD11_MARK,               PORT5_FN1),
 745         PINMUX_DATA(BBIF2_TXD2_PORT5_MARK,      PORT5_FN2,      MSEL5CR_0_0),
 746         PINMUX_DATA(FSIAISLD_PORT5_MARK,        PORT5_FN4,      MSEL5CR_3_1),
 747         PINMUX_DATA(RSPI_SSL0_A_MARK,           PORT5_FN6),
 748         PINMUX_DATA(LCD1_VCPWC_MARK,            PORT5_FN7),
 749
 750         /* Port6 */
 751         PINMUX_DATA(DBGMD10_MARK,               PORT6_FN1),
 752         PINMUX_DATA(BBIF2_TSYNC2_PORT6_MARK,    PORT6_FN2,      MSEL5CR_0_0),
 753         PINMUX_DATA(FMSISLD_PORT6_MARK,         PORT6_FN4,      MSEL5CR_5_1),
 754         PINMUX_DATA(RSPI_SSL1_A_MARK,           PORT6_FN6),
 755         PINMUX_DATA(LCD1_VEPWC_MARK,            PORT6_FN7),
 756
 757         /* Port7 */
 758         PINMUX_DATA(FSIAOLR_MARK,               PORT7_FN1),
 759
 760         /* Port8 */
 761         PINMUX_DATA(FSIAOBT_MARK,               PORT8_FN1),
 762
 763         /* Port9 */
 764         PINMUX_DATA(FSIAOSLD_MARK,              PORT9_FN1),
 765         PINMUX_DATA(FSIASPDIF_PORT9_MARK,       PORT9_FN2,      MSEL5CR_4_0),
 766
 767         /* Port10 */
 768         PINMUX_DATA(FSIAOMC_MARK,               PORT10_FN1),
 769         PINMUX_DATA(SCIFA5_RXD_PORT10_MARK,     PORT10_FN3,     MSEL5CR_14_0,   MSEL5CR_15_0),
 770         PINMUX_DATA(IRQ3_PORT10_MARK,           PORT10_FN0,     MSEL1CR_3_0),
 771
 772         /* Port11 */
 773         PINMUX_DATA(FSIACK_MARK,                PORT11_FN1),
 774         PINMUX_DATA(IRQ2_PORT11_MARK,           PORT11_FN0,     MSEL1CR_2_0),
 775
 776         /* Port12 */
 777         PINMUX_DATA(FSIAILR_MARK,               PORT12_FN1),
 778         PINMUX_DATA(SCIFA4_RXD_PORT12_MARK,     PORT12_FN2,     MSEL5CR_12_0,   MSEL5CR_11_0),
 779         PINMUX_DATA(LCD1_RS_MARK,               PORT12_FN6),
 780         PINMUX_DATA(LCD1_DISP_MARK,             PORT12_FN7),
 781         PINMUX_DATA(IRQ2_PORT12_MARK,           PORT12_FN0,     MSEL1CR_2_1),
 782
 783         /* Port13 */
 784         PINMUX_DATA(FSIAIBT_MARK,               PORT13_FN1),
 785         PINMUX_DATA(SCIFA4_TXD_PORT13_MARK,     PORT13_FN2,     MSEL5CR_12_0,   MSEL5CR_11_0),
 786         PINMUX_DATA(LCD1_RD_MARK,               PORT13_FN7),
 787         PINMUX_DATA(IRQ0_PORT13_MARK,           PORT13_FN0,     MSEL1CR_0_0),
 788
 789         /* Port14 */
 790         PINMUX_DATA(FMSOILR_MARK,               PORT14_FN1),
 791         PINMUX_DATA(FMSIILR_MARK,               PORT14_FN2),
 792         PINMUX_DATA(VIO_CKO1_MARK,              PORT14_FN3),
 793         PINMUX_DATA(LCD1_D23_MARK,              PORT14_FN7),
 794         PINMUX_DATA(IRQ3_PORT14_MARK,           PORT14_FN0,     MSEL1CR_3_1),
 795
 796         /* Port15 */
 797         PINMUX_DATA(FMSOIBT_MARK,               PORT15_FN1),
 798         PINMUX_DATA(FMSIIBT_MARK,               PORT15_FN2),
 799         PINMUX_DATA(VIO_CKO2_MARK,              PORT15_FN3),
 800         PINMUX_DATA(LCD1_D22_MARK,              PORT15_FN7),
 801         PINMUX_DATA(IRQ4_PORT15_MARK,           PORT15_FN0,     MSEL1CR_4_0),
 802
 803         /* Port16 */
 804         PINMUX_DATA(FMSOOLR_MARK,               PORT16_FN1),
 805         PINMUX_DATA(FMSIOLR_MARK,               PORT16_FN2),
 806
 807         /* Port17 */
 808         PINMUX_DATA(FMSOOBT_MARK,               PORT17_FN1),
 809         PINMUX_DATA(FMSIOBT_MARK,               PORT17_FN2),
 810
 811         /* Port18 */
 812         PINMUX_DATA(FMSOSLD_MARK,               PORT18_FN1),
 813         PINMUX_DATA(FSIASPDIF_PORT18_MARK,      PORT18_FN2,     MSEL5CR_4_1),
 814
 815         /* Port19 */
 816         PINMUX_DATA(FMSICK_MARK,                PORT19_FN1),
 817         PINMUX_DATA(CS5A_PORT19_MARK,           PORT19_FN7,     MSEL5CR_2_1),
 818         PINMUX_DATA(IRQ10_MARK,                 PORT19_FN0),
 819
 820         /* Port20 */
 821         PINMUX_DATA(FMSOCK_MARK,                PORT20_FN1),
 822         PINMUX_DATA(SCIFA5_TXD_PORT20_MARK,     PORT20_FN3,     MSEL5CR_15_0,   MSEL5CR_14_0),
 823         PINMUX_DATA(IRQ1_MARK,                  PORT20_FN0),
 824
 825         /* Port21 */
 826         PINMUX_DATA(SCIFA1_CTS_MARK,            PORT21_FN1),
 827         PINMUX_DATA(SCIFA4_SCK_PORT21_MARK,     PORT21_FN2,     MSEL5CR_10_0),
 828         PINMUX_DATA(TPU0TO1_MARK,               PORT21_FN4),
 829         PINMUX_DATA(VIO1_FIELD_MARK,            PORT21_FN5),
 830         PINMUX_DATA(STP0_IPD5_MARK,             PORT21_FN6),
 831         PINMUX_DATA(LCD1_D10_MARK,              PORT21_FN7),
 832
 833         /* Port22 */
 834         PINMUX_DATA(SCIFA2_SCK_PORT22_MARK,     PORT22_FN1,     MSEL5CR_7_0),
 835         PINMUX_DATA(SIM_D_PORT22_MARK,          PORT22_FN4,     MSEL5CR_21_0),
 836         PINMUX_DATA(VIO0_D13_PORT22_MARK,       PORT22_FN7,     MSEL5CR_27_1),
 837
 838         /* Port23 */
 839         PINMUX_DATA(SCIFA1_RTS_MARK,            PORT23_FN1),
 840         PINMUX_DATA(SCIFA5_SCK_PORT23_MARK,     PORT23_FN3,     MSEL5CR_13_0),
 841         PINMUX_DATA(TPU0TO0_MARK,               PORT23_FN4),
 842         PINMUX_DATA(VIO_CKO_1_MARK,             PORT23_FN5),
 843         PINMUX_DATA(STP0_IPD2_MARK,             PORT23_FN6),
 844         PINMUX_DATA(LCD1_D7_MARK,               PORT23_FN7),
 845
 846         /* Port24 */
 847         PINMUX_DATA(VIO0_D15_PORT24_MARK,       PORT24_FN1,     MSEL5CR_27_0),
 848         PINMUX_DATA(VIO1_D7_MARK,               PORT24_FN5),
 849         PINMUX_DATA(SCIFA6_SCK_MARK,            PORT24_FN6),
 850         PINMUX_DATA(SDHI2_CD_PORT24_MARK,       PORT24_FN7,     MSEL5CR_19_0),
 851
 852         /* Port25 */
 853         PINMUX_DATA(VIO0_D14_PORT25_MARK,       PORT25_FN1,     MSEL5CR_27_0),
 854         PINMUX_DATA(VIO1_D6_MARK,               PORT25_FN5),
 855         PINMUX_DATA(SCIFA6_RXD_MARK,            PORT25_FN6),
 856         PINMUX_DATA(SDHI2_WP_PORT25_MARK,       PORT25_FN7,     MSEL5CR_19_0),
 857
 858         /* Port26 */
 859         PINMUX_DATA(VIO0_D13_PORT26_MARK,       PORT26_FN1,     MSEL5CR_27_0),
 860         PINMUX_DATA(VIO1_D5_MARK,               PORT26_FN5),
 861         PINMUX_DATA(SCIFA6_TXD_MARK,            PORT26_FN6),
 862
 863         /* Port27 - Port39 Function */
 864         PINMUX_DATA(VIO0_D7_MARK,               PORT27_FN1),
 865         PINMUX_DATA(VIO0_D6_MARK,               PORT28_FN1),
 866         PINMUX_DATA(VIO0_D5_MARK,               PORT29_FN1),
 867         PINMUX_DATA(VIO0_D4_MARK,               PORT30_FN1),
 868         PINMUX_DATA(VIO0_D3_MARK,               PORT31_FN1),
 869         PINMUX_DATA(VIO0_D2_MARK,               PORT32_FN1),
 870         PINMUX_DATA(VIO0_D1_MARK,               PORT33_FN1),
 871         PINMUX_DATA(VIO0_D0_MARK,               PORT34_FN1),
 872         PINMUX_DATA(VIO0_CLK_MARK,              PORT35_FN1),
 873         PINMUX_DATA(VIO_CKO_MARK,               PORT36_FN1),
 874         PINMUX_DATA(VIO0_HD_MARK,               PORT37_FN1),
 875         PINMUX_DATA(VIO0_FIELD_MARK,            PORT38_FN1),
 876         PINMUX_DATA(VIO0_VD_MARK,               PORT39_FN1),
 877
 878         /* Port38 IRQ */
 879         PINMUX_DATA(IRQ25_MARK,                 PORT38_FN0),
 880
 881         /* Port40 */
 882         PINMUX_DATA(LCD0_D18_PORT40_MARK,       PORT40_FN4,     MSEL5CR_6_0),
 883         PINMUX_DATA(RSPI_CK_A_MARK,             PORT40_FN6),
 884         PINMUX_DATA(LCD1_LCLK_MARK,             PORT40_FN7),
 885
 886         /* Port41 */
 887         PINMUX_DATA(LCD0_D17_MARK,              PORT41_FN1),
 888         PINMUX_DATA(MSIOF2_SS1_MARK,            PORT41_FN2),
 889         PINMUX_DATA(IRQ31_PORT41_MARK,          PORT41_FN0,     MSEL1CR_31_1),
 890
 891         /* Port42 */
 892         PINMUX_DATA(LCD0_D16_MARK,              PORT42_FN1),
 893         PINMUX_DATA(MSIOF2_MCK1_MARK,           PORT42_FN2),
 894         PINMUX_DATA(IRQ12_PORT42_MARK,          PORT42_FN0,     MSEL1CR_12_1),
 895
 896         /* Port43 */
 897         PINMUX_DATA(LCD0_D15_MARK,              PORT43_FN1),
 898         PINMUX_DATA(MSIOF2_MCK0_MARK,           PORT43_FN2),
 899         PINMUX_DATA(KEYIN0_PORT43_MARK,         PORT43_FN3,     MSEL4CR_18_0),
 900         PINMUX_DATA(DV_D15_MARK,                PORT43_FN6),
 901
 902         /* Port44 */
 903         PINMUX_DATA(LCD0_D14_MARK,              PORT44_FN1),
 904         PINMUX_DATA(MSIOF2_RSYNC_MARK,          PORT44_FN2),
 905         PINMUX_DATA(KEYIN1_PORT44_MARK,         PORT44_FN3,     MSEL4CR_18_0),
 906         PINMUX_DATA(DV_D14_MARK,                PORT44_FN6),
 907
 908         /* Port45 */
 909         PINMUX_DATA(LCD0_D13_MARK,              PORT45_FN1),
 910         PINMUX_DATA(MSIOF2_RSCK_MARK,           PORT45_FN2),
 911         PINMUX_DATA(KEYIN2_PORT45_MARK,         PORT45_FN3,     MSEL4CR_18_0),
 912         PINMUX_DATA(DV_D13_MARK,                PORT45_FN6),
 913
 914         /* Port46 */
 915         PINMUX_DATA(LCD0_D12_MARK,              PORT46_FN1),
 916         PINMUX_DATA(KEYIN3_PORT46_MARK,         PORT46_FN3,     MSEL4CR_18_0),
 917         PINMUX_DATA(DV_D12_MARK,                PORT46_FN6),
 918
 919         /* Port47 */
 920         PINMUX_DATA(LCD0_D11_MARK,              PORT47_FN1),
 921         PINMUX_DATA(KEYIN4_MARK,                PORT47_FN3),
 922         PINMUX_DATA(DV_D11_MARK,                PORT47_FN6),
 923
 924         /* Port48 */
 925         PINMUX_DATA(LCD0_D10_MARK,              PORT48_FN1),
 926         PINMUX_DATA(KEYIN5_MARK,                PORT48_FN3),
 927         PINMUX_DATA(DV_D10_MARK,                PORT48_FN6),
 928
 929         /* Port49 */
 930         PINMUX_DATA(LCD0_D9_MARK,               PORT49_FN1),
 931         PINMUX_DATA(KEYIN6_MARK,                PORT49_FN3),
 932         PINMUX_DATA(DV_D9_MARK,                 PORT49_FN6),
 933         PINMUX_DATA(IRQ30_PORT49_MARK,          PORT49_FN0,     MSEL1CR_30_1),
 934
 935         /* Port50 */
 936         PINMUX_DATA(LCD0_D8_MARK,               PORT50_FN1),
 937         PINMUX_DATA(KEYIN7_MARK,                PORT50_FN3),
 938         PINMUX_DATA(DV_D8_MARK,                 PORT50_FN6),
 939         PINMUX_DATA(IRQ29_PORT50_MARK,          PORT50_FN0,     MSEL1CR_29_1),
 940
 941         /* Port51 */
 942         PINMUX_DATA(LCD0_D7_MARK,               PORT51_FN1),
 943         PINMUX_DATA(KEYOUT0_MARK,               PORT51_FN3),
 944         PINMUX_DATA(DV_D7_MARK,                 PORT51_FN6),
 945
 946         /* Port52 */
 947         PINMUX_DATA(LCD0_D6_MARK,               PORT52_FN1),
 948         PINMUX_DATA(KEYOUT1_MARK,               PORT52_FN3),
 949         PINMUX_DATA(DV_D6_MARK,                 PORT52_FN6),
 950
 951         /* Port53 */
 952         PINMUX_DATA(LCD0_D5_MARK,               PORT53_FN1),
 953         PINMUX_DATA(KEYOUT2_MARK,               PORT53_FN3),
 954         PINMUX_DATA(DV_D5_MARK,                 PORT53_FN6),
 955
 956         /* Port54 */
 957         PINMUX_DATA(LCD0_D4_MARK,               PORT54_FN1),
 958         PINMUX_DATA(KEYOUT3_MARK,               PORT54_FN3),
 959         PINMUX_DATA(DV_D4_MARK,                 PORT54_FN6),
 960
 961         /* Port55 */
 962         PINMUX_DATA(LCD0_D3_MARK,               PORT55_FN1),
 963         PINMUX_DATA(KEYOUT4_MARK,               PORT55_FN3),
 964         PINMUX_DATA(KEYIN3_PORT55_MARK,         PORT55_FN4,     MSEL4CR_18_1),
 965         PINMUX_DATA(DV_D3_MARK,                 PORT55_FN6),
 966
 967         /* Port56 */
 968         PINMUX_DATA(LCD0_D2_MARK,               PORT56_FN1),
 969         PINMUX_DATA(KEYOUT5_MARK,               PORT56_FN3),
 970         PINMUX_DATA(KEYIN2_PORT56_MARK,         PORT56_FN4,     MSEL4CR_18_1),
 971         PINMUX_DATA(DV_D2_MARK,                 PORT56_FN6),
 972         PINMUX_DATA(IRQ28_PORT56_MARK,          PORT56_FN0,     MSEL1CR_28_1),
 973
 974         /* Port57 */
 975         PINMUX_DATA(LCD0_D1_MARK,               PORT57_FN1),
 976         PINMUX_DATA(KEYOUT6_MARK,               PORT57_FN3),
 977         PINMUX_DATA(KEYIN1_PORT57_MARK,         PORT57_FN4,     MSEL4CR_18_1),
 978         PINMUX_DATA(DV_D1_MARK,                 PORT57_FN6),
 979         PINMUX_DATA(IRQ27_PORT57_MARK,          PORT57_FN0,     MSEL1CR_27_1),
 980
 981         /* Port58 */
 982         PINMUX_DATA(LCD0_D0_MARK,               PORT58_FN1),
 983         PINMUX_DATA(KEYOUT7_MARK,               PORT58_FN3),
 984         PINMUX_DATA(KEYIN0_PORT58_MARK,         PORT58_FN4,     MSEL4CR_18_1),
 985         PINMUX_DATA(DV_D0_MARK,                 PORT58_FN6),
 986         PINMUX_DATA(IRQ26_PORT58_MARK,          PORT58_FN0,     MSEL1CR_26_1),
 987
 988         /* Port59 */
 989         PINMUX_DATA(LCD0_VCPWC_MARK,            PORT59_FN1),
 990         PINMUX_DATA(BBIF2_TSCK2_PORT59_MARK,    PORT59_FN2,     MSEL5CR_0_0),
 991         PINMUX_DATA(RSPI_MOSI_A_MARK,           PORT59_FN6),
 992
 993         /* Port60 */
 994         PINMUX_DATA(LCD0_VEPWC_MARK,            PORT60_FN1),
 995         PINMUX_DATA(BBIF2_RXD2_PORT60_MARK,     PORT60_FN2,     MSEL5CR_0_0),
 996         PINMUX_DATA(RSPI_MISO_A_MARK,           PORT60_FN6),
 997
 998         /* Port61 */
 999         PINMUX_DATA(LCD0_DON_MARK,              PORT61_FN1),
1000         PINMUX_DATA(MSIOF2_TXD_MARK,            PORT61_FN2),
1001
1002         /* Port62 */
1003         PINMUX_DATA(LCD0_DCK_MARK,              PORT62_FN1),
1004         PINMUX_DATA(LCD0_WR_MARK,               PORT62_FN4),
1005         PINMUX_DATA(DV_CLK_MARK,                PORT62_FN6),
1006         PINMUX_DATA(IRQ15_PORT62_MARK,          PORT62_FN0,     MSEL1CR_15_1),
1007
1008         /* Port63 */
1009         PINMUX_DATA(LCD0_VSYN_MARK,             PORT63_FN1),
1010         PINMUX_DATA(DV_VSYNC_MARK,              PORT63_FN6),
1011         PINMUX_DATA(IRQ14_PORT63_MARK,          PORT63_FN0,     MSEL1CR_14_1),
1012
1013         /* Port64 */
1014         PINMUX_DATA(LCD0_HSYN_MARK,             PORT64_FN1),
1015         PINMUX_DATA(LCD0_CS_MARK,               PORT64_FN4),
1016         PINMUX_DATA(DV_HSYNC_MARK,              PORT64_FN6),
1017         PINMUX_DATA(IRQ13_PORT64_MARK,          PORT64_FN0,     MSEL1CR_13_1),
1018
1019         /* Port65 */
1020         PINMUX_DATA(LCD0_DISP_MARK,             PORT65_FN1),
1021         PINMUX_DATA(MSIOF2_TSCK_MARK,           PORT65_FN2),
1022         PINMUX_DATA(LCD0_RS_MARK,               PORT65_FN4),
1023
1024         /* Port66 */
1025         PINMUX_DATA(MEMC_INT_MARK,              PORT66_FN1),
1026         PINMUX_DATA(TPU0TO2_PORT66_MARK,        PORT66_FN3,     MSEL5CR_25_0),
1027         PINMUX_DATA(MMC0_CLK_PORT66_MARK,       PORT66_FN4,     MSEL4CR_15_0),
1028         PINMUX_DATA(SDHI1_CLK_MARK,             PORT66_FN6),
1029
1030         /* Port67 - Port73 Function1 */
1031         PINMUX_DATA(MEMC_CS0_MARK,              PORT67_FN1),
1032         PINMUX_DATA(MEMC_AD8_MARK,              PORT68_FN1),
1033         PINMUX_DATA(MEMC_AD9_MARK,              PORT69_FN1),
1034         PINMUX_DATA(MEMC_AD10_MARK,             PORT70_FN1),
1035         PINMUX_DATA(MEMC_AD11_MARK,             PORT71_FN1),
1036         PINMUX_DATA(MEMC_AD12_MARK,             PORT72_FN1),
1037         PINMUX_DATA(MEMC_AD13_MARK,             PORT73_FN1),
1038
1039         /* Port67 - Port73 Function2 */
1040         PINMUX_DATA(MSIOF1_SS1_PORT67_MARK,     PORT67_FN2,     MSEL4CR_10_1),
1041         PINMUX_DATA(MSIOF1_RSCK_MARK,           PORT68_FN2),
1042         PINMUX_DATA(MSIOF1_RSYNC_MARK,          PORT69_FN2),
1043         PINMUX_DATA(MSIOF1_MCK0_MARK,           PORT70_FN2),
1044         PINMUX_DATA(MSIOF1_MCK1_MARK,           PORT71_FN2),
1045         PINMUX_DATA(MSIOF1_TSCK_PORT72_MARK,    PORT72_FN2,     MSEL4CR_10_1),
1046         PINMUX_DATA(MSIOF1_TSYNC_PORT73_MARK,   PORT73_FN2,     MSEL4CR_10_1),
1047
1048         /* Port67 - Port73 Function4 */
1049         PINMUX_DATA(MMC0_CMD_PORT67_MARK,       PORT67_FN4,     MSEL4CR_15_0),
1050         PINMUX_DATA(MMC0_D0_PORT68_MARK,        PORT68_FN4,     MSEL4CR_15_0),
1051         PINMUX_DATA(MMC0_D1_PORT69_MARK,        PORT69_FN4,     MSEL4CR_15_0),
1052         PINMUX_DATA(MMC0_D2_PORT70_MARK,        PORT70_FN4,     MSEL4CR_15_0),
1053         PINMUX_DATA(MMC0_D3_PORT71_MARK,        PORT71_FN4,     MSEL4CR_15_0),
1054         PINMUX_DATA(MMC0_D4_PORT72_MARK,        PORT72_FN4,     MSEL4CR_15_0),
1055         PINMUX_DATA(MMC0_D5_PORT73_MARK,        PORT73_FN4,     MSEL4CR_15_0),
1056
1057         /* Port67 - Port73 Function6 */
1058         PINMUX_DATA(SDHI1_CMD_MARK,             PORT67_FN6),
1059         PINMUX_DATA(SDHI1_D0_MARK,              PORT68_FN6),
1060         PINMUX_DATA(SDHI1_D1_MARK,              PORT69_FN6),
1061         PINMUX_DATA(SDHI1_D2_MARK,              PORT70_FN6),
1062         PINMUX_DATA(SDHI1_D3_MARK,              PORT71_FN6),
1063         PINMUX_DATA(SDHI1_CD_MARK,              PORT72_FN6),
1064         PINMUX_DATA(SDHI1_WP_MARK,              PORT73_FN6),
1065
1066         /* Port67 - Port71 IRQ */
1067         PINMUX_DATA(IRQ20_MARK,                 PORT67_FN0),
1068         PINMUX_DATA(IRQ16_PORT68_MARK,          PORT68_FN0,     MSEL1CR_16_0),
1069         PINMUX_DATA(IRQ17_MARK,                 PORT69_FN0),
1070         PINMUX_DATA(IRQ18_MARK,                 PORT70_FN0),
1071         PINMUX_DATA(IRQ19_MARK,                 PORT71_FN0),
1072
1073         /* Port74 */
1074         PINMUX_DATA(MEMC_AD14_MARK,             PORT74_FN1),
1075         PINMUX_DATA(MSIOF1_TXD_PORT74_MARK,     PORT74_FN2,     MSEL4CR_10_1),
1076         PINMUX_DATA(MMC0_D6_PORT74_MARK,        PORT74_FN4,     MSEL4CR_15_0),
1077         PINMUX_DATA(STP1_IPD7_MARK,             PORT74_FN6),
1078         PINMUX_DATA(LCD1_D21_MARK,              PORT74_FN7),
1079
1080         /* Port75 */
1081         PINMUX_DATA(MEMC_AD15_MARK,             PORT75_FN1),
1082         PINMUX_DATA(MSIOF1_RXD_PORT75_MARK,     PORT75_FN2,     MSEL4CR_10_1),
1083         PINMUX_DATA(MMC0_D7_PORT75_MARK,        PORT75_FN4,     MSEL4CR_15_0),
1084         PINMUX_DATA(STP1_IPD6_MARK,             PORT75_FN6),
1085         PINMUX_DATA(LCD1_D20_MARK,              PORT75_FN7),
1086
1087         /* Port76 - Port80 Function */
1088         PINMUX_DATA(SDHI0_CMD_MARK,             PORT76_FN1),
1089         PINMUX_DATA(SDHI0_D0_MARK,              PORT77_FN1),
1090         PINMUX_DATA(SDHI0_D1_MARK,              PORT78_FN1),
1091         PINMUX_DATA(SDHI0_D2_MARK,              PORT79_FN1),
1092         PINMUX_DATA(SDHI0_D3_MARK,              PORT80_FN1),
1093
1094         /* Port81 */
1095         PINMUX_DATA(SDHI0_CD_MARK,              PORT81_FN1),
1096         PINMUX_DATA(IRQ26_PORT81_MARK,          PORT81_FN0,     MSEL1CR_26_0),
1097
1098         /* Port82 - Port88 Function */
1099         PINMUX_DATA(SDHI0_CLK_MARK,             PORT82_FN1),
1100         PINMUX_DATA(SDHI0_WP_MARK,              PORT83_FN1),
1101         PINMUX_DATA(RESETOUTS_MARK,             PORT84_FN1),
1102         PINMUX_DATA(USB0_PPON_MARK,             PORT85_FN1),
1103         PINMUX_DATA(USB0_OCI_MARK,              PORT86_FN1),
1104         PINMUX_DATA(USB1_PPON_MARK,             PORT87_FN1),
1105         PINMUX_DATA(USB1_OCI_MARK,              PORT88_FN1),
1106
1107         /* Port89 */
1108         PINMUX_DATA(DREQ0_MARK,                 PORT89_FN1),
1109         PINMUX_DATA(BBIF2_TSCK2_PORT89_MARK,    PORT89_FN2,     MSEL5CR_0_1),
1110         PINMUX_DATA(RSPI_SSL3_A_MARK,           PORT89_FN6),
1111
1112         /* Port90 */
1113         PINMUX_DATA(DACK0_MARK,                 PORT90_FN1),
1114         PINMUX_DATA(BBIF2_RXD2_PORT90_MARK,     PORT90_FN2,     MSEL5CR_0_1),
1115         PINMUX_DATA(RSPI_SSL2_A_MARK,           PORT90_FN6),
1116         PINMUX_DATA(WAIT_PORT90_MARK,           PORT90_FN7,     MSEL5CR_2_1),
1117
1118         /* Port91 */
1119         PINMUX_DATA(MEMC_AD0_MARK,              PORT91_FN1),
1120         PINMUX_DATA(BBIF1_RXD_MARK,             PORT91_FN2),
1121         PINMUX_DATA(SCIFA5_TXD_PORT91_MARK,     PORT91_FN3,     MSEL5CR_15_1,   MSEL5CR_14_0),
1122         PINMUX_DATA(LCD1_D5_MARK,               PORT91_FN7),
1123
1124         /* Port92 */
1125         PINMUX_DATA(MEMC_AD1_MARK,              PORT92_FN1),
1126         PINMUX_DATA(BBIF1_TSYNC_MARK,           PORT92_FN2),
1127         PINMUX_DATA(SCIFA5_RXD_PORT92_MARK,     PORT92_FN3,     MSEL5CR_15_1,   MSEL5CR_14_0),
1128         PINMUX_DATA(STP0_IPD1_MARK,             PORT92_FN6),
1129         PINMUX_DATA(LCD1_D6_MARK,               PORT92_FN7),
1130
1131         /* Port93 */
1132         PINMUX_DATA(MEMC_AD2_MARK,              PORT93_FN1),
1133         PINMUX_DATA(BBIF1_TSCK_MARK,            PORT93_FN2),
1134         PINMUX_DATA(SCIFA4_TXD_PORT93_MARK,     PORT93_FN3,     MSEL5CR_12_1,   MSEL5CR_11_0),
1135         PINMUX_DATA(STP0_IPD3_MARK,             PORT93_FN6),
1136         PINMUX_DATA(LCD1_D8_MARK,               PORT93_FN7),
1137
1138         /* Port94 */
1139         PINMUX_DATA(MEMC_AD3_MARK,              PORT94_FN1),
1140         PINMUX_DATA(BBIF1_TXD_MARK,             PORT94_FN2),
1141         PINMUX_DATA(SCIFA4_RXD_PORT94_MARK,     PORT94_FN3,     MSEL5CR_12_1,   MSEL5CR_11_0),
1142         PINMUX_DATA(STP0_IPD4_MARK,             PORT94_FN6),
1143         PINMUX_DATA(LCD1_D9_MARK,               PORT94_FN7),
1144
1145         /* Port95 */
1146         PINMUX_DATA(MEMC_CS1_MARK,              PORT95_FN1,     MSEL4CR_6_0),
1147         PINMUX_DATA(MEMC_A1_MARK,               PORT95_FN1,     MSEL4CR_6_1),
1148
1149         PINMUX_DATA(SCIFA2_CTS_MARK,            PORT95_FN2),
1150         PINMUX_DATA(SIM_RST_MARK,               PORT95_FN4),
1151         PINMUX_DATA(VIO0_D14_PORT95_MARK,       PORT95_FN7,     MSEL5CR_27_1),
1152         PINMUX_DATA(IRQ22_MARK,                 PORT95_FN0),
1153
1154         /* Port96 */
1155         PINMUX_DATA(MEMC_ADV_MARK,              PORT96_FN1,     MSEL4CR_6_0),
1156         PINMUX_DATA(MEMC_DREQ0_MARK,            PORT96_FN1,     MSEL4CR_6_1),
1157
1158         PINMUX_DATA(SCIFA2_RTS_MARK,            PORT96_FN2),
1159         PINMUX_DATA(SIM_CLK_MARK,               PORT96_FN4),
1160         PINMUX_DATA(VIO0_D15_PORT96_MARK,       PORT96_FN7,     MSEL5CR_27_1),
1161         PINMUX_DATA(IRQ23_MARK,                 PORT96_FN0),
1162
1163         /* Port97 */
1164         PINMUX_DATA(MEMC_AD4_MARK,              PORT97_FN1),
1165         PINMUX_DATA(BBIF1_RSCK_MARK,            PORT97_FN2),
1166         PINMUX_DATA(LCD1_CS_MARK,               PORT97_FN6),
1167         PINMUX_DATA(LCD1_HSYN_MARK,             PORT97_FN7),
1168         PINMUX_DATA(IRQ12_PORT97_MARK,          PORT97_FN0,     MSEL1CR_12_0),
1169
1170         /* Port98 */
1171         PINMUX_DATA(MEMC_AD5_MARK,              PORT98_FN1),
1172         PINMUX_DATA(BBIF1_RSYNC_MARK,           PORT98_FN2),
1173         PINMUX_DATA(LCD1_VSYN_MARK,             PORT98_FN7),
1174         PINMUX_DATA(IRQ13_PORT98_MARK,          PORT98_FN0,     MSEL1CR_13_0),
1175
1176         /* Port99 */
1177         PINMUX_DATA(MEMC_AD6_MARK,              PORT99_FN1),
1178         PINMUX_DATA(BBIF1_FLOW_MARK,            PORT99_FN2),
1179         PINMUX_DATA(LCD1_WR_MARK,               PORT99_FN6),
1180         PINMUX_DATA(LCD1_DCK_MARK,              PORT99_FN7),
1181         PINMUX_DATA(IRQ14_PORT99_MARK,          PORT99_FN0,     MSEL1CR_14_0),
1182
1183         /* Port100 */
1184         PINMUX_DATA(MEMC_AD7_MARK,              PORT100_FN1),
1185         PINMUX_DATA(BBIF1_RX_FLOW_N_MARK,       PORT100_FN2),
1186         PINMUX_DATA(LCD1_DON_MARK,              PORT100_FN7),
1187         PINMUX_DATA(IRQ15_PORT100_MARK,         PORT100_FN0,    MSEL1CR_15_0),
1188
1189         /* Port101 */
1190         PINMUX_DATA(FCE0_MARK,                  PORT101_FN1),
1191
1192         /* Port102 */
1193         PINMUX_DATA(FRB_MARK,                   PORT102_FN1),
1194         PINMUX_DATA(LCD0_LCLK_PORT102_MARK,     PORT102_FN4,    MSEL5CR_6_0),
1195
1196         /* Port103 */
1197         PINMUX_DATA(CS5B_MARK,                  PORT103_FN1),
1198         PINMUX_DATA(FCE1_MARK,                  PORT103_FN2),
1199         PINMUX_DATA(MMC1_CLK_PORT103_MARK,      PORT103_FN3,    MSEL4CR_15_1),
1200
1201         /* Port104 */
1202         PINMUX_DATA(CS6A_MARK,                  PORT104_FN1),
1203         PINMUX_DATA(MMC1_CMD_PORT104_MARK,      PORT104_FN3,    MSEL4CR_15_1),
1204         PINMUX_DATA(IRQ11_MARK,                 PORT104_FN0),
1205
1206         /* Port105 */
1207         PINMUX_DATA(CS5A_PORT105_MARK,          PORT105_FN1,    MSEL5CR_2_0),
1208         PINMUX_DATA(SCIFA3_RTS_PORT105_MARK,    PORT105_FN4,    MSEL5CR_8_0),
1209
1210         /* Port106 */
1211         PINMUX_DATA(IOIS16_MARK,                PORT106_FN1),
1212         PINMUX_DATA(IDE_EXBUF_ENB_MARK,         PORT106_FN6),
1213
1214         /* Port107 - Port115 Function */
1215         PINMUX_DATA(WE3_ICIOWR_MARK,            PORT107_FN1),
1216         PINMUX_DATA(WE2_ICIORD_MARK,            PORT108_FN1),
1217         PINMUX_DATA(CS0_MARK,                   PORT109_FN1),
1218         PINMUX_DATA(CS2_MARK,                   PORT110_FN1),
1219         PINMUX_DATA(CS4_MARK,                   PORT111_FN1),
1220         PINMUX_DATA(WE1_MARK,                   PORT112_FN1),
1221         PINMUX_DATA(WE0_FWE_MARK,               PORT113_FN1),
1222         PINMUX_DATA(RDWR_MARK,                  PORT114_FN1),
1223         PINMUX_DATA(RD_FSC_MARK,                PORT115_FN1),
1224
1225         /* Port116 */
1226         PINMUX_DATA(A25_MARK,                   PORT116_FN1),
1227         PINMUX_DATA(MSIOF0_SS2_MARK,            PORT116_FN2),
1228         PINMUX_DATA(MSIOF1_SS2_PORT116_MARK,    PORT116_FN3,    MSEL4CR_10_0),
1229         PINMUX_DATA(SCIFA3_SCK_PORT116_MARK,    PORT116_FN4,    MSEL5CR_8_0),
1230         PINMUX_DATA(GPO1_MARK,                  PORT116_FN5),
1231
1232         /* Port117 */
1233         PINMUX_DATA(A24_MARK,                   PORT117_FN1),
1234         PINMUX_DATA(MSIOF0_SS1_MARK,            PORT117_FN2),
1235         PINMUX_DATA(MSIOF1_SS1_PORT117_MARK,    PORT117_FN3,    MSEL4CR_10_0),
1236         PINMUX_DATA(SCIFA3_CTS_PORT117_MARK,    PORT117_FN4,    MSEL5CR_8_0),
1237         PINMUX_DATA(GPO0_MARK,                  PORT117_FN5),
1238
1239         /* Port118 */
1240         PINMUX_DATA(A23_MARK,                   PORT118_FN1),
1241         PINMUX_DATA(MSIOF0_MCK1_MARK,           PORT118_FN2),
1242         PINMUX_DATA(MSIOF1_RXD_PORT118_MARK,    PORT118_FN3,    MSEL4CR_10_0),
1243         PINMUX_DATA(GPI1_MARK,                  PORT118_FN5),
1244         PINMUX_DATA(IRQ9_PORT118_MARK,          PORT118_FN0,    MSEL1CR_9_0),
1245
1246         /* Port119 */
1247         PINMUX_DATA(A22_MARK,                   PORT119_FN1),
1248         PINMUX_DATA(MSIOF0_MCK0_MARK,           PORT119_FN2),
1249         PINMUX_DATA(MSIOF1_TXD_PORT119_MARK,    PORT119_FN3,    MSEL4CR_10_0),
1250         PINMUX_DATA(GPI0_MARK,                  PORT119_FN5),
1251         PINMUX_DATA(IRQ8_MARK,                  PORT119_FN0),
1252
1253         /* Port120 */
1254         PINMUX_DATA(A21_MARK,                   PORT120_FN1),
1255         PINMUX_DATA(MSIOF0_RSYNC_MARK,          PORT120_FN2),
1256         PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK,  PORT120_FN3,    MSEL4CR_10_0),
1257         PINMUX_DATA(IRQ7_PORT120_MARK,          PORT120_FN0,    MSEL1CR_7_0),
1258
1259         /* Port121 */
1260         PINMUX_DATA(A20_MARK,                   PORT121_FN1),
1261         PINMUX_DATA(MSIOF0_RSCK_MARK,           PORT121_FN2),
1262         PINMUX_DATA(MSIOF1_TSCK_PORT121_MARK,   PORT121_FN3,    MSEL4CR_10_0),
1263         PINMUX_DATA(IRQ6_PORT121_MARK,          PORT121_FN0,    MSEL1CR_6_0),
1264
1265         /* Port122 */
1266         PINMUX_DATA(A19_MARK,                   PORT122_FN1),
1267         PINMUX_DATA(MSIOF0_RXD_MARK,            PORT122_FN2),
1268
1269         /* Port123 */
1270         PINMUX_DATA(A18_MARK,                   PORT123_FN1),
1271         PINMUX_DATA(MSIOF0_TSCK_MARK,           PORT123_FN2),
1272
1273         /* Port124 */
1274         PINMUX_DATA(A17_MARK,                   PORT124_FN1),
1275         PINMUX_DATA(MSIOF0_TSYNC_MARK,          PORT124_FN2),
1276
1277         /* Port125 - Port141 Function */
1278         PINMUX_DATA(A16_MARK,                   PORT125_FN1),
1279         PINMUX_DATA(A15_MARK,                   PORT126_FN1),
1280         PINMUX_DATA(A14_MARK,                   PORT127_FN1),
1281         PINMUX_DATA(A13_MARK,                   PORT128_FN1),
1282         PINMUX_DATA(A12_MARK,                   PORT129_FN1),
1283         PINMUX_DATA(A11_MARK,                   PORT130_FN1),
1284         PINMUX_DATA(A10_MARK,                   PORT131_FN1),
1285         PINMUX_DATA(A9_MARK,                    PORT132_FN1),
1286         PINMUX_DATA(A8_MARK,                    PORT133_FN1),
1287         PINMUX_DATA(A7_MARK,                    PORT134_FN1),
1288         PINMUX_DATA(A6_MARK,                    PORT135_FN1),
1289         PINMUX_DATA(A5_FCDE_MARK,               PORT136_FN1),
1290         PINMUX_DATA(A4_FOE_MARK,                PORT137_FN1),
1291         PINMUX_DATA(A3_MARK,                    PORT138_FN1),
1292         PINMUX_DATA(A2_MARK,                    PORT139_FN1),
1293         PINMUX_DATA(A1_MARK,                    PORT140_FN1),
1294         PINMUX_DATA(CKO_MARK,                   PORT141_FN1),
1295
1296         /* Port142 - Port157 Function1 */
1297         PINMUX_DATA(D15_NAF15_MARK,             PORT142_FN1),
1298         PINMUX_DATA(D14_NAF14_MARK,             PORT143_FN1),
1299         PINMUX_DATA(D13_NAF13_MARK,             PORT144_FN1),
1300         PINMUX_DATA(D12_NAF12_MARK,             PORT145_FN1),
1301         PINMUX_DATA(D11_NAF11_MARK,             PORT146_FN1),
1302         PINMUX_DATA(D10_NAF10_MARK,             PORT147_FN1),
1303         PINMUX_DATA(D9_NAF9_MARK,               PORT148_FN1),
1304         PINMUX_DATA(D8_NAF8_MARK,               PORT149_FN1),
1305         PINMUX_DATA(D7_NAF7_MARK,               PORT150_FN1),
1306         PINMUX_DATA(D6_NAF6_MARK,               PORT151_FN1),
1307         PINMUX_DATA(D5_NAF5_MARK,               PORT152_FN1),
1308         PINMUX_DATA(D4_NAF4_MARK,               PORT153_FN1),
1309         PINMUX_DATA(D3_NAF3_MARK,               PORT154_FN1),
1310         PINMUX_DATA(D2_NAF2_MARK,               PORT155_FN1),
1311         PINMUX_DATA(D1_NAF1_MARK,               PORT156_FN1),
1312         PINMUX_DATA(D0_NAF0_MARK,               PORT157_FN1),
1313
1314         /* Port142 - Port149 Function3 */
1315         PINMUX_DATA(MMC1_D7_PORT142_MARK,       PORT142_FN3,    MSEL4CR_15_1),
1316         PINMUX_DATA(MMC1_D6_PORT143_MARK,       PORT143_FN3,    MSEL4CR_15_1),
1317         PINMUX_DATA(MMC1_D5_PORT144_MARK,       PORT144_FN3,    MSEL4CR_15_1),
1318         PINMUX_DATA(MMC1_D4_PORT145_MARK,       PORT145_FN3,    MSEL4CR_15_1),
1319         PINMUX_DATA(MMC1_D3_PORT146_MARK,       PORT146_FN3,    MSEL4CR_15_1),
1320         PINMUX_DATA(MMC1_D2_PORT147_MARK,       PORT147_FN3,    MSEL4CR_15_1),
1321         PINMUX_DATA(MMC1_D1_PORT148_MARK,       PORT148_FN3,    MSEL4CR_15_1),
1322         PINMUX_DATA(MMC1_D0_PORT149_MARK,       PORT149_FN3,    MSEL4CR_15_1),
1323
1324         /* Port158 */
1325         PINMUX_DATA(D31_MARK,                   PORT158_FN1),
1326         PINMUX_DATA(SCIFA3_SCK_PORT158_MARK,    PORT158_FN2,    MSEL5CR_8_1),
1327         PINMUX_DATA(RMII_REF125CK_MARK,         PORT158_FN3),
1328         PINMUX_DATA(LCD0_D21_PORT158_MARK,      PORT158_FN4,    MSEL5CR_6_1),
1329         PINMUX_DATA(IRDA_FIRSEL_MARK,           PORT158_FN5),
1330         PINMUX_DATA(IDE_D15_MARK,               PORT158_FN6),
1331
1332         /* Port159 */
1333         PINMUX_DATA(D30_MARK,                   PORT159_FN1),
1334         PINMUX_DATA(SCIFA3_RXD_PORT159_MARK,    PORT159_FN2,    MSEL5CR_8_1),
1335         PINMUX_DATA(RMII_REF50CK_MARK,          PORT159_FN3),
1336         PINMUX_DATA(LCD0_D23_PORT159_MARK,      PORT159_FN4,    MSEL5CR_6_1),
1337         PINMUX_DATA(IDE_D14_MARK,               PORT159_FN6),
1338
1339         /* Port160 */
1340         PINMUX_DATA(D29_MARK,                   PORT160_FN1),
1341         PINMUX_DATA(SCIFA3_TXD_PORT160_MARK,    PORT160_FN2,    MSEL5CR_8_1),
1342         PINMUX_DATA(LCD0_D22_PORT160_MARK,      PORT160_FN4,    MSEL5CR_6_1),
1343         PINMUX_DATA(VIO1_HD_MARK,               PORT160_FN5),
1344         PINMUX_DATA(IDE_D13_MARK,               PORT160_FN6),
1345
1346         /* Port161 */
1347         PINMUX_DATA(D28_MARK,                   PORT161_FN1),
1348         PINMUX_DATA(SCIFA3_RTS_PORT161_MARK,    PORT161_FN2,    MSEL5CR_8_1),
1349         PINMUX_DATA(ET_RX_DV_MARK,              PORT161_FN3),
1350         PINMUX_DATA(LCD0_D20_PORT161_MARK,      PORT161_FN4,    MSEL5CR_6_1),
1351         PINMUX_DATA(IRDA_IN_MARK,               PORT161_FN5),
1352         PINMUX_DATA(IDE_D12_MARK,               PORT161_FN6),
1353
1354         /* Port162 */
1355         PINMUX_DATA(D27_MARK,                   PORT162_FN1),
1356         PINMUX_DATA(SCIFA3_CTS_PORT162_MARK,    PORT162_FN2,    MSEL5CR_8_1),
1357         PINMUX_DATA(LCD0_D19_PORT162_MARK,      PORT162_FN4,    MSEL5CR_6_1),
1358         PINMUX_DATA(IRDA_OUT_MARK,              PORT162_FN5),
1359         PINMUX_DATA(IDE_D11_MARK,               PORT162_FN6),
1360
1361         /* Port163 */
1362         PINMUX_DATA(D26_MARK,                   PORT163_FN1),
1363         PINMUX_DATA(MSIOF2_SS2_MARK,            PORT163_FN2),
1364         PINMUX_DATA(ET_COL_MARK,                PORT163_FN3),
1365         PINMUX_DATA(LCD0_D18_PORT163_MARK,      PORT163_FN4,    MSEL5CR_6_1),
1366         PINMUX_DATA(IROUT_MARK,                 PORT163_FN5),
1367         PINMUX_DATA(IDE_D10_MARK,               PORT163_FN6),
1368
1369         /* Port164 */
1370         PINMUX_DATA(D25_MARK,                   PORT164_FN1),
1371         PINMUX_DATA(MSIOF2_TSYNC_MARK,          PORT164_FN2),
1372         PINMUX_DATA(ET_PHY_INT_MARK,            PORT164_FN3),
1373         PINMUX_DATA(LCD0_RD_MARK,               PORT164_FN4),
1374         PINMUX_DATA(IDE_D9_MARK,                PORT164_FN6),
1375
1376         /* Port165 */
1377         PINMUX_DATA(D24_MARK,                   PORT165_FN1),
1378         PINMUX_DATA(MSIOF2_RXD_MARK,            PORT165_FN2),
1379         PINMUX_DATA(LCD0_LCLK_PORT165_MARK,     PORT165_FN4,    MSEL5CR_6_1),
1380         PINMUX_DATA(IDE_D8_MARK,                PORT165_FN6),
1381
1382         /* Port166 - Port171 Function1 */
1383         PINMUX_DATA(D21_MARK,                   PORT166_FN1),
1384         PINMUX_DATA(D20_MARK,                   PORT167_FN1),
1385         PINMUX_DATA(D19_MARK,                   PORT168_FN1),
1386         PINMUX_DATA(D18_MARK,                   PORT169_FN1),
1387         PINMUX_DATA(D17_MARK,                   PORT170_FN1),
1388         PINMUX_DATA(D16_MARK,                   PORT171_FN1),
1389
1390         /* Port166 - Port171 Function3 */
1391         PINMUX_DATA(ET_ETXD5_MARK,              PORT166_FN3),
1392         PINMUX_DATA(ET_ETXD4_MARK,              PORT167_FN3),
1393         PINMUX_DATA(ET_ETXD3_MARK,              PORT168_FN3),
1394         PINMUX_DATA(ET_ETXD2_MARK,              PORT169_FN3),
1395         PINMUX_DATA(ET_ETXD1_MARK,              PORT170_FN3),
1396         PINMUX_DATA(ET_ETXD0_MARK,              PORT171_FN3),
1397
1398         /* Port166 - Port171 Function6 */
1399         PINMUX_DATA(IDE_D5_MARK,                PORT166_FN6),
1400         PINMUX_DATA(IDE_D4_MARK,                PORT167_FN6),
1401         PINMUX_DATA(IDE_D3_MARK,                PORT168_FN6),
1402         PINMUX_DATA(IDE_D2_MARK,                PORT169_FN6),
1403         PINMUX_DATA(IDE_D1_MARK,                PORT170_FN6),
1404         PINMUX_DATA(IDE_D0_MARK,                PORT171_FN6),
1405
1406         /* Port167 - Port171 IRQ */
1407         PINMUX_DATA(IRQ31_PORT167_MARK,         PORT167_FN0,    MSEL1CR_31_0),
1408         PINMUX_DATA(IRQ27_PORT168_MARK,         PORT168_FN0,    MSEL1CR_27_0),
1409         PINMUX_DATA(IRQ28_PORT169_MARK,         PORT169_FN0,    MSEL1CR_28_0),
1410         PINMUX_DATA(IRQ29_PORT170_MARK,         PORT170_FN0,    MSEL1CR_29_0),
1411         PINMUX_DATA(IRQ30_PORT171_MARK,         PORT171_FN0,    MSEL1CR_30_0),
1412
1413         /* Port172 */
1414         PINMUX_DATA(D23_MARK,                   PORT172_FN1),
1415         PINMUX_DATA(SCIFB_RTS_PORT172_MARK,     PORT172_FN2,    MSEL5CR_17_1),
1416         PINMUX_DATA(ET_ETXD7_MARK,              PORT172_FN3),
1417         PINMUX_DATA(IDE_D7_MARK,                PORT172_FN6),
1418         PINMUX_DATA(IRQ4_PORT172_MARK,          PORT172_FN0,    MSEL1CR_4_1),
1419
1420         /* Port173 */
1421         PINMUX_DATA(D22_MARK,                   PORT173_FN1),
1422         PINMUX_DATA(SCIFB_CTS_PORT173_MARK,     PORT173_FN2,    MSEL5CR_17_1),
1423         PINMUX_DATA(ET_ETXD6_MARK,              PORT173_FN3),
1424         PINMUX_DATA(IDE_D6_MARK,                PORT173_FN6),
1425         PINMUX_DATA(IRQ6_PORT173_MARK,          PORT173_FN0,    MSEL1CR_6_1),
1426
1427         /* Port174 */
1428         PINMUX_DATA(A26_MARK,                   PORT174_FN1),
1429         PINMUX_DATA(MSIOF0_TXD_MARK,            PORT174_FN2),
1430         PINMUX_DATA(ET_RX_CLK_MARK,             PORT174_FN3),
1431         PINMUX_DATA(SCIFA3_RXD_PORT174_MARK,    PORT174_FN4,    MSEL5CR_8_0),
1432
1433         /* Port175 */
1434         PINMUX_DATA(A0_MARK,                    PORT175_FN1),
1435         PINMUX_DATA(BS_MARK,                    PORT175_FN2),
1436         PINMUX_DATA(ET_WOL_MARK,                PORT175_FN3),
1437         PINMUX_DATA(SCIFA3_TXD_PORT175_MARK,    PORT175_FN4,    MSEL5CR_8_0),
1438
1439         /* Port176 */
1440         PINMUX_DATA(ET_GTX_CLK_MARK,            PORT176_FN3),
1441
1442         /* Port177 */
1443         PINMUX_DATA(WAIT_PORT177_MARK,          PORT177_FN1,    MSEL5CR_2_0),
1444         PINMUX_DATA(ET_LINK_MARK,               PORT177_FN3),
1445         PINMUX_DATA(IDE_IOWR_MARK,              PORT177_FN6),
1446         PINMUX_DATA(SDHI2_WP_PORT177_MARK,      PORT177_FN7,    MSEL5CR_19_1),
1447
1448         /* Port178 */
1449         PINMUX_DATA(VIO0_D12_MARK,              PORT178_FN1),
1450         PINMUX_DATA(VIO1_D4_MARK,               PORT178_FN5),
1451         PINMUX_DATA(IDE_IORD_MARK,              PORT178_FN6),
1452
1453         /* Port179 */
1454         PINMUX_DATA(VIO0_D11_MARK,              PORT179_FN1),
1455         PINMUX_DATA(VIO1_D3_MARK,               PORT179_FN5),
1456         PINMUX_DATA(IDE_IORDY_MARK,             PORT179_FN6),
1457
1458         /* Port180 */
1459         PINMUX_DATA(VIO0_D10_MARK,              PORT180_FN1),
1460         PINMUX_DATA(TPU0TO3_MARK,               PORT180_FN4),
1461         PINMUX_DATA(VIO1_D2_MARK,               PORT180_FN5),
1462         PINMUX_DATA(IDE_INT_MARK,               PORT180_FN6),
1463         PINMUX_DATA(IRQ24_MARK,                 PORT180_FN0),
1464
1465         /* Port181 */
1466         PINMUX_DATA(VIO0_D9_MARK,               PORT181_FN1),
1467         PINMUX_DATA(VIO1_D1_MARK,               PORT181_FN5),
1468         PINMUX_DATA(IDE_RST_MARK,               PORT181_FN6),
1469
1470         /* Port182 */
1471         PINMUX_DATA(VIO0_D8_MARK,               PORT182_FN1),
1472         PINMUX_DATA(VIO1_D0_MARK,               PORT182_FN5),
1473         PINMUX_DATA(IDE_DIRECTION_MARK,         PORT182_FN6),
1474
1475         /* Port183 */
1476         PINMUX_DATA(DREQ1_MARK,                 PORT183_FN1),
1477         PINMUX_DATA(BBIF2_TXD2_PORT183_MARK,    PORT183_FN2,    MSEL5CR_0_1),
1478         PINMUX_DATA(ET_TX_EN_MARK,              PORT183_FN3),
1479
1480         /* Port184 */
1481         PINMUX_DATA(DACK1_MARK,                 PORT184_FN1),
1482         PINMUX_DATA(BBIF2_TSYNC2_PORT184_MARK,  PORT184_FN2,    MSEL5CR_0_1),
1483         PINMUX_DATA(ET_TX_CLK_MARK,             PORT184_FN3),
1484
1485         /* Port185 - Port192 Function1 */
1486         PINMUX_DATA(SCIFA1_SCK_MARK,            PORT185_FN1),
1487         PINMUX_DATA(SCIFB_RTS_PORT186_MARK,     PORT186_FN1,    MSEL5CR_17_0),
1488         PINMUX_DATA(SCIFB_CTS_PORT187_MARK,     PORT187_FN1,    MSEL5CR_17_0),
1489         PINMUX_DATA(SCIFA0_SCK_MARK,            PORT188_FN1),
1490         PINMUX_DATA(SCIFB_SCK_PORT190_MARK,     PORT190_FN1,    MSEL5CR_17_0),
1491         PINMUX_DATA(SCIFB_RXD_PORT191_MARK,     PORT191_FN1,    MSEL5CR_17_0),
1492         PINMUX_DATA(SCIFB_TXD_PORT192_MARK,     PORT192_FN1,    MSEL5CR_17_0),
1493
1494         /* Port185 - Port192 Function3 */
1495         PINMUX_DATA(ET_ERXD0_MARK,              PORT185_FN3),
1496         PINMUX_DATA(ET_ERXD1_MARK,              PORT186_FN3),
1497         PINMUX_DATA(ET_ERXD2_MARK,              PORT187_FN3),
1498         PINMUX_DATA(ET_ERXD3_MARK,              PORT188_FN3),
1499         PINMUX_DATA(ET_ERXD4_MARK,              PORT189_FN3),
1500         PINMUX_DATA(ET_ERXD5_MARK,              PORT190_FN3),
1501         PINMUX_DATA(ET_ERXD6_MARK,              PORT191_FN3),
1502         PINMUX_DATA(ET_ERXD7_MARK,              PORT192_FN3),
1503
1504         /* Port185 - Port192 Function6 */
1505         PINMUX_DATA(STP1_IPCLK_MARK,            PORT185_FN6),
1506         PINMUX_DATA(STP1_IPD0_PORT186_MARK,     PORT186_FN6,    MSEL5CR_23_0),
1507         PINMUX_DATA(STP1_IPEN_PORT187_MARK,     PORT187_FN6,    MSEL5CR_23_0),
1508         PINMUX_DATA(STP1_IPSYNC_MARK,           PORT188_FN6),
1509         PINMUX_DATA(STP0_IPCLK_MARK,            PORT189_FN6),
1510         PINMUX_DATA(STP0_IPD0_MARK,             PORT190_FN6),
1511         PINMUX_DATA(STP0_IPEN_MARK,             PORT191_FN6),
1512         PINMUX_DATA(STP0_IPSYNC_MARK,           PORT192_FN6),
1513
1514         /* Port193 */
1515         PINMUX_DATA(SCIFA0_CTS_MARK,            PORT193_FN1),
1516         PINMUX_DATA(RMII_CRS_DV_MARK,           PORT193_FN3),
1517         PINMUX_DATA(STP1_IPEN_PORT193_MARK,     PORT193_FN6,    MSEL5CR_23_1), /* ? */
1518         PINMUX_DATA(LCD1_D17_MARK,              PORT193_FN7),
1519
1520         /* Port194 */
1521         PINMUX_DATA(SCIFA0_RTS_MARK,            PORT194_FN1),
1522         PINMUX_DATA(RMII_RX_ER_MARK,            PORT194_FN3),
1523         PINMUX_DATA(STP1_IPD0_PORT194_MARK,     PORT194_FN6,    MSEL5CR_23_1), /* ? */
1524         PINMUX_DATA(LCD1_D16_MARK,              PORT194_FN7),
1525
1526         /* Port195 */
1527         PINMUX_DATA(SCIFA1_RXD_MARK,            PORT195_FN1),
1528         PINMUX_DATA(RMII_RXD0_MARK,             PORT195_FN3),
1529         PINMUX_DATA(STP1_IPD3_MARK,             PORT195_FN6),
1530         PINMUX_DATA(LCD1_D15_MARK,              PORT195_FN7),
1531
1532         /* Port196 */
1533         PINMUX_DATA(SCIFA1_TXD_MARK,            PORT196_FN1),
1534         PINMUX_DATA(RMII_RXD1_MARK,             PORT196_FN3),
1535         PINMUX_DATA(STP1_IPD2_MARK,             PORT196_FN6),
1536         PINMUX_DATA(LCD1_D14_MARK,              PORT196_FN7),
1537
1538         /* Port197 */
1539         PINMUX_DATA(SCIFA0_RXD_MARK,            PORT197_FN1),
1540         PINMUX_DATA(VIO1_CLK_MARK,              PORT197_FN5),
1541         PINMUX_DATA(STP1_IPD5_MARK,             PORT197_FN6),
1542         PINMUX_DATA(LCD1_D19_MARK,              PORT197_FN7),
1543
1544         /* Port198 */
1545         PINMUX_DATA(SCIFA0_TXD_MARK,            PORT198_FN1),
1546         PINMUX_DATA(VIO1_VD_MARK,               PORT198_FN5),
1547         PINMUX_DATA(STP1_IPD4_MARK,             PORT198_FN6),
1548         PINMUX_DATA(LCD1_D18_MARK,              PORT198_FN7),
1549
1550         /* Port199 */
1551         PINMUX_DATA(MEMC_NWE_MARK,              PORT199_FN1),
1552         PINMUX_DATA(SCIFA2_SCK_PORT199_MARK,    PORT199_FN2,    MSEL5CR_7_1),
1553         PINMUX_DATA(RMII_TX_EN_MARK,            PORT199_FN3),
1554         PINMUX_DATA(SIM_D_PORT199_MARK,         PORT199_FN4,    MSEL5CR_21_1),
1555         PINMUX_DATA(STP1_IPD1_MARK,             PORT199_FN6),
1556         PINMUX_DATA(LCD1_D13_MARK,              PORT199_FN7),
1557
1558         /* Port200 */
1559         PINMUX_DATA(MEMC_NOE_MARK,              PORT200_FN1),
1560         PINMUX_DATA(SCIFA2_RXD_MARK,            PORT200_FN2),
1561         PINMUX_DATA(RMII_TXD0_MARK,             PORT200_FN3),
1562         PINMUX_DATA(STP0_IPD7_MARK,             PORT200_FN6),
1563         PINMUX_DATA(LCD1_D12_MARK,              PORT200_FN7),
1564
1565         /* Port201 */
1566         PINMUX_DATA(MEMC_WAIT_MARK,             PORT201_FN1,    MSEL4CR_6_0),
1567         PINMUX_DATA(MEMC_DREQ1_MARK,            PORT201_FN1,    MSEL4CR_6_1),
1568
1569         PINMUX_DATA(SCIFA2_TXD_MARK,            PORT201_FN2),
1570         PINMUX_DATA(RMII_TXD1_MARK,             PORT201_FN3),
1571         PINMUX_DATA(STP0_IPD6_MARK,             PORT201_FN6),
1572         PINMUX_DATA(LCD1_D11_MARK,              PORT201_FN7),
1573
1574         /* Port202 */
1575         PINMUX_DATA(MEMC_BUSCLK_MARK,           PORT202_FN1,    MSEL4CR_6_0),
1576         PINMUX_DATA(MEMC_A0_MARK,               PORT202_FN1,    MSEL4CR_6_1),
1577
1578         PINMUX_DATA(MSIOF1_SS2_PORT202_MARK,    PORT202_FN2,    MSEL4CR_10_1),
1579         PINMUX_DATA(RMII_MDC_MARK,              PORT202_FN3),
1580         PINMUX_DATA(TPU0TO2_PORT202_MARK,       PORT202_FN4,    MSEL5CR_25_1),
1581         PINMUX_DATA(IDE_CS0_MARK,               PORT202_FN6),
1582         PINMUX_DATA(SDHI2_CD_PORT202_MARK,      PORT202_FN7,    MSEL5CR_19_1),
1583         PINMUX_DATA(IRQ21_MARK,                 PORT202_FN0),
1584
1585         /* Port203 - Port208 Function1 */
1586         PINMUX_DATA(SDHI2_CLK_MARK,             PORT203_FN1),
1587         PINMUX_DATA(SDHI2_CMD_MARK,             PORT204_FN1),
1588         PINMUX_DATA(SDHI2_D0_MARK,              PORT205_FN1),
1589         PINMUX_DATA(SDHI2_D1_MARK,              PORT206_FN1),
1590         PINMUX_DATA(SDHI2_D2_MARK,              PORT207_FN1),
1591         PINMUX_DATA(SDHI2_D3_MARK,              PORT208_FN1),
1592
1593         /* Port203 - Port208 Function3 */
1594         PINMUX_DATA(ET_TX_ER_MARK,              PORT203_FN3),
1595         PINMUX_DATA(ET_RX_ER_MARK,              PORT204_FN3),
1596         PINMUX_DATA(ET_CRS_MARK,                PORT205_FN3),
1597         PINMUX_DATA(ET_MDC_MARK,                PORT206_FN3),
1598         PINMUX_DATA(ET_MDIO_MARK,               PORT207_FN3),
1599         PINMUX_DATA(RMII_MDIO_MARK,             PORT208_FN3),
1600
1601         /* Port203 - Port208 Function6 */
1602         PINMUX_DATA(IDE_A2_MARK,                PORT203_FN6),
1603         PINMUX_DATA(IDE_A1_MARK,                PORT204_FN6),
1604         PINMUX_DATA(IDE_A0_MARK,                PORT205_FN6),
1605         PINMUX_DATA(IDE_IODACK_MARK,            PORT206_FN6),
1606         PINMUX_DATA(IDE_IODREQ_MARK,            PORT207_FN6),
1607         PINMUX_DATA(IDE_CS1_MARK,               PORT208_FN6),
1608
1609         /* Port203 - Port208 Function7 */
1610         PINMUX_DATA(SCIFA4_TXD_PORT203_MARK,    PORT203_FN7,    MSEL5CR_12_0,   MSEL5CR_11_1),
1611         PINMUX_DATA(SCIFA4_RXD_PORT204_MARK,    PORT204_FN7,    MSEL5CR_12_0,   MSEL5CR_11_1),
1612         PINMUX_DATA(SCIFA4_SCK_PORT205_MARK,    PORT205_FN7,    MSEL5CR_10_1),
1613         PINMUX_DATA(SCIFA5_SCK_PORT206_MARK,    PORT206_FN7,    MSEL5CR_13_1),
1614         PINMUX_DATA(SCIFA5_RXD_PORT207_MARK,    PORT207_FN7,    MSEL5CR_15_0,   MSEL5CR_14_1),
1615         PINMUX_DATA(SCIFA5_TXD_PORT208_MARK,    PORT208_FN7,    MSEL5CR_15_0,   MSEL5CR_14_1),
1616
1617         /* Port209 */
1618         PINMUX_DATA(VBUS_MARK,                  PORT209_FN1),
1619         PINMUX_DATA(IRQ7_PORT209_MARK,          PORT209_FN0,    MSEL1CR_7_1),
1620
1621         /* Port210 */
1622         PINMUX_DATA(IRQ9_PORT210_MARK,          PORT210_FN0,    MSEL1CR_9_1),
1623
1624         /* Port211 */
1625         PINMUX_DATA(IRQ16_PORT211_MARK,         PORT211_FN0,    MSEL1CR_16_1),
1626
1627         /* LCDC select */
1628         PINMUX_DATA(LCDC0_SELECT_MARK,                          MSEL3CR_6_0),
1629         PINMUX_DATA(LCDC1_SELECT_MARK,                          MSEL3CR_6_1),
1630
1631         /* SDENC */
1632         PINMUX_DATA(SDENC_CPG_MARK,                             MSEL4CR_19_0),
1633         PINMUX_DATA(SDENC_DV_CLKI_MARK,                         MSEL4CR_19_1),
1634
1635         /* SYSC */
1636         PINMUX_DATA(RESETP_PULLUP_MARK,                         MSEL4CR_4_0),
1637         PINMUX_DATA(RESETP_PLAIN_MARK,                          MSEL4CR_4_1),
1638
1639         /* DEBUG */
1640         PINMUX_DATA(EDEBGREQ_PULLDOWN_MARK,                     MSEL4CR_1_0),
1641         PINMUX_DATA(EDEBGREQ_PULLUP_MARK,                       MSEL4CR_1_1),
1642
1643         PINMUX_DATA(TRACEAUD_FROM_VIO_MARK,                     MSEL5CR_30_0,   MSEL5CR_29_0),
1644         PINMUX_DATA(TRACEAUD_FROM_LCDC0_MARK,                   MSEL5CR_30_0,   MSEL5CR_29_1),
1645         PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK,                    MSEL5CR_30_1,   MSEL5CR_29_0),
1646 };
1647
1648 static struct pinmux_gpio pinmux_gpios[] = {
1649
1650         /* PORT */
1651         GPIO_PORT_ALL(),
1652
1653         /* IRQ */
1654         GPIO_FN(IRQ0_PORT2),    GPIO_FN(IRQ0_PORT13),
1655         GPIO_FN(IRQ1),
1656         GPIO_FN(IRQ2_PORT11),   GPIO_FN(IRQ2_PORT12),
1657         GPIO_FN(IRQ3_PORT10),   GPIO_FN(IRQ3_PORT14),
1658         GPIO_FN(IRQ4_PORT15),   GPIO_FN(IRQ4_PORT172),
1659         GPIO_FN(IRQ5_PORT0),    GPIO_FN(IRQ5_PORT1),
1660         GPIO_FN(IRQ6_PORT121),  GPIO_FN(IRQ6_PORT173),
1661         GPIO_FN(IRQ7_PORT120),  GPIO_FN(IRQ7_PORT209),
1662         GPIO_FN(IRQ8),
1663         GPIO_FN(IRQ9_PORT118),  GPIO_FN(IRQ9_PORT210),
1664         GPIO_FN(IRQ10),
1665         GPIO_FN(IRQ11),
1666         GPIO_FN(IRQ12_PORT42),  GPIO_FN(IRQ12_PORT97),
1667         GPIO_FN(IRQ13_PORT64),  GPIO_FN(IRQ13_PORT98),
1668         GPIO_FN(IRQ14_PORT63),  GPIO_FN(IRQ14_PORT99),
1669         GPIO_FN(IRQ15_PORT62),  GPIO_FN(IRQ15_PORT100),
1670         GPIO_FN(IRQ16_PORT68),  GPIO_FN(IRQ16_PORT211),
1671         GPIO_FN(IRQ17),
1672         GPIO_FN(IRQ18),
1673         GPIO_FN(IRQ19),
1674         GPIO_FN(IRQ20),
1675         GPIO_FN(IRQ21),
1676         GPIO_FN(IRQ22),
1677         GPIO_FN(IRQ23),
1678         GPIO_FN(IRQ24),
1679         GPIO_FN(IRQ25),
1680         GPIO_FN(IRQ26_PORT58),  GPIO_FN(IRQ26_PORT81),
1681         GPIO_FN(IRQ27_PORT57),  GPIO_FN(IRQ27_PORT168),
1682         GPIO_FN(IRQ28_PORT56),  GPIO_FN(IRQ28_PORT169),
1683         GPIO_FN(IRQ29_PORT50),  GPIO_FN(IRQ29_PORT170),
1684         GPIO_FN(IRQ30_PORT49),  GPIO_FN(IRQ30_PORT171),
1685         GPIO_FN(IRQ31_PORT41),  GPIO_FN(IRQ31_PORT167),
1686
1687         /* Function */
1688
1689         /* DBGT */
1690         GPIO_FN(DBGMDT2),       GPIO_FN(DBGMDT1),       GPIO_FN(DBGMDT0),
1691         GPIO_FN(DBGMD10),       GPIO_FN(DBGMD11),       GPIO_FN(DBGMD20),
1692         GPIO_FN(DBGMD21),
1693
1694         /* FSI */
1695         GPIO_FN(FSIAISLD_PORT0),        /* FSIAISLD Port 0/5 */
1696         GPIO_FN(FSIAISLD_PORT5),
1697         GPIO_FN(FSIASPDIF_PORT9),       /* FSIASPDIF Port 9/18 */
1698         GPIO_FN(FSIASPDIF_PORT18),
1699         GPIO_FN(FSIAOSLD1),     GPIO_FN(FSIAOSLD2),     GPIO_FN(FSIAOLR),
1700         GPIO_FN(FSIAOBT),       GPIO_FN(FSIAOSLD),      GPIO_FN(FSIAOMC),
1701         GPIO_FN(FSIACK),        GPIO_FN(FSIAILR),       GPIO_FN(FSIAIBT),
1702
1703         /* FMSI */
1704         GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
1705         GPIO_FN(FMSISLD_PORT6),
1706         GPIO_FN(FMSIILR),       GPIO_FN(FMSIIBT),       GPIO_FN(FMSIOLR),
1707         GPIO_FN(FMSIOBT),       GPIO_FN(FMSICK),        GPIO_FN(FMSOILR),
1708         GPIO_FN(FMSOIBT),       GPIO_FN(FMSOOLR),       GPIO_FN(FMSOOBT),
1709         GPIO_FN(FMSOSLD),       GPIO_FN(FMSOCK),
1710
1711         /* SCIFA0 */
1712         GPIO_FN(SCIFA0_SCK),    GPIO_FN(SCIFA0_CTS),    GPIO_FN(SCIFA0_RTS),
1713         GPIO_FN(SCIFA0_RXD),    GPIO_FN(SCIFA0_TXD),
1714
1715         /* SCIFA1 */
1716         GPIO_FN(SCIFA1_CTS),    GPIO_FN(SCIFA1_SCK),
1717         GPIO_FN(SCIFA1_RXD),    GPIO_FN(SCIFA1_TXD),    GPIO_FN(SCIFA1_RTS),
1718
1719         /* SCIFA2 */
1720         GPIO_FN(SCIFA2_SCK_PORT22), /* SCIFA2_SCK Port 22/199 */
1721         GPIO_FN(SCIFA2_SCK_PORT199),
1722         GPIO_FN(SCIFA2_RXD),    GPIO_FN(SCIFA2_TXD),
1723         GPIO_FN(SCIFA2_CTS),    GPIO_FN(SCIFA2_RTS),
1724
1725         /* SCIFA3 */
1726         GPIO_FN(SCIFA3_RTS_PORT105), /* MSEL5CR_8_0 */
1727         GPIO_FN(SCIFA3_SCK_PORT116),
1728         GPIO_FN(SCIFA3_CTS_PORT117),
1729         GPIO_FN(SCIFA3_RXD_PORT174),
1730         GPIO_FN(SCIFA3_TXD_PORT175),
1731
1732         GPIO_FN(SCIFA3_RTS_PORT161), /* MSEL5CR_8_1 */
1733         GPIO_FN(SCIFA3_SCK_PORT158),
1734         GPIO_FN(SCIFA3_CTS_PORT162),
1735         GPIO_FN(SCIFA3_RXD_PORT159),
1736         GPIO_FN(SCIFA3_TXD_PORT160),
1737
1738         /* SCIFA4 */
1739         GPIO_FN(SCIFA4_RXD_PORT12), /* MSEL5CR[12:11] = 00 */
1740         GPIO_FN(SCIFA4_TXD_PORT13),
1741
1742         GPIO_FN(SCIFA4_RXD_PORT204), /* MSEL5CR[12:11] = 01 */
1743         GPIO_FN(SCIFA4_TXD_PORT203),
1744
1745         GPIO_FN(SCIFA4_RXD_PORT94), /* MSEL5CR[12:11] = 10 */
1746         GPIO_FN(SCIFA4_TXD_PORT93),
1747
1748         GPIO_FN(SCIFA4_SCK_PORT21), /* SCIFA4_SCK Port 21/205 */
1749         GPIO_FN(SCIFA4_SCK_PORT205),
1750
1751         /* SCIFA5 */
1752         GPIO_FN(SCIFA5_TXD_PORT20), /* MSEL5CR[15:14] = 00 */
1753         GPIO_FN(SCIFA5_RXD_PORT10),
1754
1755         GPIO_FN(SCIFA5_RXD_PORT207), /* MSEL5CR[15:14] = 01 */
1756         GPIO_FN(SCIFA5_TXD_PORT208),
1757
1758         GPIO_FN(SCIFA5_TXD_PORT91), /* MSEL5CR[15:14] = 10 */
1759         GPIO_FN(SCIFA5_RXD_PORT92),
1760
1761         GPIO_FN(SCIFA5_SCK_PORT23), /* SCIFA5_SCK Port 23/206 */
1762         GPIO_FN(SCIFA5_SCK_PORT206),
1763
1764         /* SCIFA6 */
1765         GPIO_FN(SCIFA6_SCK),    GPIO_FN(SCIFA6_RXD),    GPIO_FN(SCIFA6_TXD),
1766
1767         /* SCIFA7 */
1768         GPIO_FN(SCIFA7_TXD),    GPIO_FN(SCIFA7_RXD),
1769
1770         /* SCIFAB */
1771         GPIO_FN(SCIFB_SCK_PORT190), /* MSEL5CR_17_0 */
1772         GPIO_FN(SCIFB_RXD_PORT191),
1773         GPIO_FN(SCIFB_TXD_PORT192),
1774         GPIO_FN(SCIFB_RTS_PORT186),
1775         GPIO_FN(SCIFB_CTS_PORT187),
1776
1777         GPIO_FN(SCIFB_SCK_PORT2), /* MSEL5CR_17_1 */
1778         GPIO_FN(SCIFB_RXD_PORT3),
1779         GPIO_FN(SCIFB_TXD_PORT4),
1780         GPIO_FN(SCIFB_RTS_PORT172),
1781         GPIO_FN(SCIFB_CTS_PORT173),
1782
1783         /* LCD0 */
1784         GPIO_FN(LCD0_D0),       GPIO_FN(LCD0_D1),       GPIO_FN(LCD0_D2),
1785         GPIO_FN(LCD0_D3),       GPIO_FN(LCD0_D4),       GPIO_FN(LCD0_D5),
1786         GPIO_FN(LCD0_D6),       GPIO_FN(LCD0_D7),       GPIO_FN(LCD0_D8),
1787         GPIO_FN(LCD0_D9),       GPIO_FN(LCD0_D10),      GPIO_FN(LCD0_D11),
1788         GPIO_FN(LCD0_D12),      GPIO_FN(LCD0_D13),      GPIO_FN(LCD0_D14),
1789         GPIO_FN(LCD0_D15),      GPIO_FN(LCD0_D16),      GPIO_FN(LCD0_D17),
1790         GPIO_FN(LCD0_DON),      GPIO_FN(LCD0_VCPWC),    GPIO_FN(LCD0_VEPWC),
1791         GPIO_FN(LCD0_DCK),      GPIO_FN(LCD0_VSYN),
1792         GPIO_FN(LCD0_HSYN),     GPIO_FN(LCD0_DISP),
1793         GPIO_FN(LCD0_WR),       GPIO_FN(LCD0_RD),
1794         GPIO_FN(LCD0_CS),       GPIO_FN(LCD0_RS),
1795
1796         GPIO_FN(LCD0_D18_PORT163),      GPIO_FN(LCD0_D19_PORT162),
1797         GPIO_FN(LCD0_D20_PORT161),      GPIO_FN(LCD0_D21_PORT158),
1798         GPIO_FN(LCD0_D22_PORT160),      GPIO_FN(LCD0_D23_PORT159),
1799         GPIO_FN(LCD0_LCLK_PORT165),     /* MSEL5CR_6_1 */
1800
1801         GPIO_FN(LCD0_D18_PORT40),       GPIO_FN(LCD0_D19_PORT4),
1802         GPIO_FN(LCD0_D20_PORT3),        GPIO_FN(LCD0_D21_PORT2),
1803         GPIO_FN(LCD0_D22_PORT0),        GPIO_FN(LCD0_D23_PORT1),
1804         GPIO_FN(LCD0_LCLK_PORT102),     /* MSEL5CR_6_0 */
1805
1806         /* LCD1 */
1807         GPIO_FN(LCD1_D0),       GPIO_FN(LCD1_D1),       GPIO_FN(LCD1_D2),
1808         GPIO_FN(LCD1_D3),       GPIO_FN(LCD1_D4),       GPIO_FN(LCD1_D5),
1809         GPIO_FN(LCD1_D6),       GPIO_FN(LCD1_D7),       GPIO_FN(LCD1_D8),
1810         GPIO_FN(LCD1_D9),       GPIO_FN(LCD1_D10),      GPIO_FN(LCD1_D11),
1811         GPIO_FN(LCD1_D12),      GPIO_FN(LCD1_D13),      GPIO_FN(LCD1_D14),
1812         GPIO_FN(LCD1_D15),      GPIO_FN(LCD1_D16),      GPIO_FN(LCD1_D17),
1813         GPIO_FN(LCD1_D18),      GPIO_FN(LCD1_D19),      GPIO_FN(LCD1_D20),
1814         GPIO_FN(LCD1_D21),      GPIO_FN(LCD1_D22),      GPIO_FN(LCD1_D23),
1815         GPIO_FN(LCD1_RS),       GPIO_FN(LCD1_RD),       GPIO_FN(LCD1_CS),
1816         GPIO_FN(LCD1_WR),       GPIO_FN(LCD1_DCK),      GPIO_FN(LCD1_DON),
1817         GPIO_FN(LCD1_VCPWC),    GPIO_FN(LCD1_LCLK),     GPIO_FN(LCD1_HSYN),
1818         GPIO_FN(LCD1_VSYN),     GPIO_FN(LCD1_VEPWC),    GPIO_FN(LCD1_DISP),
1819
1820         /* RSPI */
1821         GPIO_FN(RSPI_SSL0_A),   GPIO_FN(RSPI_SSL1_A),   GPIO_FN(RSPI_SSL2_A),
1822         GPIO_FN(RSPI_SSL3_A),   GPIO_FN(RSPI_CK_A),     GPIO_FN(RSPI_MOSI_A),
1823         GPIO_FN(RSPI_MISO_A),
1824
1825         /* VIO CKO */
1826         GPIO_FN(VIO_CKO1),
1827         GPIO_FN(VIO_CKO2),
1828         GPIO_FN(VIO_CKO_1),
1829         GPIO_FN(VIO_CKO),
1830
1831         /* VIO0 */
1832         GPIO_FN(VIO0_D0),       GPIO_FN(VIO0_D1),       GPIO_FN(VIO0_D2),
1833         GPIO_FN(VIO0_D3),       GPIO_FN(VIO0_D4),       GPIO_FN(VIO0_D5),
1834         GPIO_FN(VIO0_D6),       GPIO_FN(VIO0_D7),       GPIO_FN(VIO0_D8),
1835         GPIO_FN(VIO0_D9),       GPIO_FN(VIO0_D10),      GPIO_FN(VIO0_D11),
1836         GPIO_FN(VIO0_D12),      GPIO_FN(VIO0_VD),       GPIO_FN(VIO0_HD),
1837         GPIO_FN(VIO0_CLK),      GPIO_FN(VIO0_FIELD),
1838
1839         GPIO_FN(VIO0_D13_PORT26), /* MSEL5CR_27_0 */
1840         GPIO_FN(VIO0_D14_PORT25),
1841         GPIO_FN(VIO0_D15_PORT24),
1842
1843         GPIO_FN(VIO0_D13_PORT22), /* MSEL5CR_27_1 */
1844         GPIO_FN(VIO0_D14_PORT95),
1845         GPIO_FN(VIO0_D15_PORT96),
1846
1847         /* VIO1 */
1848         GPIO_FN(VIO1_D0),       GPIO_FN(VIO1_D1),       GPIO_FN(VIO1_D2),
1849         GPIO_FN(VIO1_D3),       GPIO_FN(VIO1_D4),       GPIO_FN(VIO1_D5),
1850         GPIO_FN(VIO1_D6),       GPIO_FN(VIO1_D7),       GPIO_FN(VIO1_VD),
1851         GPIO_FN(VIO1_HD),       GPIO_FN(VIO1_CLK),      GPIO_FN(VIO1_FIELD),
1852
1853         /* TPU0 */
1854         GPIO_FN(TPU0TO0),       GPIO_FN(TPU0TO1),       GPIO_FN(TPU0TO3),
1855         GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */
1856         GPIO_FN(TPU0TO2_PORT202),
1857
1858         /* SSP1 0 */
1859         GPIO_FN(STP0_IPD0),     GPIO_FN(STP0_IPD1),     GPIO_FN(STP0_IPD2),
1860         GPIO_FN(STP0_IPD3),     GPIO_FN(STP0_IPD4),     GPIO_FN(STP0_IPD5),
1861         GPIO_FN(STP0_IPD6),     GPIO_FN(STP0_IPD7),     GPIO_FN(STP0_IPEN),
1862         GPIO_FN(STP0_IPCLK),    GPIO_FN(STP0_IPSYNC),
1863
1864         /* SSP1 1 */
1865         GPIO_FN(STP1_IPD1),     GPIO_FN(STP1_IPD2),     GPIO_FN(STP1_IPD3),
1866         GPIO_FN(STP1_IPD4),     GPIO_FN(STP1_IPD5),     GPIO_FN(STP1_IPD6),
1867         GPIO_FN(STP1_IPD7),     GPIO_FN(STP1_IPCLK),    GPIO_FN(STP1_IPSYNC),
1868
1869         GPIO_FN(STP1_IPD0_PORT186), /* MSEL5CR_23_0 */
1870         GPIO_FN(STP1_IPEN_PORT187),
1871
1872         GPIO_FN(STP1_IPD0_PORT194), /* MSEL5CR_23_1 */
1873         GPIO_FN(STP1_IPEN_PORT193),
1874
1875         /* SIM */
1876         GPIO_FN(SIM_RST),       GPIO_FN(SIM_CLK),
1877         GPIO_FN(SIM_D_PORT22), /* SIM_D  Port 22/199 */
1878         GPIO_FN(SIM_D_PORT199),
1879
1880         /* SDHI0 */
1881         GPIO_FN(SDHI0_D0),      GPIO_FN(SDHI0_D1),      GPIO_FN(SDHI0_D2),
1882         GPIO_FN(SDHI0_D3),      GPIO_FN(SDHI0_CD),      GPIO_FN(SDHI0_WP),
1883         GPIO_FN(SDHI0_CMD),     GPIO_FN(SDHI0_CLK),
1884
1885         /* SDHI1 */
1886         GPIO_FN(SDHI1_D0),      GPIO_FN(SDHI1_D1),      GPIO_FN(SDHI1_D2),
1887         GPIO_FN(SDHI1_D3),      GPIO_FN(SDHI1_CD),      GPIO_FN(SDHI1_WP),
1888         GPIO_FN(SDHI1_CMD),     GPIO_FN(SDHI1_CLK),
1889
1890         /* SDHI2 */
1891         GPIO_FN(SDHI2_D0),      GPIO_FN(SDHI2_D1),      GPIO_FN(SDHI2_D2),
1892         GPIO_FN(SDHI2_D3),      GPIO_FN(SDHI2_CLK),     GPIO_FN(SDHI2_CMD),
1893
1894         GPIO_FN(SDHI2_CD_PORT24), /* MSEL5CR_19_0 */
1895         GPIO_FN(SDHI2_WP_PORT25),
1896
1897         GPIO_FN(SDHI2_WP_PORT177), /* MSEL5CR_19_1 */
1898         GPIO_FN(SDHI2_CD_PORT202),
1899
1900         /* MSIOF2 */
1901         GPIO_FN(MSIOF2_TXD),    GPIO_FN(MSIOF2_RXD),    GPIO_FN(MSIOF2_TSCK),
1902         GPIO_FN(MSIOF2_SS2),    GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_SS1),
1903         GPIO_FN(MSIOF2_MCK1),   GPIO_FN(MSIOF2_MCK0),   GPIO_FN(MSIOF2_RSYNC),
1904         GPIO_FN(MSIOF2_RSCK),
1905
1906         /* KEYSC */
1907         GPIO_FN(KEYIN4),        GPIO_FN(KEYIN5),
1908         GPIO_FN(KEYIN6),        GPIO_FN(KEYIN7),
1909         GPIO_FN(KEYOUT0),       GPIO_FN(KEYOUT1),       GPIO_FN(KEYOUT2),
1910         GPIO_FN(KEYOUT3),       GPIO_FN(KEYOUT4),       GPIO_FN(KEYOUT5),
1911         GPIO_FN(KEYOUT6),       GPIO_FN(KEYOUT7),
1912
1913         GPIO_FN(KEYIN0_PORT43), /* MSEL4CR_18_0 */
1914         GPIO_FN(KEYIN1_PORT44),
1915         GPIO_FN(KEYIN2_PORT45),
1916         GPIO_FN(KEYIN3_PORT46),
1917
1918         GPIO_FN(KEYIN0_PORT58), /* MSEL4CR_18_1 */
1919         GPIO_FN(KEYIN1_PORT57),
1920         GPIO_FN(KEYIN2_PORT56),
1921         GPIO_FN(KEYIN3_PORT55),
1922
1923         /* VOU */
1924         GPIO_FN(DV_D0),         GPIO_FN(DV_D1),         GPIO_FN(DV_D2),
1925         GPIO_FN(DV_D3),         GPIO_FN(DV_D4),         GPIO_FN(DV_D5),
1926         GPIO_FN(DV_D6),         GPIO_FN(DV_D7),         GPIO_FN(DV_D8),
1927         GPIO_FN(DV_D9),         GPIO_FN(DV_D10),        GPIO_FN(DV_D11),
1928         GPIO_FN(DV_D12),        GPIO_FN(DV_D13),        GPIO_FN(DV_D14),
1929         GPIO_FN(DV_D15),        GPIO_FN(DV_CLK),
1930         GPIO_FN(DV_VSYNC),      GPIO_FN(DV_HSYNC),
1931
1932         /* MEMC */
1933         GPIO_FN(MEMC_AD0),      GPIO_FN(MEMC_AD1),      GPIO_FN(MEMC_AD2),
1934         GPIO_FN(MEMC_AD3),      GPIO_FN(MEMC_AD4),      GPIO_FN(MEMC_AD5),
1935         GPIO_FN(MEMC_AD6),      GPIO_FN(MEMC_AD7),      GPIO_FN(MEMC_AD8),
1936         GPIO_FN(MEMC_AD9),      GPIO_FN(MEMC_AD10),     GPIO_FN(MEMC_AD11),
1937         GPIO_FN(MEMC_AD12),     GPIO_FN(MEMC_AD13),     GPIO_FN(MEMC_AD14),
1938         GPIO_FN(MEMC_AD15),     GPIO_FN(MEMC_CS0),      GPIO_FN(MEMC_INT),
1939         GPIO_FN(MEMC_NWE),      GPIO_FN(MEMC_NOE),      GPIO_FN(MEMC_CS1),
1940         GPIO_FN(MEMC_A1),       GPIO_FN(MEMC_ADV),      GPIO_FN(MEMC_DREQ0),
1941         GPIO_FN(MEMC_WAIT),     GPIO_FN(MEMC_DREQ1),    GPIO_FN(MEMC_BUSCLK),
1942         GPIO_FN(MEMC_A0),
1943
1944         /* MMC */
1945         GPIO_FN(MMC0_D0_PORT68),        GPIO_FN(MMC0_D1_PORT69),
1946         GPIO_FN(MMC0_D2_PORT70),        GPIO_FN(MMC0_D3_PORT71),
1947         GPIO_FN(MMC0_D4_PORT72),        GPIO_FN(MMC0_D5_PORT73),
1948         GPIO_FN(MMC0_D6_PORT74),        GPIO_FN(MMC0_D7_PORT75),
1949         GPIO_FN(MMC0_CLK_PORT66),
1950         GPIO_FN(MMC0_CMD_PORT67),       /* MSEL4CR_15_0 */
1951
1952         GPIO_FN(MMC1_D0_PORT149),       GPIO_FN(MMC1_D1_PORT148),
1953         GPIO_FN(MMC1_D2_PORT147),       GPIO_FN(MMC1_D3_PORT146),
1954         GPIO_FN(MMC1_D4_PORT145),       GPIO_FN(MMC1_D5_PORT144),
1955         GPIO_FN(MMC1_D6_PORT143),       GPIO_FN(MMC1_D7_PORT142),
1956         GPIO_FN(MMC1_CLK_PORT103),
1957         GPIO_FN(MMC1_CMD_PORT104),      /* MSEL4CR_15_1 */
1958
1959         /* MSIOF0 */
1960         GPIO_FN(MSIOF0_SS1),    GPIO_FN(MSIOF0_SS2),    GPIO_FN(MSIOF0_RXD),
1961         GPIO_FN(MSIOF0_TXD),    GPIO_FN(MSIOF0_MCK0),   GPIO_FN(MSIOF0_MCK1),
1962         GPIO_FN(MSIOF0_RSYNC),  GPIO_FN(MSIOF0_RSCK),   GPIO_FN(MSIOF0_TSCK),
1963         GPIO_FN(MSIOF0_TSYNC),
1964
1965         /* MSIOF1 */
1966         GPIO_FN(MSIOF1_RSCK),   GPIO_FN(MSIOF1_RSYNC),
1967         GPIO_FN(MSIOF1_MCK0),   GPIO_FN(MSIOF1_MCK1),
1968
1969         GPIO_FN(MSIOF1_SS2_PORT116),    GPIO_FN(MSIOF1_SS1_PORT117),
1970         GPIO_FN(MSIOF1_RXD_PORT118),    GPIO_FN(MSIOF1_TXD_PORT119),
1971         GPIO_FN(MSIOF1_TSYNC_PORT120),
1972         GPIO_FN(MSIOF1_TSCK_PORT121),   /* MSEL4CR_10_0 */
1973
1974         GPIO_FN(MSIOF1_SS1_PORT67),     GPIO_FN(MSIOF1_TSCK_PORT72),
1975         GPIO_FN(MSIOF1_TSYNC_PORT73),   GPIO_FN(MSIOF1_TXD_PORT74),
1976         GPIO_FN(MSIOF1_RXD_PORT75),
1977         GPIO_FN(MSIOF1_SS2_PORT202),    /* MSEL4CR_10_1 */
1978
1979         /* GPIO */
1980         GPIO_FN(GPO0),  GPIO_FN(GPI0),
1981         GPIO_FN(GPO1),  GPIO_FN(GPI1),
1982
1983         /* USB0 */
1984         GPIO_FN(USB0_OCI),      GPIO_FN(USB0_PPON),     GPIO_FN(VBUS),
1985
1986         /* USB1 */
1987         GPIO_FN(USB1_OCI),      GPIO_FN(USB1_PPON),
1988
1989         /* BBIF1 */
1990         GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_TSYNC),
1991         GPIO_FN(BBIF1_TSCK),    GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
1992         GPIO_FN(BBIF1_FLOW),    GPIO_FN(BBIF1_RX_FLOW_N),
1993
1994         /* BBIF2 */
1995         GPIO_FN(BBIF2_TXD2_PORT5), /* MSEL5CR_0_0 */
1996         GPIO_FN(BBIF2_RXD2_PORT60),
1997         GPIO_FN(BBIF2_TSYNC2_PORT6),
1998         GPIO_FN(BBIF2_TSCK2_PORT59),
1999
2000         GPIO_FN(BBIF2_RXD2_PORT90), /* MSEL5CR_0_1 */
2001         GPIO_FN(BBIF2_TXD2_PORT183),
2002         GPIO_FN(BBIF2_TSCK2_PORT89),
2003         GPIO_FN(BBIF2_TSYNC2_PORT184),
2004
2005         /* BSC / FLCTL / PCMCIA */
2006         GPIO_FN(CS0),   GPIO_FN(CS2),   GPIO_FN(CS4),
2007         GPIO_FN(CS5B),  GPIO_FN(CS6A),
2008         GPIO_FN(CS5A_PORT105), /* CS5A PORT 19/105 */
2009         GPIO_FN(CS5A_PORT19),
2010         GPIO_FN(IOIS16), /* ? */
2011
2012         GPIO_FN(A0),    GPIO_FN(A1),    GPIO_FN(A2),    GPIO_FN(A3),
2013         GPIO_FN(A4_FOE),        GPIO_FN(A5_FCDE),       /* share with FLCTL */
2014         GPIO_FN(A6),    GPIO_FN(A7),    GPIO_FN(A8),    GPIO_FN(A9),
2015         GPIO_FN(A10),   GPIO_FN(A11),   GPIO_FN(A12),   GPIO_FN(A13),
2016         GPIO_FN(A14),   GPIO_FN(A15),   GPIO_FN(A16),   GPIO_FN(A17),
2017         GPIO_FN(A18),   GPIO_FN(A19),   GPIO_FN(A20),   GPIO_FN(A21),
2018         GPIO_FN(A22),   GPIO_FN(A23),   GPIO_FN(A24),   GPIO_FN(A25),
2019         GPIO_FN(A26),
2020
2021         GPIO_FN(D0_NAF0),       GPIO_FN(D1_NAF1),       /* share with FLCTL */
2022         GPIO_FN(D2_NAF2),       GPIO_FN(D3_NAF3),       /* share with FLCTL */
2023         GPIO_FN(D4_NAF4),       GPIO_FN(D5_NAF5),       /* share with FLCTL */
2024         GPIO_FN(D6_NAF6),       GPIO_FN(D7_NAF7),       /* share with FLCTL */
2025         GPIO_FN(D8_NAF8),       GPIO_FN(D9_NAF9),       /* share with FLCTL */
2026         GPIO_FN(D10_NAF10),     GPIO_FN(D11_NAF11),     /* share with FLCTL */
2027         GPIO_FN(D12_NAF12),     GPIO_FN(D13_NAF13),     /* share with FLCTL */
2028         GPIO_FN(D14_NAF14),     GPIO_FN(D15_NAF15),     /* share with FLCTL */
2029         GPIO_FN(D16),   GPIO_FN(D17),   GPIO_FN(D18),   GPIO_FN(D19),
2030         GPIO_FN(D20),   GPIO_FN(D21),   GPIO_FN(D22),   GPIO_FN(D23),
2031         GPIO_FN(D24),   GPIO_FN(D25),   GPIO_FN(D26),   GPIO_FN(D27),
2032         GPIO_FN(D28),   GPIO_FN(D29),   GPIO_FN(D30),   GPIO_FN(D31),
2033
2034         GPIO_FN(WE0_FWE),       /* share with FLCTL */
2035         GPIO_FN(WE1),
2036         GPIO_FN(WE2_ICIORD),    /* share with PCMCIA */
2037         GPIO_FN(WE3_ICIOWR),    /* share with PCMCIA */
2038         GPIO_FN(CKO),   GPIO_FN(BS),    GPIO_FN(RDWR),
2039         GPIO_FN(RD_FSC),        /* share with FLCTL */
2040         GPIO_FN(WAIT_PORT177), /* WAIT Port 90/177 */
2041         GPIO_FN(WAIT_PORT90),
2042
2043         GPIO_FN(FCE0),  GPIO_FN(FCE1),  GPIO_FN(FRB), /* FLCTL */
2044
2045         /* IRDA */
2046         GPIO_FN(IRDA_FIRSEL),   GPIO_FN(IRDA_IN),       GPIO_FN(IRDA_OUT),
2047
2048         /* ATAPI */
2049         GPIO_FN(IDE_D0),        GPIO_FN(IDE_D1),        GPIO_FN(IDE_D2),
2050         GPIO_FN(IDE_D3),        GPIO_FN(IDE_D4),        GPIO_FN(IDE_D5),
2051         GPIO_FN(IDE_D6),        GPIO_FN(IDE_D7),        GPIO_FN(IDE_D8),
2052         GPIO_FN(IDE_D9),        GPIO_FN(IDE_D10),       GPIO_FN(IDE_D11),
2053         GPIO_FN(IDE_D12),       GPIO_FN(IDE_D13),       GPIO_FN(IDE_D14),
2054         GPIO_FN(IDE_D15),       GPIO_FN(IDE_A0),        GPIO_FN(IDE_A1),
2055         GPIO_FN(IDE_A2),        GPIO_FN(IDE_CS0),       GPIO_FN(IDE_CS1),
2056         GPIO_FN(IDE_IOWR),      GPIO_FN(IDE_IORD),      GPIO_FN(IDE_IORDY),
2057         GPIO_FN(IDE_INT),       GPIO_FN(IDE_RST),       GPIO_FN(IDE_DIRECTION),
2058         GPIO_FN(IDE_EXBUF_ENB), GPIO_FN(IDE_IODACK),    GPIO_FN(IDE_IODREQ),
2059
2060         /* RMII */
2061         GPIO_FN(RMII_CRS_DV),   GPIO_FN(RMII_RX_ER),    GPIO_FN(RMII_RXD0),
2062         GPIO_FN(RMII_RXD1),     GPIO_FN(RMII_TX_EN),    GPIO_FN(RMII_TXD0),
2063         GPIO_FN(RMII_MDC),      GPIO_FN(RMII_TXD1),     GPIO_FN(RMII_MDIO),
2064         GPIO_FN(RMII_REF50CK),  GPIO_FN(RMII_REF125CK), /* for GMII */
2065
2066         /* GEther */
2067         GPIO_FN(ET_TX_CLK),     GPIO_FN(ET_TX_EN),      GPIO_FN(ET_ETXD0),
2068         GPIO_FN(ET_ETXD1),      GPIO_FN(ET_ETXD2),      GPIO_FN(ET_ETXD3),
2069         GPIO_FN(ET_ETXD4),      GPIO_FN(ET_ETXD5), /* for GEther */
2070         GPIO_FN(ET_ETXD6),      GPIO_FN(ET_ETXD7), /* for GEther */
2071         GPIO_FN(ET_COL),        GPIO_FN(ET_TX_ER),      GPIO_FN(ET_RX_CLK),
2072         GPIO_FN(ET_RX_DV),      GPIO_FN(ET_ERXD0),      GPIO_FN(ET_ERXD1),
2073         GPIO_FN(ET_ERXD2),      GPIO_FN(ET_ERXD3),
2074         GPIO_FN(ET_ERXD4),      GPIO_FN(ET_ERXD5), /* for GEther */
2075         GPIO_FN(ET_ERXD6),      GPIO_FN(ET_ERXD7), /* for GEther */
2076         GPIO_FN(ET_RX_ER),      GPIO_FN(ET_CRS),        GPIO_FN(ET_MDC),
2077         GPIO_FN(ET_MDIO),       GPIO_FN(ET_LINK),       GPIO_FN(ET_PHY_INT),
2078         GPIO_FN(ET_WOL),        GPIO_FN(ET_GTX_CLK),
2079
2080         /* DMA0 */
2081         GPIO_FN(DREQ0), GPIO_FN(DACK0),
2082
2083         /* DMA1 */
2084         GPIO_FN(DREQ1), GPIO_FN(DACK1),
2085
2086         /* SYSC */
2087         GPIO_FN(RESETOUTS),
2088
2089         /* IRREM */
2090         GPIO_FN(IROUT),
2091
2092         /* LCDC */
2093         GPIO_FN(LCDC0_SELECT),
2094         GPIO_FN(LCDC1_SELECT),
2095
2096         /* SDENC */
2097         GPIO_FN(SDENC_CPG),
2098         GPIO_FN(SDENC_DV_CLKI),
2099
2100         /* SYSC */
2101         GPIO_FN(RESETP_PULLUP),
2102         GPIO_FN(RESETP_PLAIN),
2103
2104         /* DEBUG */
2105         GPIO_FN(EDEBGREQ_PULLDOWN),
2106         GPIO_FN(EDEBGREQ_PULLUP),
2107
2108         GPIO_FN(TRACEAUD_FROM_VIO),
2109         GPIO_FN(TRACEAUD_FROM_LCDC0),
2110         GPIO_FN(TRACEAUD_FROM_MEMC),
2111 };
2112
2113 static struct pinmux_cfg_reg pinmux_config_regs[] = {
2114         PORTCR(0,       0xe6050000), /* PORT0CR */
2115         PORTCR(1,       0xe6050001), /* PORT1CR */
2116         PORTCR(2,       0xe6050002), /* PORT2CR */
2117         PORTCR(3,       0xe6050003), /* PORT3CR */
2118         PORTCR(4,       0xe6050004), /* PORT4CR */
2119         PORTCR(5,       0xe6050005), /* PORT5CR */
2120         PORTCR(6,       0xe6050006), /* PORT6CR */
2121         PORTCR(7,       0xe6050007), /* PORT7CR */
2122         PORTCR(8,       0xe6050008), /* PORT8CR */
2123         PORTCR(9,       0xe6050009), /* PORT9CR */
2124         PORTCR(10,      0xe605000a), /* PORT10CR */
2125         PORTCR(11,      0xe605000b), /* PORT11CR */
2126         PORTCR(12,      0xe605000c), /* PORT12CR */
2127         PORTCR(13,      0xe605000d), /* PORT13CR */
2128         PORTCR(14,      0xe605000e), /* PORT14CR */
2129         PORTCR(15,      0xe605000f), /* PORT15CR */
2130         PORTCR(16,      0xe6050010), /* PORT16CR */
2131         PORTCR(17,      0xe6050011), /* PORT17CR */
2132         PORTCR(18,      0xe6050012), /* PORT18CR */
2133         PORTCR(19,      0xe6050013), /* PORT19CR */
2134         PORTCR(20,      0xe6050014), /* PORT20CR */
2135         PORTCR(21,      0xe6050015), /* PORT21CR */
2136         PORTCR(22,      0xe6050016), /* PORT22CR */
2137         PORTCR(23,      0xe6050017), /* PORT23CR */
2138         PORTCR(24,      0xe6050018), /* PORT24CR */
2139         PORTCR(25,      0xe6050019), /* PORT25CR */
2140         PORTCR(26,      0xe605001a), /* PORT26CR */
2141         PORTCR(27,      0xe605001b), /* PORT27CR */
2142         PORTCR(28,      0xe605001c), /* PORT28CR */
2143         PORTCR(29,      0xe605001d), /* PORT29CR */
2144         PORTCR(30,      0xe605001e), /* PORT30CR */
2145         PORTCR(31,      0xe605001f), /* PORT31CR */
2146         PORTCR(32,      0xe6050020), /* PORT32CR */
2147         PORTCR(33,      0xe6050021), /* PORT33CR */
2148         PORTCR(34,      0xe6050022), /* PORT34CR */
2149         PORTCR(35,      0xe6050023), /* PORT35CR */
2150         PORTCR(36,      0xe6050024), /* PORT36CR */
2151         PORTCR(37,      0xe6050025), /* PORT37CR */
2152         PORTCR(38,      0xe6050026), /* PORT38CR */
2153         PORTCR(39,      0xe6050027), /* PORT39CR */
2154         PORTCR(40,      0xe6050028), /* PORT40CR */
2155         PORTCR(41,      0xe6050029), /* PORT41CR */
2156         PORTCR(42,      0xe605002a), /* PORT42CR */
2157         PORTCR(43,      0xe605002b), /* PORT43CR */
2158         PORTCR(44,      0xe605002c), /* PORT44CR */
2159         PORTCR(45,      0xe605002d), /* PORT45CR */
2160         PORTCR(46,      0xe605002e), /* PORT46CR */
2161         PORTCR(47,      0xe605002f), /* PORT47CR */
2162         PORTCR(48,      0xe6050030), /* PORT48CR */
2163         PORTCR(49,      0xe6050031), /* PORT49CR */
2164         PORTCR(50,      0xe6050032), /* PORT50CR */
2165         PORTCR(51,      0xe6050033), /* PORT51CR */
2166         PORTCR(52,      0xe6050034), /* PORT52CR */
2167         PORTCR(53,      0xe6050035), /* PORT53CR */
2168         PORTCR(54,      0xe6050036), /* PORT54CR */
2169         PORTCR(55,      0xe6050037), /* PORT55CR */
2170         PORTCR(56,      0xe6050038), /* PORT56CR */
2171         PORTCR(57,      0xe6050039), /* PORT57CR */
2172         PORTCR(58,      0xe605003a), /* PORT58CR */
2173         PORTCR(59,      0xe605003b), /* PORT59CR */
2174         PORTCR(60,      0xe605003c), /* PORT60CR */
2175         PORTCR(61,      0xe605003d), /* PORT61CR */
2176         PORTCR(62,      0xe605003e), /* PORT62CR */
2177         PORTCR(63,      0xe605003f), /* PORT63CR */
2178         PORTCR(64,      0xe6050040), /* PORT64CR */
2179         PORTCR(65,      0xe6050041), /* PORT65CR */
2180         PORTCR(66,      0xe6050042), /* PORT66CR */
2181         PORTCR(67,      0xe6050043), /* PORT67CR */
2182         PORTCR(68,      0xe6050044), /* PORT68CR */
2183         PORTCR(69,      0xe6050045), /* PORT69CR */
2184         PORTCR(70,      0xe6050046), /* PORT70CR */
2185         PORTCR(71,      0xe6050047), /* PORT71CR */
2186         PORTCR(72,      0xe6050048), /* PORT72CR */
2187         PORTCR(73,      0xe6050049), /* PORT73CR */
2188         PORTCR(74,      0xe605004a), /* PORT74CR */
2189         PORTCR(75,      0xe605004b), /* PORT75CR */
2190         PORTCR(76,      0xe605004c), /* PORT76CR */
2191         PORTCR(77,      0xe605004d), /* PORT77CR */
2192         PORTCR(78,      0xe605004e), /* PORT78CR */
2193         PORTCR(79,      0xe605004f), /* PORT79CR */
2194         PORTCR(80,      0xe6050050), /* PORT80CR */
2195         PORTCR(81,      0xe6050051), /* PORT81CR */
2196         PORTCR(82,      0xe6050052), /* PORT82CR */
2197         PORTCR(83,      0xe6050053), /* PORT83CR */
2198
2199         PORTCR(84,      0xe6051054), /* PORT84CR */
2200         PORTCR(85,      0xe6051055), /* PORT85CR */
2201         PORTCR(86,      0xe6051056), /* PORT86CR */
2202         PORTCR(87,      0xe6051057), /* PORT87CR */
2203         PORTCR(88,      0xe6051058), /* PORT88CR */
2204         PORTCR(89,      0xe6051059), /* PORT89CR */
2205         PORTCR(90,      0xe605105a), /* PORT90CR */
2206         PORTCR(91,      0xe605105b), /* PORT91CR */
2207         PORTCR(92,      0xe605105c), /* PORT92CR */
2208         PORTCR(93,      0xe605105d), /* PORT93CR */
2209         PORTCR(94,      0xe605105e), /* PORT94CR */
2210         PORTCR(95,      0xe605105f), /* PORT95CR */
2211         PORTCR(96,      0xe6051060), /* PORT96CR */
2212         PORTCR(97,      0xe6051061), /* PORT97CR */
2213         PORTCR(98,      0xe6051062), /* PORT98CR */
2214         PORTCR(99,      0xe6051063), /* PORT99CR */
2215         PORTCR(100,     0xe6051064), /* PORT100CR */
2216         PORTCR(101,     0xe6051065), /* PORT101CR */
2217         PORTCR(102,     0xe6051066), /* PORT102CR */
2218         PORTCR(103,     0xe6051067), /* PORT103CR */
2219         PORTCR(104,     0xe6051068), /* PORT104CR */
2220         PORTCR(105,     0xe6051069), /* PORT105CR */
2221         PORTCR(106,     0xe605106a), /* PORT106CR */
2222         PORTCR(107,     0xe605106b), /* PORT107CR */
2223         PORTCR(108,     0xe605106c), /* PORT108CR */
2224         PORTCR(109,     0xe605106d), /* PORT109CR */
2225         PORTCR(110,     0xe605106e), /* PORT110CR */
2226         PORTCR(111,     0xe605106f), /* PORT111CR */
2227         PORTCR(112,     0xe6051070), /* PORT112CR */
2228         PORTCR(113,     0xe6051071), /* PORT113CR */
2229         PORTCR(114,     0xe6051072), /* PORT114CR */
2230
2231         PORTCR(115,     0xe6052073), /* PORT115CR */
2232         PORTCR(116,     0xe6052074), /* PORT116CR */
2233         PORTCR(117,     0xe6052075), /* PORT117CR */
2234         PORTCR(118,     0xe6052076), /* PORT118CR */
2235         PORTCR(119,     0xe6052077), /* PORT119CR */
2236         PORTCR(120,     0xe6052078), /* PORT120CR */
2237         PORTCR(121,     0xe6052079), /* PORT121CR */
2238         PORTCR(122,     0xe605207a), /* PORT122CR */
2239         PORTCR(123,     0xe605207b), /* PORT123CR */
2240         PORTCR(124,     0xe605207c), /* PORT124CR */
2241         PORTCR(125,     0xe605207d), /* PORT125CR */
2242         PORTCR(126,     0xe605207e), /* PORT126CR */
2243         PORTCR(127,     0xe605207f), /* PORT127CR */
2244         PORTCR(128,     0xe6052080), /* PORT128CR */
2245         PORTCR(129,     0xe6052081), /* PORT129CR */
2246         PORTCR(130,     0xe6052082), /* PORT130CR */
2247         PORTCR(131,     0xe6052083), /* PORT131CR */
2248         PORTCR(132,     0xe6052084), /* PORT132CR */
2249         PORTCR(133,     0xe6052085), /* PORT133CR */
2250         PORTCR(134,     0xe6052086), /* PORT134CR */
2251         PORTCR(135,     0xe6052087), /* PORT135CR */
2252         PORTCR(136,     0xe6052088), /* PORT136CR */
2253         PORTCR(137,     0xe6052089), /* PORT137CR */
2254         PORTCR(138,     0xe605208a), /* PORT138CR */
2255         PORTCR(139,     0xe605208b), /* PORT139CR */
2256         PORTCR(140,     0xe605208c), /* PORT140CR */
2257         PORTCR(141,     0xe605208d), /* PORT141CR */
2258         PORTCR(142,     0xe605208e), /* PORT142CR */
2259         PORTCR(143,     0xe605208f), /* PORT143CR */
2260         PORTCR(144,     0xe6052090), /* PORT144CR */
2261         PORTCR(145,     0xe6052091), /* PORT145CR */
2262         PORTCR(146,     0xe6052092), /* PORT146CR */
2263         PORTCR(147,     0xe6052093), /* PORT147CR */
2264         PORTCR(148,     0xe6052094), /* PORT148CR */
2265         PORTCR(149,     0xe6052095), /* PORT149CR */
2266         PORTCR(150,     0xe6052096), /* PORT150CR */
2267         PORTCR(151,     0xe6052097), /* PORT151CR */
2268         PORTCR(152,     0xe6052098), /* PORT152CR */
2269         PORTCR(153,     0xe6052099), /* PORT153CR */
2270         PORTCR(154,     0xe605209a), /* PORT154CR */
2271         PORTCR(155,     0xe605209b), /* PORT155CR */
2272         PORTCR(156,     0xe605209c), /* PORT156CR */
2273         PORTCR(157,     0xe605209d), /* PORT157CR */
2274         PORTCR(158,     0xe605209e), /* PORT158CR */
2275         PORTCR(159,     0xe605209f), /* PORT159CR */
2276         PORTCR(160,     0xe60520a0), /* PORT160CR */
2277         PORTCR(161,     0xe60520a1), /* PORT161CR */
2278         PORTCR(162,     0xe60520a2), /* PORT162CR */
2279         PORTCR(163,     0xe60520a3), /* PORT163CR */
2280         PORTCR(164,     0xe60520a4), /* PORT164CR */
2281         PORTCR(165,     0xe60520a5), /* PORT165CR */
2282         PORTCR(166,     0xe60520a6), /* PORT166CR */
2283         PORTCR(167,     0xe60520a7), /* PORT167CR */
2284         PORTCR(168,     0xe60520a8), /* PORT168CR */
2285         PORTCR(169,     0xe60520a9), /* PORT169CR */
2286         PORTCR(170,     0xe60520aa), /* PORT170CR */
2287         PORTCR(171,     0xe60520ab), /* PORT171CR */
2288         PORTCR(172,     0xe60520ac), /* PORT172CR */
2289         PORTCR(173,     0xe60520ad), /* PORT173CR */
2290         PORTCR(174,     0xe60520ae), /* PORT174CR */
2291         PORTCR(175,     0xe60520af), /* PORT175CR */
2292         PORTCR(176,     0xe60520b0), /* PORT176CR */
2293         PORTCR(177,     0xe60520b1), /* PORT177CR */
2294         PORTCR(178,     0xe60520b2), /* PORT178CR */
2295         PORTCR(179,     0xe60520b3), /* PORT179CR */
2296         PORTCR(180,     0xe60520b4), /* PORT180CR */
2297         PORTCR(181,     0xe60520b5), /* PORT181CR */
2298         PORTCR(182,     0xe60520b6), /* PORT182CR */
2299         PORTCR(183,     0xe60520b7), /* PORT183CR */
2300         PORTCR(184,     0xe60520b8), /* PORT184CR */
2301         PORTCR(185,     0xe60520b9), /* PORT185CR */
2302         PORTCR(186,     0xe60520ba), /* PORT186CR */
2303         PORTCR(187,     0xe60520bb), /* PORT187CR */
2304         PORTCR(188,     0xe60520bc), /* PORT188CR */
2305         PORTCR(189,     0xe60520bd), /* PORT189CR */
2306         PORTCR(190,     0xe60520be), /* PORT190CR */
2307         PORTCR(191,     0xe60520bf), /* PORT191CR */
2308         PORTCR(192,     0xe60520c0), /* PORT192CR */
2309         PORTCR(193,     0xe60520c1), /* PORT193CR */
2310         PORTCR(194,     0xe60520c2), /* PORT194CR */
2311         PORTCR(195,     0xe60520c3), /* PORT195CR */
2312         PORTCR(196,     0xe60520c4), /* PORT196CR */
2313         PORTCR(197,     0xe60520c5), /* PORT197CR */
2314         PORTCR(198,     0xe60520c6), /* PORT198CR */
2315         PORTCR(199,     0xe60520c7), /* PORT199CR */
2316         PORTCR(200,     0xe60520c8), /* PORT200CR */
2317         PORTCR(201,     0xe60520c9), /* PORT201CR */
2318         PORTCR(202,     0xe60520ca), /* PORT202CR */
2319         PORTCR(203,     0xe60520cb), /* PORT203CR */
2320         PORTCR(204,     0xe60520cc), /* PORT204CR */
2321         PORTCR(205,     0xe60520cd), /* PORT205CR */
2322         PORTCR(206,     0xe60520ce), /* PORT206CR */
2323         PORTCR(207,     0xe60520cf), /* PORT207CR */
2324         PORTCR(208,     0xe60520d0), /* PORT208CR */
2325         PORTCR(209,     0xe60520d1), /* PORT209CR */
2326
2327         PORTCR(210,     0xe60530d2), /* PORT210CR */
2328         PORTCR(211,     0xe60530d3), /* PORT211CR */
2329
2330         { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) {
2331                         MSEL1CR_31_0,   MSEL1CR_31_1,
2332                         MSEL1CR_30_0,   MSEL1CR_30_1,
2333                         MSEL1CR_29_0,   MSEL1CR_29_1,
2334                         MSEL1CR_28_0,   MSEL1CR_28_1,
2335                         MSEL1CR_27_0,   MSEL1CR_27_1,
2336                         MSEL1CR_26_0,   MSEL1CR_26_1,
2337                         0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2338                         0, 0, 0, 0, 0, 0, 0, 0,
2339                         MSEL1CR_16_0,   MSEL1CR_16_1,
2340                         MSEL1CR_15_0,   MSEL1CR_15_1,
2341                         MSEL1CR_14_0,   MSEL1CR_14_1,
2342                         MSEL1CR_13_0,   MSEL1CR_13_1,
2343                         MSEL1CR_12_0,   MSEL1CR_12_1,
2344                         0, 0, 0, 0,
2345                         MSEL1CR_9_0,    MSEL1CR_9_1,
2346                         0, 0,
2347                         MSEL1CR_7_0,    MSEL1CR_7_1,
2348                         MSEL1CR_6_0,    MSEL1CR_6_1,
2349                         MSEL1CR_5_0,    MSEL1CR_5_1,
2350                         MSEL1CR_4_0,    MSEL1CR_4_1,
2351                         MSEL1CR_3_0,    MSEL1CR_3_1,
2352                         MSEL1CR_2_0,    MSEL1CR_2_1,
2353                         0, 0,
2354                         MSEL1CR_0_0,    MSEL1CR_0_1,
2355                 }
2356         },
2357         { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
2358                         0, 0, 0, 0, 0, 0, 0, 0,
2359                         0, 0, 0, 0, 0, 0, 0, 0,
2360                         0, 0, 0, 0, 0, 0, 0, 0,
2361                         0, 0, 0, 0, 0, 0, 0, 0,
2362                         MSEL3CR_15_0,   MSEL3CR_15_1,
2363                         0, 0, 0, 0, 0, 0, 0, 0,
2364                         0, 0, 0, 0, 0, 0, 0, 0,
2365                         MSEL3CR_6_0,    MSEL3CR_6_1,
2366                         0, 0, 0, 0, 0, 0, 0, 0,
2367                         0, 0, 0, 0,
2368                         }
2369         },
2370         { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
2371                         0, 0, 0, 0, 0, 0, 0, 0,
2372                         0, 0, 0, 0, 0, 0, 0, 0,
2373                         0, 0, 0, 0, 0, 0, 0, 0,
2374                         MSEL4CR_19_0,   MSEL4CR_19_1,
2375                         MSEL4CR_18_0,   MSEL4CR_18_1,
2376                         0, 0, 0, 0,
2377                         MSEL4CR_15_0,   MSEL4CR_15_1,
2378                         0, 0, 0, 0, 0, 0, 0, 0,
2379                         MSEL4CR_10_0,   MSEL4CR_10_1,
2380                         0, 0, 0, 0, 0, 0,
2381                         MSEL4CR_6_0,    MSEL4CR_6_1,
2382                         0, 0,
2383                         MSEL4CR_4_0,    MSEL4CR_4_1,
2384                         0, 0, 0, 0,
2385                         MSEL4CR_1_0,    MSEL4CR_1_1,
2386                         0, 0,
2387                 }
2388         },
2389         { PINMUX_CFG_REG("MSEL5CR", 0xE6058028, 32, 1) {
2390                         MSEL5CR_31_0,   MSEL5CR_31_1,
2391                         MSEL5CR_30_0,   MSEL5CR_30_1,
2392                         MSEL5CR_29_0,   MSEL5CR_29_1,
2393                         0, 0,
2394                         MSEL5CR_27_0,   MSEL5CR_27_1,
2395                         0, 0,
2396                         MSEL5CR_25_0,   MSEL5CR_25_1,
2397                         0, 0,
2398                         MSEL5CR_23_0,   MSEL5CR_23_1,
2399                         0, 0,
2400                         MSEL5CR_21_0,   MSEL5CR_21_1,
2401                         0, 0,
2402                         MSEL5CR_19_0,   MSEL5CR_19_1,
2403                         0, 0,
2404                         MSEL5CR_17_0,   MSEL5CR_17_1,
2405                         0, 0,
2406                         MSEL5CR_15_0,   MSEL5CR_15_1,
2407                         MSEL5CR_14_0,   MSEL5CR_14_1,
2408                         MSEL5CR_13_0,   MSEL5CR_13_1,
2409                         MSEL5CR_12_0,   MSEL5CR_12_1,
2410                         MSEL5CR_11_0,   MSEL5CR_11_1,
2411                         MSEL5CR_10_0,   MSEL5CR_10_1,
2412                         0, 0,
2413                         MSEL5CR_8_0,    MSEL5CR_8_1,
2414                         MSEL5CR_7_0,    MSEL5CR_7_1,
2415                         MSEL5CR_6_0,    MSEL5CR_6_1,
2416                         MSEL5CR_5_0,    MSEL5CR_5_1,
2417                         MSEL5CR_4_0,    MSEL5CR_4_1,
2418                         MSEL5CR_3_0,    MSEL5CR_3_1,
2419                         MSEL5CR_2_0,    MSEL5CR_2_1,
2420                         0, 0,
2421                         MSEL5CR_0_0,    MSEL5CR_0_1,
2422                 }
2423         },
2424         { },
2425 };
2426
2427 static struct pinmux_data_reg pinmux_data_regs[] = {
2428         { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) {
2429                 PORT31_DATA,    PORT30_DATA,    PORT29_DATA,    PORT28_DATA,
2430                 PORT27_DATA,    PORT26_DATA,    PORT25_DATA,    PORT24_DATA,
2431                 PORT23_DATA,    PORT22_DATA,    PORT21_DATA,    PORT20_DATA,
2432                 PORT19_DATA,    PORT18_DATA,    PORT17_DATA,    PORT16_DATA,
2433                 PORT15_DATA,    PORT14_DATA,    PORT13_DATA,    PORT12_DATA,
2434                 PORT11_DATA,    PORT10_DATA,    PORT9_DATA,     PORT8_DATA,
2435                 PORT7_DATA,     PORT6_DATA,     PORT5_DATA,     PORT4_DATA,
2436                 PORT3_DATA,     PORT2_DATA,     PORT1_DATA,     PORT0_DATA }
2437         },
2438         { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054804, 32) {
2439                 PORT63_DATA,    PORT62_DATA,    PORT61_DATA,    PORT60_DATA,
2440                 PORT59_DATA,    PORT58_DATA,    PORT57_DATA,    PORT56_DATA,
2441                 PORT55_DATA,    PORT54_DATA,    PORT53_DATA,    PORT52_DATA,
2442                 PORT51_DATA,    PORT50_DATA,    PORT49_DATA,    PORT48_DATA,
2443                 PORT47_DATA,    PORT46_DATA,    PORT45_DATA,    PORT44_DATA,
2444                 PORT43_DATA,    PORT42_DATA,    PORT41_DATA,    PORT40_DATA,
2445                 PORT39_DATA,    PORT38_DATA,    PORT37_DATA,    PORT36_DATA,
2446                 PORT35_DATA,    PORT34_DATA,    PORT33_DATA,    PORT32_DATA }
2447         },
2448         { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054808, 32) {
2449                 0, 0, 0, 0,
2450                 0, 0, 0, 0,
2451                 0, 0, 0, 0,
2452                 PORT83_DATA,    PORT82_DATA,    PORT81_DATA,    PORT80_DATA,
2453                 PORT79_DATA,    PORT78_DATA,    PORT77_DATA,    PORT76_DATA,
2454                 PORT75_DATA,    PORT74_DATA,    PORT73_DATA,    PORT72_DATA,
2455                 PORT71_DATA,    PORT70_DATA,    PORT69_DATA,    PORT68_DATA,
2456                 PORT67_DATA,    PORT66_DATA,    PORT65_DATA,    PORT64_DATA }
2457         },
2458         { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055808, 32) {
2459                 PORT95_DATA,    PORT94_DATA,    PORT93_DATA,    PORT92_DATA,
2460                 PORT91_DATA,    PORT90_DATA,    PORT89_DATA,    PORT88_DATA,
2461                 PORT87_DATA,    PORT86_DATA,    PORT85_DATA,    PORT84_DATA,
2462                 0, 0, 0, 0,
2463                 0, 0, 0, 0,
2464                 0, 0, 0, 0,
2465                 0, 0, 0, 0,
2466                 0, 0, 0, 0 }
2467         },
2468         { PINMUX_DATA_REG("PORTD127_096DR", 0xe605580c, 32) {
2469                 0, 0, 0, 0,
2470                 0, 0, 0, 0,
2471                 0, 0, 0, 0,
2472                 0,              PORT114_DATA,   PORT113_DATA,   PORT112_DATA,
2473                 PORT111_DATA,   PORT110_DATA,   PORT109_DATA,   PORT108_DATA,
2474                 PORT107_DATA,   PORT106_DATA,   PORT105_DATA,   PORT104_DATA,
2475                 PORT103_DATA,   PORT102_DATA,   PORT101_DATA,   PORT100_DATA,
2476                 PORT99_DATA,    PORT98_DATA,    PORT97_DATA,    PORT96_DATA }
2477         },
2478         { PINMUX_DATA_REG("PORTR127_096DR", 0xe605680C, 32) {
2479                 PORT127_DATA,   PORT126_DATA,   PORT125_DATA,   PORT124_DATA,
2480                 PORT123_DATA,   PORT122_DATA,   PORT121_DATA,   PORT120_DATA,
2481                 PORT119_DATA,   PORT118_DATA,   PORT117_DATA,   PORT116_DATA,
2482                 PORT115_DATA,   0, 0, 0,
2483                 0, 0, 0, 0,
2484                 0, 0, 0, 0,
2485                 0, 0, 0, 0,
2486                 0, 0, 0, 0 }
2487         },
2488         { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056810, 32) {
2489                 PORT159_DATA,   PORT158_DATA,   PORT157_DATA,   PORT156_DATA,
2490                 PORT155_DATA,   PORT154_DATA,   PORT153_DATA,   PORT152_DATA,
2491                 PORT151_DATA,   PORT150_DATA,   PORT149_DATA,   PORT148_DATA,
2492                 PORT147_DATA,   PORT146_DATA,   PORT145_DATA,   PORT144_DATA,
2493                 PORT143_DATA,   PORT142_DATA,   PORT141_DATA,   PORT140_DATA,
2494                 PORT139_DATA,   PORT138_DATA,   PORT137_DATA,   PORT136_DATA,
2495                 PORT135_DATA,   PORT134_DATA,   PORT133_DATA,   PORT132_DATA,
2496                 PORT131_DATA,   PORT130_DATA,   PORT129_DATA,   PORT128_DATA }
2497         },
2498         { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056814, 32) {
2499                 PORT191_DATA,   PORT190_DATA,   PORT189_DATA,   PORT188_DATA,
2500                 PORT187_DATA,   PORT186_DATA,   PORT185_DATA,   PORT184_DATA,
2501                 PORT183_DATA,   PORT182_DATA,   PORT181_DATA,   PORT180_DATA,
2502                 PORT179_DATA,   PORT178_DATA,   PORT177_DATA,   PORT176_DATA,
2503                 PORT175_DATA,   PORT174_DATA,   PORT173_DATA,   PORT172_DATA,
2504                 PORT171_DATA,   PORT170_DATA,   PORT169_DATA,   PORT168_DATA,
2505                 PORT167_DATA,   PORT166_DATA,   PORT165_DATA,   PORT164_DATA,
2506                 PORT163_DATA,   PORT162_DATA,   PORT161_DATA,   PORT160_DATA }
2507         },
2508         { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056818, 32) {
2509                 0, 0, 0, 0,
2510                 0, 0, 0, 0,
2511                 0, 0, 0, 0,
2512                 0, 0,                           PORT209_DATA,   PORT208_DATA,
2513                 PORT207_DATA,   PORT206_DATA,   PORT205_DATA,   PORT204_DATA,
2514                 PORT203_DATA,   PORT202_DATA,   PORT201_DATA,   PORT200_DATA,
2515                 PORT199_DATA,   PORT198_DATA,   PORT197_DATA,   PORT196_DATA,
2516                 PORT195_DATA,   PORT194_DATA,   PORT193_DATA,   PORT192_DATA }
2517         },
2518         { PINMUX_DATA_REG("PORTU223_192DR", 0xe6057818, 32) {
2519                 0, 0, 0, 0,
2520                 0, 0, 0, 0,
2521                 0, 0, 0, 0,
2522                 PORT211_DATA,   PORT210_DATA, 0, 0,
2523                 0, 0, 0, 0,
2524                 0, 0, 0, 0,
2525                 0, 0, 0, 0,
2526                 0, 0, 0, 0 }
2527         },
2528         { },
2529 };
2530
2531 static struct pinmux_irq pinmux_irqs[] = {
2532         PINMUX_IRQ(evt2irq(0x0200), PORT2_FN0,   PORT13_FN0),   /* IRQ0A */
2533         PINMUX_IRQ(evt2irq(0x0220), PORT20_FN0),                /* IRQ1A */
2534         PINMUX_IRQ(evt2irq(0x0240), PORT11_FN0,  PORT12_FN0),   /* IRQ2A */
2535         PINMUX_IRQ(evt2irq(0x0260), PORT10_FN0,  PORT14_FN0),   /* IRQ3A */
2536         PINMUX_IRQ(evt2irq(0x0280), PORT15_FN0,  PORT172_FN0),  /* IRQ4A */
2537         PINMUX_IRQ(evt2irq(0x02A0), PORT0_FN0,   PORT1_FN0),    /* IRQ5A */
2538         PINMUX_IRQ(evt2irq(0x02C0), PORT121_FN0, PORT173_FN0),  /* IRQ6A */
2539         PINMUX_IRQ(evt2irq(0x02E0), PORT120_FN0, PORT209_FN0),  /* IRQ7A */
2540         PINMUX_IRQ(evt2irq(0x0300), PORT119_FN0),               /* IRQ8A */
2541         PINMUX_IRQ(evt2irq(0x0320), PORT118_FN0, PORT210_FN0),  /* IRQ9A */
2542         PINMUX_IRQ(evt2irq(0x0340), PORT19_FN0),                /* IRQ10A */
2543         PINMUX_IRQ(evt2irq(0x0360), PORT104_FN0),               /* IRQ11A */
2544         PINMUX_IRQ(evt2irq(0x0380), PORT42_FN0,  PORT97_FN0),   /* IRQ12A */
2545         PINMUX_IRQ(evt2irq(0x03A0), PORT64_FN0,  PORT98_FN0),   /* IRQ13A */
2546         PINMUX_IRQ(evt2irq(0x03C0), PORT63_FN0,  PORT99_FN0),   /* IRQ14A */
2547         PINMUX_IRQ(evt2irq(0x03E0), PORT62_FN0,  PORT100_FN0),  /* IRQ15A */
2548         PINMUX_IRQ(evt2irq(0x3200), PORT68_FN0,  PORT211_FN0),  /* IRQ16A */
2549         PINMUX_IRQ(evt2irq(0x3220), PORT69_FN0),                /* IRQ17A */
2550         PINMUX_IRQ(evt2irq(0x3240), PORT70_FN0),                /* IRQ18A */
2551         PINMUX_IRQ(evt2irq(0x3260), PORT71_FN0),                /* IRQ19A */
2552         PINMUX_IRQ(evt2irq(0x3280), PORT67_FN0),                /* IRQ20A */
2553         PINMUX_IRQ(evt2irq(0x32A0), PORT202_FN0),               /* IRQ21A */
2554         PINMUX_IRQ(evt2irq(0x32C0), PORT95_FN0),                /* IRQ22A */
2555         PINMUX_IRQ(evt2irq(0x32E0), PORT96_FN0),                /* IRQ23A */
2556         PINMUX_IRQ(evt2irq(0x3300), PORT180_FN0),               /* IRQ24A */
2557         PINMUX_IRQ(evt2irq(0x3320), PORT38_FN0),                /* IRQ25A */
2558         PINMUX_IRQ(evt2irq(0x3340), PORT58_FN0,  PORT81_FN0),   /* IRQ26A */
2559         PINMUX_IRQ(evt2irq(0x3360), PORT57_FN0,  PORT168_FN0),  /* IRQ27A */
2560         PINMUX_IRQ(evt2irq(0x3380), PORT56_FN0,  PORT169_FN0),  /* IRQ28A */
2561         PINMUX_IRQ(evt2irq(0x33A0), PORT50_FN0,  PORT170_FN0),  /* IRQ29A */
2562         PINMUX_IRQ(evt2irq(0x33C0), PORT49_FN0,  PORT171_FN0),  /* IRQ30A */
2563         PINMUX_IRQ(evt2irq(0x33E0), PORT41_FN0,  PORT167_FN0),  /* IRQ31A */
2564 };
2565
2566 static struct pinmux_info r8a7740_pinmux_info = {
2567         .name           = "r8a7740_pfc",
2568         .reserved_id    = PINMUX_RESERVED,
2569         .data           = { PINMUX_DATA_BEGIN,
2570                             PINMUX_DATA_END },
2571         .input          = { PINMUX_INPUT_BEGIN,
2572                             PINMUX_INPUT_END },
2573         .input_pu       = { PINMUX_INPUT_PULLUP_BEGIN,
2574                             PINMUX_INPUT_PULLUP_END },
2575         .input_pd       = { PINMUX_INPUT_PULLDOWN_BEGIN,
2576                             PINMUX_INPUT_PULLDOWN_END },
2577         .output         = { PINMUX_OUTPUT_BEGIN,
2578                             PINMUX_OUTPUT_END },
2579         .mark           = { PINMUX_MARK_BEGIN,
2580                             PINMUX_MARK_END },
2581         .function       = { PINMUX_FUNCTION_BEGIN,
2582                             PINMUX_FUNCTION_END },
2583
2584         .first_gpio     = GPIO_PORT0,
2585         .last_gpio      = GPIO_FN_TRACEAUD_FROM_MEMC,
2586
2587         .gpios          = pinmux_gpios,
2588         .cfg_regs       = pinmux_config_regs,
2589         .data_regs      = pinmux_data_regs,
2590
2591         .gpio_data      = pinmux_data,
2592         .gpio_data_size = ARRAY_SIZE(pinmux_data),
2593
2594         .gpio_irq       = pinmux_irqs,
2595         .gpio_irq_size  = ARRAY_SIZE(pinmux_irqs),
2596 };
2597
2598 void r8a7740_pinmux_init(void)
2599 {
2600         register_pinmux(&r8a7740_pinmux_info);
2601 }