Pileus Git - ~andy/linux/blob - arch/arm/mach-sa1100/cerf.c

   1 /*
   2  * linux/arch/arm/mach-sa1100/cerf.c
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * Apr-2003 : Removed some old PDA crud [FB]
   9  * Oct-2003 : Added uart2 resource [FB]
  10  * Jan-2004 : Removed io map for flash [FB]
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/kernel.h>
  15 #include <linux/tty.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/irq.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/partitions.h>
  20
  21 #include <mach/hardware.h>
  22 #include <asm/setup.h>
  23
  24 #include <asm/mach-types.h>
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/flash.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/serial_sa1100.h>
  29
  30 #include <mach/cerf.h>
  31 #include <mach/mcp.h>
  32 #include <mach/irqs.h>
  33 #include "generic.h"
  34
  35 static struct resource cerfuart2_resources[] = {
  36         [0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
  37 };
  38
  39 static struct platform_device cerfuart2_device = {
  40         .name           = "sa11x0-uart",
  41         .id             = 2,
  42         .num_resources  = ARRAY_SIZE(cerfuart2_resources),
  43         .resource       = cerfuart2_resources,
  44 };
  45
  46 static struct platform_device *cerf_devices[] __initdata = {
  47         &cerfuart2_device,
  48 };
  49
  50 #ifdef CONFIG_SA1100_CERF_FLASH_32MB
  51 #  define CERF_FLASH_SIZE       0x02000000
  52 #elif defined CONFIG_SA1100_CERF_FLASH_16MB
  53 #  define CERF_FLASH_SIZE       0x01000000
  54 #elif defined CONFIG_SA1100_CERF_FLASH_8MB
  55 #  define CERF_FLASH_SIZE       0x00800000
  56 #else
  57 #  error "Undefined flash size for CERF"
  58 #endif
  59
  60 static struct mtd_partition cerf_partitions[] = {
  61         {
  62                 .name           = "Bootloader",
  63                 .size           = 0x00020000,
  64                 .offset         = 0x00000000,
  65         }, {
  66                 .name           = "Params",
  67                 .size           = 0x00040000,
  68                 .offset         = 0x00020000,
  69         }, {
  70                 .name           = "Kernel",
  71                 .size           = 0x00100000,
  72                 .offset         = 0x00060000,
  73         }, {
  74                 .name           = "Filesystem",
  75                 .size           = CERF_FLASH_SIZE-0x00160000,
  76                 .offset         = 0x00160000,
  77         }
  78 };
  79
  80 static struct flash_platform_data cerf_flash_data = {
  81         .map_name       = "cfi_probe",
  82         .parts          = cerf_partitions,
  83         .nr_parts       = ARRAY_SIZE(cerf_partitions),
  84 };
  85
  86 static struct resource cerf_flash_resource =
  87         DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
  88
  89 static void __init cerf_init_irq(void)
  90 {
  91         sa1100_init_irq();
  92         irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
  93 }
  94
  95 static struct map_desc cerf_io_desc[] __initdata = {
  96         {       /* Crystal Ethernet Chip */
  97                 .virtual        =  0xf0000000,
  98                 .pfn            = __phys_to_pfn(0x08000000),
  99                 .length         = 0x00100000,
 100                 .type           = MT_DEVICE
 101         }
 102 };
 103
 104 static void __init cerf_map_io(void)
 105 {
 106         sa1100_map_io();
 107         iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
 108
 109         sa1100_register_uart(0, 3);
 110         sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
 111         sa1100_register_uart(2, 1);
 112
 113         /* set some GPDR bits here while it's safe */
 114         GPDR |= CERF_GPIO_CF_RESET;
 115 }
 116
 117 static struct mcp_plat_data cerf_mcp_data = {
 118         .mccr0          = MCCR0_ADM,
 119         .sclk_rate      = 11981000,
 120 };
 121
 122 static void __init cerf_init(void)
 123 {
 124         sa11x0_ppc_configure_mcp();
 125         platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
 126         sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
 127         sa11x0_register_mcp(&cerf_mcp_data);
 128 }
 129
 130 MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
 131         /* Maintainer: support@intrinsyc.com */
 132         .map_io         = cerf_map_io,
 133         .nr_irqs        = SA1100_NR_IRQS,
 134         .init_irq       = cerf_init_irq,
 135         .timer          = &sa1100_timer,
 136         .init_machine   = cerf_init,
 137         .restart        = sa11x0_restart,
 138 MACHINE_END