2 * arch/arm/mach-orion5x/common.c
4 * Core functions for Marvell Orion 5x SoCs
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/serial_8250.h>
18 #include <linux/mv643xx_i2c.h>
19 #include <linux/ata_platform.h>
20 #include <linux/delay.h>
21 #include <linux/clk-provider.h>
24 #include <asm/setup.h>
25 #include <asm/system_misc.h>
26 #include <asm/timex.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/time.h>
30 #include <mach/bridge-regs.h>
31 #include <mach/hardware.h>
32 #include <mach/orion5x.h>
33 #include <linux/platform_data/mtd-orion_nand.h>
34 #include <linux/platform_data/usb-ehci-orion.h>
35 #include <plat/time.h>
36 #include <plat/common.h>
37 #include <plat/addr-map.h>
40 /*****************************************************************************
42 ****************************************************************************/
43 static struct map_desc orion5x_io_desc[] __initdata = {
45 .virtual = (unsigned long) ORION5X_REGS_VIRT_BASE,
46 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
47 .length = ORION5X_REGS_SIZE,
50 .virtual = (unsigned long) ORION5X_PCIE_WA_VIRT_BASE,
51 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
52 .length = ORION5X_PCIE_WA_SIZE,
57 void __init orion5x_map_io(void)
59 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
63 /*****************************************************************************
65 ****************************************************************************/
66 static struct clk *tclk;
68 static void __init clk_init(void)
70 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
73 orion_clkdev_init(tclk);
76 /*****************************************************************************
78 ****************************************************************************/
79 void __init orion5x_ehci0_init(void)
81 orion_ehci_init(ORION5X_USB0_PHYS_BASE, IRQ_ORION5X_USB0_CTRL,
86 /*****************************************************************************
88 ****************************************************************************/
89 void __init orion5x_ehci1_init(void)
91 orion_ehci_1_init(ORION5X_USB1_PHYS_BASE, IRQ_ORION5X_USB1_CTRL);
95 /*****************************************************************************
97 ****************************************************************************/
98 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
100 orion_ge00_init(eth_data,
101 ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
103 MV643XX_TX_CSUM_DEFAULT_LIMIT);
107 /*****************************************************************************
109 ****************************************************************************/
110 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
112 orion_ge00_switch_init(d, irq);
116 /*****************************************************************************
118 ****************************************************************************/
119 void __init orion5x_i2c_init(void)
121 orion_i2c_init(I2C_PHYS_BASE, IRQ_ORION5X_I2C, 8);
126 /*****************************************************************************
128 ****************************************************************************/
129 void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
131 orion_sata_init(sata_data, ORION5X_SATA_PHYS_BASE, IRQ_ORION5X_SATA);
135 /*****************************************************************************
137 ****************************************************************************/
138 void __init orion5x_spi_init()
140 orion_spi_init(SPI_PHYS_BASE);
144 /*****************************************************************************
146 ****************************************************************************/
147 void __init orion5x_uart0_init(void)
149 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
150 IRQ_ORION5X_UART0, tclk);
153 /*****************************************************************************
155 ****************************************************************************/
156 void __init orion5x_uart1_init(void)
158 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
159 IRQ_ORION5X_UART1, tclk);
162 /*****************************************************************************
164 ****************************************************************************/
165 void __init orion5x_xor_init(void)
167 orion_xor0_init(ORION5X_XOR_PHYS_BASE,
168 ORION5X_XOR_PHYS_BASE + 0x200,
169 IRQ_ORION5X_XOR0, IRQ_ORION5X_XOR1);
172 /*****************************************************************************
173 * Cryptographic Engines and Security Accelerator (CESA)
174 ****************************************************************************/
175 static void __init orion5x_crypto_init(void)
177 orion5x_setup_sram_win();
178 orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,
179 SZ_8K, IRQ_ORION5X_CESA);
182 /*****************************************************************************
184 ****************************************************************************/
185 void __init orion5x_wdt_init(void)
191 /*****************************************************************************
193 ****************************************************************************/
194 void __init orion5x_init_early(void)
196 orion_time_set_base(TIMER_VIRT_BASE);
199 * Some Orion5x devices allocate their coherent buffers from atomic
200 * context. Increase size of atomic coherent pool to make sure such
201 * the allocations won't fail.
203 init_dma_coherent_pool_size(SZ_1M);
208 int __init orion5x_find_tclk(void)
212 orion5x_pcie_id(&dev, &rev);
213 if (dev == MV88F6183_DEV_ID &&
214 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
220 static void __init orion5x_timer_init(void)
222 orion5x_tclk = orion5x_find_tclk();
224 orion_time_init(ORION5X_BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
225 IRQ_ORION5X_BRIDGE, orion5x_tclk);
228 struct sys_timer orion5x_timer = {
229 .init = orion5x_timer_init,
233 /*****************************************************************************
235 ****************************************************************************/
237 * Identify device ID and rev from PCIe configuration header space '0'.
239 static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
241 orion5x_pcie_id(dev, rev);
243 if (*dev == MV88F5281_DEV_ID) {
244 if (*rev == MV88F5281_REV_D2) {
245 *dev_name = "MV88F5281-D2";
246 } else if (*rev == MV88F5281_REV_D1) {
247 *dev_name = "MV88F5281-D1";
248 } else if (*rev == MV88F5281_REV_D0) {
249 *dev_name = "MV88F5281-D0";
251 *dev_name = "MV88F5281-Rev-Unsupported";
253 } else if (*dev == MV88F5182_DEV_ID) {
254 if (*rev == MV88F5182_REV_A2) {
255 *dev_name = "MV88F5182-A2";
257 *dev_name = "MV88F5182-Rev-Unsupported";
259 } else if (*dev == MV88F5181_DEV_ID) {
260 if (*rev == MV88F5181_REV_B1) {
261 *dev_name = "MV88F5181-Rev-B1";
262 } else if (*rev == MV88F5181L_REV_A1) {
263 *dev_name = "MV88F5181L-Rev-A1";
265 *dev_name = "MV88F5181(L)-Rev-Unsupported";
267 } else if (*dev == MV88F6183_DEV_ID) {
268 if (*rev == MV88F6183_REV_B0) {
269 *dev_name = "MV88F6183-Rev-B0";
271 *dev_name = "MV88F6183-Rev-Unsupported";
274 *dev_name = "Device-Unknown";
278 void __init orion5x_init(void)
283 orion5x_id(&dev, &rev, &dev_name);
284 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
287 * Setup Orion address map
289 orion5x_setup_cpu_mbus_bridge();
291 /* Setup root of clk tree */
295 * Don't issue "Wait for Interrupt" instruction if we are
296 * running on D0 5281 silicon.
298 if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
299 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
304 * The 5082/5181l/5182/6082/6082l/6183 have crypto
305 * while 5180n/5181/5281 don't have crypto.
307 if ((dev == MV88F5181_DEV_ID && rev >= MV88F5181L_REV_A0) ||
308 dev == MV88F5182_DEV_ID || dev == MV88F6183_DEV_ID)
309 orion5x_crypto_init();
312 * Register watchdog driver
317 void orion5x_restart(char mode, const char *cmd)
320 * Enable and issue soft reset
322 orion5x_setbits(RSTOUTn_MASK, (1 << 2));
323 orion5x_setbits(CPU_SOFT_RESET, 1);
325 orion5x_clrbits(CPU_SOFT_RESET, 1);
329 * Many orion-based systems have buggy bootloader implementations.
330 * This is a common fixup for bogus memory tags.
332 void __init tag_fixup_mem32(struct tag *t, char **from,
333 struct meminfo *meminfo)
335 for (; t->hdr.size; t = tag_next(t))
336 if (t->hdr.tag == ATAG_MEM &&
337 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
338 t->u.mem.start & ~PAGE_MASK)) {
340 "Clearing invalid memory bank %dKB@0x%08x\n",
341 t->u.mem.size / 1024, t->u.mem.start);