2 * OMAP Voltage Controller (VC) interface
4 * Copyright (C) 2011 Texas Instruments, Inc.
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/bug.h>
16 #include <asm/div64.h>
22 #include "prm-regbits-34xx.h"
23 #include "prm-regbits-44xx.h"
29 * struct omap_vc_channel_cfg - describe the cfg_channel bitfield
30 * @sa: bit for slave address
31 * @rav: bit for voltage configuration register
32 * @rac: bit for command configuration register
33 * @racen: enable bit for RAC
34 * @cmd: bit for command value set selection
36 * Channel configuration bits, common for OMAP3+
37 * OMAP3 register: PRM_VC_CH_CONF
38 * OMAP4 register: PRM_VC_CFG_CHANNEL
39 * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG
41 struct omap_vc_channel_cfg {
49 static struct omap_vc_channel_cfg vc_default_channel_cfg = {
58 * On OMAP3+, all VC channels have the above default bitfield
59 * configuration, except the OMAP4 MPU channel. This appears
60 * to be a freak accident as every other VC channel has the
61 * default configuration, thus creating a mutant channel config.
63 static struct omap_vc_channel_cfg vc_mutant_channel_cfg = {
71 static struct omap_vc_channel_cfg *vc_cfg_bits;
72 #define CFG_CHANNEL_MASK 0x1f
75 * omap_vc_config_channel - configure VC channel to PMIC mappings
76 * @voltdm: pointer to voltagdomain defining the desired VC channel
78 * Configures the VC channel to PMIC mappings for the following
80 * - i2c slave address (SA)
81 * - voltage configuration address (RAV)
82 * - command configuration address (RAC) and enable bit (RACEN)
83 * - command values for ON, ONLP, RET and OFF (CMD)
85 * This function currently only allows flexible configuration of the
86 * non-default channel. Starting with OMAP4, there are more than 2
87 * channels, with one defined as the default (on OMAP4, it's MPU.)
88 * Only the non-default channel can be configured.
90 static int omap_vc_config_channel(struct voltagedomain *voltdm)
92 struct omap_vc_channel *vc = voltdm->vc;
95 * For default channel, the only configurable bit is RACEN.
96 * All others must stay at zero (see function comment above.)
98 if (vc->flags & OMAP_VC_CHANNEL_DEFAULT)
99 vc->cfg_channel &= vc_cfg_bits->racen;
101 voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
102 vc->cfg_channel << vc->cfg_channel_sa_shift,
103 vc->cfg_channel_reg);
108 /* Voltage scale and accessory APIs */
109 int omap_vc_pre_scale(struct voltagedomain *voltdm,
110 unsigned long target_volt,
111 u8 *target_vsel, u8 *current_vsel)
113 struct omap_vc_channel *vc = voltdm->vc;
116 /* Check if sufficient pmic info is available for this vdd */
118 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
119 __func__, voltdm->name);
123 if (!voltdm->pmic->uv_to_vsel) {
124 pr_err("%s: PMIC function to convert voltage in uV to vsel not registered. Hence unable to scale voltage for vdd_%s\n",
125 __func__, voltdm->name);
129 if (!voltdm->read || !voltdm->write) {
130 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
131 __func__, voltdm->name);
135 *target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
136 *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt);
138 /* Setting the ON voltage to the new target voltage */
139 vc_cmdval = voltdm->read(vc->cmdval_reg);
140 vc_cmdval &= ~vc->common->cmd_on_mask;
141 vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
142 voltdm->write(vc_cmdval, vc->cmdval_reg);
144 voltdm->vc_param->on = target_volt;
146 omap_vp_update_errorgain(voltdm, target_volt);
151 void omap_vc_post_scale(struct voltagedomain *voltdm,
152 unsigned long target_volt,
153 u8 target_vsel, u8 current_vsel)
155 u32 smps_steps = 0, smps_delay = 0;
157 smps_steps = abs(target_vsel - current_vsel);
158 /* SMPS slew rate / step size. 2us added as buffer. */
159 smps_delay = ((smps_steps * voltdm->pmic->step_size) /
160 voltdm->pmic->slew_rate) + 2;
164 /* vc_bypass_scale - VC bypass method of voltage scaling */
165 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
166 unsigned long target_volt)
168 struct omap_vc_channel *vc = voltdm->vc;
169 u32 loop_cnt = 0, retries_cnt = 0;
170 u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
171 u8 target_vsel, current_vsel;
174 ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel);
178 vc_valid = vc->common->valid;
179 vc_bypass_val_reg = vc->common->bypass_val_reg;
180 vc_bypass_value = (target_vsel << vc->common->data_shift) |
181 (vc->volt_reg_addr << vc->common->regaddr_shift) |
182 (vc->i2c_slave_addr << vc->common->slaveaddr_shift);
184 voltdm->write(vc_bypass_value, vc_bypass_val_reg);
185 voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
187 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
189 * Loop till the bypass command is acknowledged from the SMPS.
190 * NOTE: This is legacy code. The loop count and retry count needs
193 while (!(vc_bypass_value & vc_valid)) {
196 if (retries_cnt > 10) {
197 pr_warning("%s: Retry count exceeded\n", __func__);
206 vc_bypass_value = voltdm->read(vc_bypass_val_reg);
209 omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
213 /* Convert microsecond value to number of 32kHz clock cycles */
214 static inline u32 omap_usec_to_32k(u32 usec)
216 return DIV_ROUND_UP_ULL(32768ULL * (u64)usec, 1000000ULL);
219 /* Set oscillator setup time for omap3 */
220 static void omap3_set_clksetup(u32 usec, struct voltagedomain *voltdm)
222 voltdm->write(omap_usec_to_32k(usec), OMAP3_PRM_CLKSETUP_OFFSET);
226 * omap3_set_i2c_timings - sets i2c sleep timings for a channel
227 * @voltdm: channel to configure
228 * @off_mode: select whether retention or off mode values used
230 * Calculates and sets up voltage controller to use I2C based
231 * voltage scaling for sleep modes. This can be used for either off mode
232 * or retention. Off mode has additionally an option to use sys_off_mode
233 * pad, which uses a global signal to program the whole power IC to
236 static void omap3_set_i2c_timings(struct voltagedomain *voltdm, bool off_mode)
238 unsigned long voltsetup1;
242 * Oscillator is shut down only if we are using sys_off_mode pad,
243 * thus we set a minimal setup time here
245 omap3_set_clksetup(1, voltdm);
248 tgt_volt = voltdm->vc_param->off;
250 tgt_volt = voltdm->vc_param->ret;
252 voltsetup1 = (voltdm->vc_param->on - tgt_volt) /
253 voltdm->pmic->slew_rate;
255 voltsetup1 = voltsetup1 * voltdm->sys_clk.rate / 8 / 1000000 + 1;
257 voltdm->rmw(voltdm->vfsm->voltsetup_mask,
258 voltsetup1 << __ffs(voltdm->vfsm->voltsetup_mask),
259 voltdm->vfsm->voltsetup_reg);
262 * pmic is not controlling the voltage scaling during retention,
263 * thus set voltsetup2 to 0
265 voltdm->write(0, OMAP3_PRM_VOLTSETUP2_OFFSET);
269 * omap3_set_off_timings - sets off-mode timings for a channel
270 * @voltdm: channel to configure
272 * Calculates and sets up off-mode timings for a channel. Off-mode
273 * can use either I2C based voltage scaling, or alternatively
274 * sys_off_mode pad can be used to send a global command to power IC.
275 * This function first checks which mode is being used, and calls
276 * omap3_set_i2c_timings() if the system is using I2C control mode.
277 * sys_off_mode has the additional benefit that voltages can be
278 * scaled to zero volt level with TWL4030 / TWL5030, I2C can only
281 static void omap3_set_off_timings(struct voltagedomain *voltdm)
283 unsigned long clksetup;
284 unsigned long voltsetup2;
285 unsigned long voltsetup2_old;
289 /* check if sys_off_mode is used to control off-mode voltages */
290 val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
291 if (!(val & OMAP3430_SEL_OFF_MASK)) {
292 /* No, omap is controlling them over I2C */
293 omap3_set_i2c_timings(voltdm, true);
297 omap_pm_get_oscillator(&tstart, &tshut);
298 omap3_set_clksetup(tstart, voltdm);
300 clksetup = voltdm->read(OMAP3_PRM_CLKSETUP_OFFSET);
302 /* voltsetup 2 in us */
303 voltsetup2 = voltdm->vc_param->on / voltdm->pmic->slew_rate;
305 /* convert to 32k clk cycles */
306 voltsetup2 = DIV_ROUND_UP(voltsetup2 * 32768, 1000000);
308 voltsetup2_old = voltdm->read(OMAP3_PRM_VOLTSETUP2_OFFSET);
311 * Update voltsetup2 if higher than current value (needed because
312 * we have multiple channels with different ramp times), also
313 * update voltoffset always to value recommended by TRM
315 if (voltsetup2 > voltsetup2_old) {
316 voltdm->write(voltsetup2, OMAP3_PRM_VOLTSETUP2_OFFSET);
317 voltdm->write(clksetup - voltsetup2,
318 OMAP3_PRM_VOLTOFFSET_OFFSET);
320 voltdm->write(clksetup - voltsetup2_old,
321 OMAP3_PRM_VOLTOFFSET_OFFSET);
324 * omap is not controlling voltage scaling during off-mode,
325 * thus set voltsetup1 to 0
327 voltdm->rmw(voltdm->vfsm->voltsetup_mask, 0,
328 voltdm->vfsm->voltsetup_reg);
330 /* voltoffset must be clksetup minus voltsetup2 according to TRM */
331 voltdm->write(clksetup - voltsetup2, OMAP3_PRM_VOLTOFFSET_OFFSET);
334 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
336 omap3_set_off_timings(voltdm);
340 * omap4_calc_volt_ramp - calculates voltage ramping delays on omap4
341 * @voltdm: channel to calculate values for
342 * @voltage_diff: voltage difference in microvolts
344 * Calculates voltage ramp prescaler + counter values for a voltage
345 * difference on omap4. Returns a field value suitable for writing to
346 * VOLTSETUP register for a channel in following format:
347 * bits[8:9] prescaler ... bits[0:5] counter. See OMAP4 TRM for reference.
349 static u32 omap4_calc_volt_ramp(struct voltagedomain *voltdm, u32 voltage_diff)
355 time = voltage_diff / voltdm->pmic->slew_rate;
357 cycles = voltdm->sys_clk.rate / 1000 * time / 1000;
362 /* shift to next prescaler until no overflow */
364 /* scale for div 256 = 64 * 4 */
370 /* scale for div 512 = 256 * 2 */
376 /* scale for div 2048 = 512 * 4 */
382 /* check for overflow => invalid ramp time */
384 pr_warn("%s: invalid setuptime for vdd_%s\n", __func__,
391 return (prescaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) |
392 (cycles << OMAP4430_RAMP_UP_COUNT_SHIFT);
396 * omap4_usec_to_val_scrm - convert microsecond value to SCRM module bitfield
397 * @usec: microseconds
398 * @shift: number of bits to shift left
399 * @mask: bitfield mask
401 * Converts microsecond value to OMAP4 SCRM bitfield. Bitfield is
402 * shifted to requested position, and checked agains the mask value.
403 * If larger, forced to the max value of the field (i.e. the mask itself.)
404 * Returns the SCRM bitfield value.
406 static u32 omap4_usec_to_val_scrm(u32 usec, int shift, u32 mask)
410 val = omap_usec_to_32k(usec) << shift;
412 /* Check for overflow, if yes, force to max value */
420 * omap4_set_timings - set voltage ramp timings for a channel
421 * @voltdm: channel to configure
422 * @off_mode: whether off-mode values are used
424 * Calculates and sets the voltage ramp up / down values for a channel.
426 static void omap4_set_timings(struct voltagedomain *voltdm, bool off_mode)
434 ramp = omap4_calc_volt_ramp(voltdm,
435 voltdm->vc_param->on - voltdm->vc_param->off);
436 offset = voltdm->vfsm->voltsetup_off_reg;
438 ramp = omap4_calc_volt_ramp(voltdm,
439 voltdm->vc_param->on - voltdm->vc_param->ret);
440 offset = voltdm->vfsm->voltsetup_reg;
446 val = voltdm->read(offset);
448 val |= ramp << OMAP4430_RAMP_DOWN_COUNT_SHIFT;
450 val |= ramp << OMAP4430_RAMP_UP_COUNT_SHIFT;
452 voltdm->write(val, offset);
454 omap_pm_get_oscillator(&tstart, &tshut);
456 val = omap4_usec_to_val_scrm(tstart, OMAP4_SETUPTIME_SHIFT,
457 OMAP4_SETUPTIME_MASK);
458 val |= omap4_usec_to_val_scrm(tshut, OMAP4_DOWNTIME_SHIFT,
459 OMAP4_DOWNTIME_MASK);
461 __raw_writel(val, OMAP4_SCRM_CLKSETUPTIME);
464 /* OMAP4 specific voltage init functions */
465 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
467 static bool is_initialized;
470 omap4_set_timings(voltdm, true);
471 omap4_set_timings(voltdm, false);
476 /* XXX These are magic numbers and do not belong! */
477 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
478 voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
480 is_initialized = true;
484 * omap_vc_i2c_init - initialize I2C interface to PMIC
485 * @voltdm: voltage domain containing VC data
487 * Use PMIC supplied settings for I2C high-speed mode and
488 * master code (if set) and program the VC I2C configuration
491 * The VC I2C configuration is common to all VC channels,
492 * so this function only configures I2C for the first VC
493 * channel registers. All other VC channels will use the
494 * same configuration.
496 static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
498 struct omap_vc_channel *vc = voltdm->vc;
499 static bool initialized;
500 static bool i2c_high_speed;
504 if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
505 pr_warn("%s: I2C config for vdd_%s does not match other channels (%u).",
506 __func__, voltdm->name, i2c_high_speed);
510 i2c_high_speed = voltdm->pmic->i2c_high_speed;
512 voltdm->rmw(vc->common->i2c_cfg_hsen_mask,
513 vc->common->i2c_cfg_hsen_mask,
514 vc->common->i2c_cfg_reg);
516 mcode = voltdm->pmic->i2c_mcode;
518 voltdm->rmw(vc->common->i2c_mcode_mask,
519 mcode << __ffs(vc->common->i2c_mcode_mask),
520 vc->common->i2c_cfg_reg);
526 * omap_vc_calc_vsel - calculate vsel value for a channel
527 * @voltdm: channel to calculate value for
528 * @uvolt: microvolt value to convert to vsel
530 * Converts a microvolt value to vsel value for the used PMIC.
531 * This checks whether the microvolt value is out of bounds, and
532 * adjusts the value accordingly. If unsupported value detected,
535 static u8 omap_vc_calc_vsel(struct voltagedomain *voltdm, u32 uvolt)
537 if (voltdm->pmic->vddmin > uvolt)
538 uvolt = voltdm->pmic->vddmin;
539 if (voltdm->pmic->vddmax < uvolt) {
540 WARN(1, "%s: voltage not supported by pmic: %u vs max %u\n",
541 __func__, uvolt, voltdm->pmic->vddmax);
542 /* Lets try maximum value anyway */
543 uvolt = voltdm->pmic->vddmax;
546 return voltdm->pmic->uv_to_vsel(uvolt);
549 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
551 struct omap_vc_channel *vc = voltdm->vc;
552 u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
555 if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
556 pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
560 if (!voltdm->read || !voltdm->write) {
561 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
562 __func__, voltdm->name);
567 if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT)
568 vc_cfg_bits = &vc_mutant_channel_cfg;
570 vc_cfg_bits = &vc_default_channel_cfg;
572 /* get PMIC/board specific settings */
573 vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
574 vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
575 vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
577 /* Configure the i2c slave address for this VC */
578 voltdm->rmw(vc->smps_sa_mask,
579 vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
581 vc->cfg_channel |= vc_cfg_bits->sa;
584 * Configure the PMIC register addresses.
586 voltdm->rmw(vc->smps_volra_mask,
587 vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
589 vc->cfg_channel |= vc_cfg_bits->rav;
591 if (vc->cmd_reg_addr) {
592 voltdm->rmw(vc->smps_cmdra_mask,
593 vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
595 vc->cfg_channel |= vc_cfg_bits->rac;
598 if (vc->cmd_reg_addr == vc->volt_reg_addr)
599 vc->cfg_channel |= vc_cfg_bits->racen;
601 /* Set up the on, inactive, retention and off voltage */
602 on_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->on);
603 onlp_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->onlp);
604 ret_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->ret);
605 off_vsel = omap_vc_calc_vsel(voltdm, voltdm->vc_param->off);
607 val = ((on_vsel << vc->common->cmd_on_shift) |
608 (onlp_vsel << vc->common->cmd_onlp_shift) |
609 (ret_vsel << vc->common->cmd_ret_shift) |
610 (off_vsel << vc->common->cmd_off_shift));
611 voltdm->write(val, vc->cmdval_reg);
612 vc->cfg_channel |= vc_cfg_bits->cmd;
614 /* Channel configuration */
615 omap_vc_config_channel(voltdm);
617 omap_vc_i2c_init(voltdm);
619 if (cpu_is_omap34xx())
620 omap3_vc_init_channel(voltdm);
621 else if (cpu_is_omap44xx())
622 omap4_vc_init_channel(voltdm);