Pileus Git - ~andy/linux/blob - arch/arm/mach-omap2/prm2xxx.c

   1 /*
   2  * OMAP2xxx PRM module functions
   3  *
   4  * Copyright (C) 2010-2012 Texas Instruments, Inc.
   5  * Copyright (C) 2010 Nokia Corporation
   6  * Benoît Cousson
   7  * Paul Walmsley
   8  * Rajendra Nayak <rnayak@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/err.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20
  21 #include "common.h"
  22 #include <plat/cpu.h>
  23
  24 #include "vp.h"
  25 #include "powerdomain.h"
  26 #include "clockdomain.h"
  27 #include "prm2xxx.h"
  28 #include "cm2xxx_3xxx.h"
  29 #include "prm-regbits-24xx.h"
  30
  31 /*
  32  * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
  33  * these are reversed from the bits used on OMAP3+
  34  */
  35 #define OMAP24XX_PWRDM_POWER_ON                 0x0
  36 #define OMAP24XX_PWRDM_POWER_RET                0x1
  37 #define OMAP24XX_PWRDM_POWER_OFF                0x3
  38
  39 /*
  40  * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
  41  *   hardware register (which are specific to the OMAP2xxx SoCs) to
  42  *   reset source ID bit shifts (which is an OMAP SoC-independent
  43  *   enumeration)
  44  */
  45 static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = {
  46         { OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
  47         { OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
  48         { OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
  49         { OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
  50         { OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT },
  51         { OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
  52         { -1, -1 },
  53 };
  54
  55 /**
  56  * omap2xxx_prm_read_reset_sources - return the last SoC reset source
  57  *
  58  * Return a u32 representing the last reset sources of the SoC.  The
  59  * returned reset source bits are standardized across OMAP SoCs.
  60  */
  61 static u32 omap2xxx_prm_read_reset_sources(void)
  62 {
  63         struct prm_reset_src_map *p;
  64         u32 r = 0;
  65         u32 v;
  66
  67         v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST);
  68
  69         p = omap2xxx_prm_reset_src_map;
  70         while (p->reg_shift >= 0 && p->std_shift >= 0) {
  71                 if (v & (1 << p->reg_shift))
  72                         r |= 1 << p->std_shift;
  73                 p++;
  74         }
  75
  76         return r;
  77 }
  78
  79 /**
  80  * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
  81  * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
  82  *
  83  * Return the common power state bits corresponding to the OMAP2xxx
  84  * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
  85  */
  86 static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
  87 {
  88         u8 pwrst;
  89
  90         switch (omap2xxx_pwrst) {
  91         case OMAP24XX_PWRDM_POWER_OFF:
  92                 pwrst = PWRDM_POWER_OFF;
  93                 break;
  94         case OMAP24XX_PWRDM_POWER_RET:
  95                 pwrst = PWRDM_POWER_RET;
  96                 break;
  97         case OMAP24XX_PWRDM_POWER_ON:
  98                 pwrst = PWRDM_POWER_ON;
  99                 break;
 100         default:
 101                 return -EINVAL;
 102         }
 103
 104         return pwrst;
 105 }
 106
 107 /**
 108  * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
 109  *
 110  * Set the DPLL reset bit, which should reboot the SoC.  This is the
 111  * recommended way to restart the SoC.  No return value.
 112  */
 113 void omap2xxx_prm_dpll_reset(void)
 114 {
 115         omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
 116                                    OMAP2_RM_RSTCTRL);
 117         /* OCP barrier */
 118         omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
 119 }
 120
 121 int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
 122 {
 123         omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 124                                    clkdm->pwrdm.ptr->prcm_offs,
 125                                    OMAP2_PM_PWSTCTRL);
 126         return 0;
 127 }
 128
 129 int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
 130 {
 131         omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
 132                                      clkdm->pwrdm.ptr->prcm_offs,
 133                                      OMAP2_PM_PWSTCTRL);
 134         return 0;
 135 }
 136
 137 static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
 138 {
 139         u8 omap24xx_pwrst;
 140
 141         switch (pwrst) {
 142         case PWRDM_POWER_OFF:
 143                 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
 144                 break;
 145         case PWRDM_POWER_RET:
 146                 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
 147                 break;
 148         case PWRDM_POWER_ON:
 149                 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
 150                 break;
 151         default:
 152                 return -EINVAL;
 153         }
 154
 155         omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
 156                                    (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
 157                                    pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
 158         return 0;
 159 }
 160
 161 static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
 162 {
 163         u8 omap2xxx_pwrst;
 164
 165         omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
 166                                                        OMAP2_PM_PWSTCTRL,
 167                                                        OMAP_POWERSTATE_MASK);
 168
 169         return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
 170 }
 171
 172 static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
 173 {
 174         u8 omap2xxx_pwrst;
 175
 176         omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
 177                                                        OMAP2_PM_PWSTST,
 178                                                        OMAP_POWERSTATEST_MASK);
 179
 180         return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
 181 }
 182
 183 struct pwrdm_ops omap2_pwrdm_operations = {
 184         .pwrdm_set_next_pwrst   = omap2xxx_pwrdm_set_next_pwrst,
 185         .pwrdm_read_next_pwrst  = omap2xxx_pwrdm_read_next_pwrst,
 186         .pwrdm_read_pwrst       = omap2xxx_pwrdm_read_pwrst,
 187         .pwrdm_set_logic_retst  = omap2_pwrdm_set_logic_retst,
 188         .pwrdm_set_mem_onst     = omap2_pwrdm_set_mem_onst,
 189         .pwrdm_set_mem_retst    = omap2_pwrdm_set_mem_retst,
 190         .pwrdm_read_mem_pwrst   = omap2_pwrdm_read_mem_pwrst,
 191         .pwrdm_read_mem_retst   = omap2_pwrdm_read_mem_retst,
 192         .pwrdm_wait_transition  = omap2_pwrdm_wait_transition,
 193 };
 194
 195 /*
 196  *
 197  */
 198
 199 static struct prm_ll_data omap2xxx_prm_ll_data = {
 200         .read_reset_sources = &omap2xxx_prm_read_reset_sources,
 201 };
 202
 203 int __init omap2xxx_prm_init(void)
 204 {
 205         if (!cpu_is_omap24xx())
 206                 return 0;
 207
 208         return prm_register(&omap2xxx_prm_ll_data);
 209 }
 210
 211 static void __exit omap2xxx_prm_exit(void)
 212 {
 213         if (!cpu_is_omap24xx())
 214                 return;
 215
 216         /* Should never happen */
 217         WARN(prm_unregister(&omap2xxx_prm_ll_data),
 218              "%s: prm_ll_data function pointer mismatch\n", __func__);
 219 }
 220 __exitcall(omap2xxx_prm_exit);