Pileus Git - ~andy/linux/blob - arch/arm/mach-omap2/pm.c

   1 /*
   2  * pm.c - Common OMAP2+ power management-related code
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2010 Nokia Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/err.h>
  16 #include <linux/opp.h>
  17 #include <linux/export.h>
  18 #include <linux/suspend.h>
  19 #include <linux/cpu.h>
  20
  21 #include <asm/system_misc.h>
  22
  23 #include <plat/omap-pm.h>
  24 #include <plat/omap_device.h>
  25 #include "common.h"
  26
  27 #include "prcm-common.h"
  28 #include "voltage.h"
  29 #include "powerdomain.h"
  30 #include "clockdomain.h"
  31 #include "pm.h"
  32 #include "twl-common.h"
  33
  34 static struct omap_device_pm_latency *pm_lats;
  35
  36 /*
  37  * omap_pm_suspend: points to a function that does the SoC-specific
  38  * suspend work
  39  */
  40 int (*omap_pm_suspend)(void);
  41
  42 #ifdef CONFIG_PM
  43 /**
  44  * struct omap2_oscillator - Describe the board main oscillator latencies
  45  * @startup_time: oscillator startup latency
  46  * @shutdown_time: oscillator shutdown latency
  47  */
  48 struct omap2_oscillator {
  49         u32 startup_time;
  50         u32 shutdown_time;
  51 };
  52
  53 static struct omap2_oscillator oscillator = {
  54         .startup_time = ULONG_MAX,
  55         .shutdown_time = ULONG_MAX,
  56 };
  57
  58 void omap_pm_setup_oscillator(u32 tstart, u32 tshut)
  59 {
  60         oscillator.startup_time = tstart;
  61         oscillator.shutdown_time = tshut;
  62 }
  63
  64 void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
  65 {
  66         if (!tstart || !tshut)
  67                 return;
  68
  69         *tstart = oscillator.startup_time;
  70         *tshut = oscillator.shutdown_time;
  71 }
  72 #endif
  73
  74 static int __init _init_omap_device(char *name)
  75 {
  76         struct omap_hwmod *oh;
  77         struct platform_device *pdev;
  78
  79         oh = omap_hwmod_lookup(name);
  80         if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
  81                  __func__, name))
  82                 return -ENODEV;
  83
  84         pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
  85         if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
  86                  __func__, name))
  87                 return -ENODEV;
  88
  89         return 0;
  90 }
  91
  92 /*
  93  * Build omap_devices for processors and bus.
  94  */
  95 static void __init omap2_init_processor_devices(void)
  96 {
  97         _init_omap_device("mpu");
  98         if (omap3_has_iva())
  99                 _init_omap_device("iva");
 100
 101         if (cpu_is_omap44xx()) {
 102                 _init_omap_device("l3_main_1");
 103                 _init_omap_device("dsp");
 104                 _init_omap_device("iva");
 105         } else {
 106                 _init_omap_device("l3_main");
 107         }
 108 }
 109
 110 /* Types of sleep_switch used in omap_set_pwrdm_state */
 111 #define FORCEWAKEUP_SWITCH      0
 112 #define LOWPOWERSTATE_SWITCH    1
 113
 114 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
 115 {
 116         if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
 117             !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
 118                 clkdm_allow_idle(clkdm);
 119         else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
 120                  atomic_read(&clkdm->usecount) == 0)
 121                 clkdm_sleep(clkdm);
 122         return 0;
 123 }
 124
 125 /*
 126  * This sets pwrdm state (other than mpu & core. Currently only ON &
 127  * RET are supported.
 128  */
 129 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
 130 {
 131         u8 curr_pwrst, next_pwrst;
 132         int sleep_switch = -1, ret = 0, hwsup = 0;
 133
 134         if (!pwrdm || IS_ERR(pwrdm))
 135                 return -EINVAL;
 136
 137         while (!(pwrdm->pwrsts & (1 << pwrst))) {
 138                 if (pwrst == PWRDM_POWER_OFF)
 139                         return ret;
 140                 pwrst--;
 141         }
 142
 143         next_pwrst = pwrdm_read_next_pwrst(pwrdm);
 144         if (next_pwrst == pwrst)
 145                 return ret;
 146
 147         curr_pwrst = pwrdm_read_pwrst(pwrdm);
 148         if (curr_pwrst < PWRDM_POWER_ON) {
 149                 if ((curr_pwrst > pwrst) &&
 150                         (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
 151                         sleep_switch = LOWPOWERSTATE_SWITCH;
 152                 } else {
 153                         hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
 154                         clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
 155                         sleep_switch = FORCEWAKEUP_SWITCH;
 156                 }
 157         }
 158
 159         ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
 160         if (ret)
 161                 pr_err("%s: unable to set power state of powerdomain: %s\n",
 162                        __func__, pwrdm->name);
 163
 164         switch (sleep_switch) {
 165         case FORCEWAKEUP_SWITCH:
 166                 if (hwsup)
 167                         clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
 168                 else
 169                         clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
 170                 break;
 171         case LOWPOWERSTATE_SWITCH:
 172                 pwrdm_set_lowpwrstchange(pwrdm);
 173                 pwrdm_wait_transition(pwrdm);
 174                 pwrdm_state_switch(pwrdm);
 175                 break;
 176         }
 177
 178         return ret;
 179 }
 180
 181
 182
 183 /*
 184  * This API is to be called during init to set the various voltage
 185  * domains to the voltage as per the opp table. Typically we boot up
 186  * at the nominal voltage. So this function finds out the rate of
 187  * the clock associated with the voltage domain, finds out the correct
 188  * opp entry and sets the voltage domain to the voltage specified
 189  * in the opp entry
 190  */
 191 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 192                                          const char *oh_name)
 193 {
 194         struct voltagedomain *voltdm;
 195         struct clk *clk;
 196         struct opp *opp;
 197         unsigned long freq, bootup_volt;
 198         struct device *dev;
 199
 200         if (!vdd_name || !clk_name || !oh_name) {
 201                 pr_err("%s: invalid parameters\n", __func__);
 202                 goto exit;
 203         }
 204
 205         if (!strncmp(oh_name, "mpu", 3))
 206                 /*
 207                  * All current OMAPs share voltage rail and clock
 208                  * source, so CPU0 is used to represent the MPU-SS.
 209                  */
 210                 dev = get_cpu_device(0);
 211         else
 212                 dev = omap_device_get_by_hwmod_name(oh_name);
 213
 214         if (IS_ERR(dev)) {
 215                 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
 216                         __func__, oh_name);
 217                 goto exit;
 218         }
 219
 220         voltdm = voltdm_lookup(vdd_name);
 221         if (!voltdm) {
 222                 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
 223                         __func__, vdd_name);
 224                 goto exit;
 225         }
 226
 227         clk =  clk_get(NULL, clk_name);
 228         if (IS_ERR(clk)) {
 229                 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
 230                 goto exit;
 231         }
 232
 233         freq = clk_get_rate(clk);
 234         clk_put(clk);
 235
 236         rcu_read_lock();
 237         opp = opp_find_freq_ceil(dev, &freq);
 238         if (IS_ERR(opp)) {
 239                 rcu_read_unlock();
 240                 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
 241                         __func__, vdd_name);
 242                 goto exit;
 243         }
 244
 245         bootup_volt = opp_get_voltage(opp);
 246         rcu_read_unlock();
 247         if (!bootup_volt) {
 248                 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n",
 249                        __func__, vdd_name);
 250                 goto exit;
 251         }
 252
 253         voltdm_scale(voltdm, bootup_volt);
 254         return 0;
 255
 256 exit:
 257         pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
 258         return -EINVAL;
 259 }
 260
 261 #ifdef CONFIG_SUSPEND
 262 static int omap_pm_enter(suspend_state_t suspend_state)
 263 {
 264         int ret = 0;
 265
 266         if (!omap_pm_suspend)
 267                 return -ENOENT; /* XXX doublecheck */
 268
 269         switch (suspend_state) {
 270         case PM_SUSPEND_STANDBY:
 271         case PM_SUSPEND_MEM:
 272                 ret = omap_pm_suspend();
 273                 break;
 274         default:
 275                 ret = -EINVAL;
 276         }
 277
 278         return ret;
 279 }
 280
 281 static int omap_pm_begin(suspend_state_t state)
 282 {
 283         disable_hlt();
 284         if (cpu_is_omap34xx())
 285                 omap_prcm_irq_prepare();
 286         return 0;
 287 }
 288
 289 static void omap_pm_end(void)
 290 {
 291         enable_hlt();
 292         return;
 293 }
 294
 295 static void omap_pm_finish(void)
 296 {
 297         if (cpu_is_omap34xx())
 298                 omap_prcm_irq_complete();
 299 }
 300
 301 static const struct platform_suspend_ops omap_pm_ops = {
 302         .begin          = omap_pm_begin,
 303         .end            = omap_pm_end,
 304         .enter          = omap_pm_enter,
 305         .finish         = omap_pm_finish,
 306         .valid          = suspend_valid_only_mem,
 307 };
 308
 309 #endif /* CONFIG_SUSPEND */
 310
 311 static void __init omap3_init_voltages(void)
 312 {
 313         if (!cpu_is_omap34xx())
 314                 return;
 315
 316         omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
 317         omap2_set_init_voltage("core", "l3_ick", "l3_main");
 318 }
 319
 320 static void __init omap4_init_voltages(void)
 321 {
 322         if (!cpu_is_omap44xx())
 323                 return;
 324
 325         omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
 326         omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
 327         omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
 328 }
 329
 330 static int __init omap2_common_pm_init(void)
 331 {
 332         if (!of_have_populated_dt())
 333                 omap2_init_processor_devices();
 334         omap_pm_if_init();
 335
 336         return 0;
 337 }
 338 postcore_initcall(omap2_common_pm_init);
 339
 340 int __init omap2_common_pm_late_init(void)
 341 {
 342         /*
 343          * In the case of DT, the PMIC and SR initialization will be done using
 344          * a completely different mechanism.
 345          * Disable this part if a DT blob is available.
 346          */
 347         if (of_have_populated_dt())
 348                 return 0;
 349
 350         /* Init the voltage layer */
 351         omap_pmic_late_init();
 352         omap_voltage_late_init();
 353
 354         /* Initialize the voltages */
 355         omap3_init_voltages();
 356         omap4_init_voltages();
 357
 358         /* Smartreflex device init */
 359         omap_devinit_smartreflex();
 360
 361 #ifdef CONFIG_SUSPEND
 362         suspend_set_ops(&omap_pm_ops);
 363 #endif
 364
 365         return 0;
 366 }