Pileus Git - ~andy/linux/blob - arch/arm/mach-omap2/pm.c

   1 /*
   2  * pm.c - Common OMAP2+ power management-related code
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2010 Nokia Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/err.h>
  16 #include <linux/opp.h>
  17 #include <linux/export.h>
  18 #include <linux/suspend.h>
  19
  20 #include <asm/system_misc.h>
  21
  22 #include <plat/omap-pm.h>
  23 #include <plat/omap_device.h>
  24 #include "common.h"
  25
  26 #include "prcm-common.h"
  27 #include "voltage.h"
  28 #include "powerdomain.h"
  29 #include "clockdomain.h"
  30 #include "pm.h"
  31 #include "twl-common.h"
  32
  33 static struct omap_device_pm_latency *pm_lats;
  34
  35 /*
  36  * omap_pm_suspend: points to a function that does the SoC-specific
  37  * suspend work
  38  */
  39 int (*omap_pm_suspend)(void);
  40
  41 static int __init _init_omap_device(char *name)
  42 {
  43         struct omap_hwmod *oh;
  44         struct platform_device *pdev;
  45
  46         oh = omap_hwmod_lookup(name);
  47         if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
  48                  __func__, name))
  49                 return -ENODEV;
  50
  51         pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
  52         if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
  53                  __func__, name))
  54                 return -ENODEV;
  55
  56         return 0;
  57 }
  58
  59 /*
  60  * Build omap_devices for processors and bus.
  61  */
  62 static void __init omap2_init_processor_devices(void)
  63 {
  64         _init_omap_device("mpu");
  65         if (omap3_has_iva())
  66                 _init_omap_device("iva");
  67
  68         if (cpu_is_omap44xx()) {
  69                 _init_omap_device("l3_main_1");
  70                 _init_omap_device("dsp");
  71                 _init_omap_device("iva");
  72         } else {
  73                 _init_omap_device("l3_main");
  74         }
  75 }
  76
  77 /* Types of sleep_switch used in omap_set_pwrdm_state */
  78 #define FORCEWAKEUP_SWITCH      0
  79 #define LOWPOWERSTATE_SWITCH    1
  80
  81 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
  82 {
  83         if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
  84             !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
  85                 clkdm_allow_idle(clkdm);
  86         else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
  87                  atomic_read(&clkdm->usecount) == 0)
  88                 clkdm_sleep(clkdm);
  89         return 0;
  90 }
  91
  92 /*
  93  * This sets pwrdm state (other than mpu & core. Currently only ON &
  94  * RET are supported.
  95  */
  96 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
  97 {
  98         u8 curr_pwrst, next_pwrst;
  99         int sleep_switch = -1, ret = 0, hwsup = 0;
 100
 101         if (!pwrdm || IS_ERR(pwrdm))
 102                 return -EINVAL;
 103
 104         while (!(pwrdm->pwrsts & (1 << pwrst))) {
 105                 if (pwrst == PWRDM_POWER_OFF)
 106                         return ret;
 107                 pwrst--;
 108         }
 109
 110         next_pwrst = pwrdm_read_next_pwrst(pwrdm);
 111         if (next_pwrst == pwrst)
 112                 return ret;
 113
 114         curr_pwrst = pwrdm_read_pwrst(pwrdm);
 115         if (curr_pwrst < PWRDM_POWER_ON) {
 116                 if ((curr_pwrst > pwrst) &&
 117                         (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
 118                         sleep_switch = LOWPOWERSTATE_SWITCH;
 119                 } else {
 120                         hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
 121                         clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
 122                         sleep_switch = FORCEWAKEUP_SWITCH;
 123                 }
 124         }
 125
 126         ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
 127         if (ret)
 128                 pr_err("%s: unable to set power state of powerdomain: %s\n",
 129                        __func__, pwrdm->name);
 130
 131         switch (sleep_switch) {
 132         case FORCEWAKEUP_SWITCH:
 133                 if (hwsup)
 134                         clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
 135                 else
 136                         clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
 137                 break;
 138         case LOWPOWERSTATE_SWITCH:
 139                 pwrdm_set_lowpwrstchange(pwrdm);
 140                 pwrdm_wait_transition(pwrdm);
 141                 pwrdm_state_switch(pwrdm);
 142                 break;
 143         }
 144
 145         return ret;
 146 }
 147
 148
 149
 150 /*
 151  * This API is to be called during init to set the various voltage
 152  * domains to the voltage as per the opp table. Typically we boot up
 153  * at the nominal voltage. So this function finds out the rate of
 154  * the clock associated with the voltage domain, finds out the correct
 155  * opp entry and sets the voltage domain to the voltage specified
 156  * in the opp entry
 157  */
 158 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 159                                          const char *oh_name)
 160 {
 161         struct voltagedomain *voltdm;
 162         struct clk *clk;
 163         struct opp *opp;
 164         unsigned long freq, bootup_volt;
 165         struct device *dev;
 166
 167         if (!vdd_name || !clk_name || !oh_name) {
 168                 pr_err("%s: invalid parameters\n", __func__);
 169                 goto exit;
 170         }
 171
 172         dev = omap_device_get_by_hwmod_name(oh_name);
 173         if (IS_ERR(dev)) {
 174                 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
 175                         __func__, oh_name);
 176                 goto exit;
 177         }
 178
 179         voltdm = voltdm_lookup(vdd_name);
 180         if (IS_ERR(voltdm)) {
 181                 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
 182                         __func__, vdd_name);
 183                 goto exit;
 184         }
 185
 186         clk =  clk_get(NULL, clk_name);
 187         if (IS_ERR(clk)) {
 188                 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
 189                 goto exit;
 190         }
 191
 192         freq = clk_get_rate(clk);
 193         clk_put(clk);
 194
 195         rcu_read_lock();
 196         opp = opp_find_freq_ceil(dev, &freq);
 197         if (IS_ERR(opp)) {
 198                 rcu_read_unlock();
 199                 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
 200                         __func__, vdd_name);
 201                 goto exit;
 202         }
 203
 204         bootup_volt = opp_get_voltage(opp);
 205         rcu_read_unlock();
 206         if (!bootup_volt) {
 207                 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n",
 208                        __func__, vdd_name);
 209                 goto exit;
 210         }
 211
 212         voltdm_scale(voltdm, bootup_volt);
 213         return 0;
 214
 215 exit:
 216         pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
 217         return -EINVAL;
 218 }
 219
 220 #ifdef CONFIG_SUSPEND
 221 static int omap_pm_enter(suspend_state_t suspend_state)
 222 {
 223         int ret = 0;
 224
 225         if (!omap_pm_suspend)
 226                 return -ENOENT; /* XXX doublecheck */
 227
 228         switch (suspend_state) {
 229         case PM_SUSPEND_STANDBY:
 230         case PM_SUSPEND_MEM:
 231                 ret = omap_pm_suspend();
 232                 break;
 233         default:
 234                 ret = -EINVAL;
 235         }
 236
 237         return ret;
 238 }
 239
 240 static int omap_pm_begin(suspend_state_t state)
 241 {
 242         disable_hlt();
 243         if (cpu_is_omap34xx())
 244                 omap_prcm_irq_prepare();
 245         return 0;
 246 }
 247
 248 static void omap_pm_end(void)
 249 {
 250         enable_hlt();
 251         return;
 252 }
 253
 254 static void omap_pm_finish(void)
 255 {
 256         if (cpu_is_omap34xx())
 257                 omap_prcm_irq_complete();
 258 }
 259
 260 static const struct platform_suspend_ops omap_pm_ops = {
 261         .begin          = omap_pm_begin,
 262         .end            = omap_pm_end,
 263         .enter          = omap_pm_enter,
 264         .finish         = omap_pm_finish,
 265         .valid          = suspend_valid_only_mem,
 266 };
 267
 268 #endif /* CONFIG_SUSPEND */
 269
 270 static void __init omap3_init_voltages(void)
 271 {
 272         if (!cpu_is_omap34xx())
 273                 return;
 274
 275         omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
 276         omap2_set_init_voltage("core", "l3_ick", "l3_main");
 277 }
 278
 279 static void __init omap4_init_voltages(void)
 280 {
 281         if (!cpu_is_omap44xx())
 282                 return;
 283
 284         omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
 285         omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
 286         omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
 287 }
 288
 289 static int __init omap2_common_pm_init(void)
 290 {
 291         if (!of_have_populated_dt())
 292                 omap2_init_processor_devices();
 293         omap_pm_if_init();
 294
 295         return 0;
 296 }
 297 postcore_initcall(omap2_common_pm_init);
 298
 299 int __init omap2_common_pm_late_init(void)
 300 {
 301         /*
 302          * In the case of DT, the PMIC and SR initialization will be done using
 303          * a completely different mechanism.
 304          * Disable this part if a DT blob is available.
 305          */
 306         if (of_have_populated_dt())
 307                 return 0;
 308
 309         /* Init the voltage layer */
 310         omap_pmic_late_init();
 311         omap_voltage_late_init();
 312
 313         /* Initialize the voltages */
 314         omap3_init_voltages();
 315         omap4_init_voltages();
 316
 317         /* Smartreflex device init */
 318         omap_devinit_smartreflex();
 319
 320 #ifdef CONFIG_SUSPEND
 321         suspend_set_ops(&omap_pm_ops);
 322 #endif
 323
 324         return 0;
 325 }