2 * OMAP and TWL PMIC specific intializations.
4 * Copyright (C) 2010 Texas Instruments Incorporated.
6 * Copyright (C) 2009 Texas Instruments Incorporated.
8 * Copyright (C) 2009 Nokia Corporation
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/err.h>
18 #include <linux/kernel.h>
19 #include <linux/i2c/twl.h>
25 #define OMAP3_SRI2C_SLAVE_ADDR 0x12
26 #define OMAP3_VDD_MPU_SR_CONTROL_REG 0x00
27 #define OMAP3_VDD_CORE_SR_CONTROL_REG 0x01
28 #define OMAP3_VP_CONFIG_ERROROFFSET 0x00
29 #define OMAP3_VP_VSTEPMIN_VSTEPMIN 0x1
30 #define OMAP3_VP_VSTEPMAX_VSTEPMAX 0x04
31 #define OMAP3_VP_VLIMITTO_TIMEOUT_US 200
33 #define OMAP4_SRI2C_SLAVE_ADDR 0x12
34 #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
35 #define OMAP4_VDD_MPU_SR_CMD_REG 0x56
36 #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
37 #define OMAP4_VDD_IVA_SR_CMD_REG 0x5C
38 #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
39 #define OMAP4_VDD_CORE_SR_CMD_REG 0x62
41 #define OMAP4_VP_CONFIG_ERROROFFSET 0x00
42 #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
43 #define OMAP4_VP_VSTEPMAX_VSTEPMAX 0x04
44 #define OMAP4_VP_VLIMITTO_TIMEOUT_US 200
46 static bool is_offset_valid;
47 static u8 smps_offset;
49 * Flag to ensure Smartreflex bit in TWL
50 * being cleared in board file is not overwritten.
52 static bool __initdata twl_sr_enable_autoinit;
54 #define TWL4030_DCDC_GLOBAL_CFG 0x06
55 #define REG_SMPS_OFFSET 0xE0
56 #define SMARTREFLEX_ENABLE BIT(3)
58 static unsigned long twl4030_vsel_to_uv(const u8 vsel)
60 return (((vsel * 125) + 6000)) * 100;
63 static u8 twl4030_uv_to_vsel(unsigned long uv)
65 return DIV_ROUND_UP(uv - 600000, 12500);
68 static unsigned long twl6030_vsel_to_uv(const u8 vsel)
71 * In TWL6030 depending on the value of SMPS_OFFSET
72 * efuse register the voltage range supported in
73 * standard mode can be either between 0.6V - 1.3V or
74 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
75 * is programmed to all 0's where as starting from
76 * TWL6030 ES1.1 the efuse is programmed to 1
78 if (!is_offset_valid) {
79 twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
81 is_offset_valid = true;
87 * There is no specific formula for voltage to vsel
88 * conversion above 1.3V. There are special hardcoded
89 * values for voltages above 1.3V. Currently we are
90 * hardcoding only for 1.35 V which is used for 1GH OPP for
96 if (smps_offset & 0x8)
97 return ((((vsel - 1) * 1266) + 70900)) * 10;
99 return ((((vsel - 1) * 1266) + 60770)) * 10;
102 static u8 twl6030_uv_to_vsel(unsigned long uv)
105 * In TWL6030 depending on the value of SMPS_OFFSET
106 * efuse register the voltage range supported in
107 * standard mode can be either between 0.6V - 1.3V or
108 * 0.7V - 1.4V. In TWL6030 ES1.0 SMPS_OFFSET efuse
109 * is programmed to all 0's where as starting from
110 * TWL6030 ES1.1 the efuse is programmed to 1
112 if (!is_offset_valid) {
113 twl_i2c_read_u8(TWL6030_MODULE_ID0, &smps_offset,
115 is_offset_valid = true;
121 * There is no specific formula for voltage to vsel
122 * conversion above 1.3V. There are special hardcoded
123 * values for voltages above 1.3V. Currently we are
124 * hardcoding only for 1.35 V which is used for 1GH OPP for
127 if (uv > twl6030_vsel_to_uv(0x39)) {
130 pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n",
131 __func__, uv, twl6030_vsel_to_uv(0x39));
135 if (smps_offset & 0x8)
136 return DIV_ROUND_UP(uv - 709000, 12660) + 1;
138 return DIV_ROUND_UP(uv - 607700, 12660) + 1;
141 static struct omap_voltdm_pmic omap3_mpu_pmic = {
144 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
145 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
146 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
149 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
150 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
151 .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG,
152 .i2c_high_speed = true,
153 .vsel_to_uv = twl4030_vsel_to_uv,
154 .uv_to_vsel = twl4030_uv_to_vsel,
157 static struct omap_voltdm_pmic omap3_core_pmic = {
160 .vp_erroroffset = OMAP3_VP_CONFIG_ERROROFFSET,
161 .vp_vstepmin = OMAP3_VP_VSTEPMIN_VSTEPMIN,
162 .vp_vstepmax = OMAP3_VP_VSTEPMAX_VSTEPMAX,
165 .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US,
166 .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR,
167 .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG,
168 .i2c_high_speed = true,
169 .vsel_to_uv = twl4030_vsel_to_uv,
170 .uv_to_vsel = twl4030_uv_to_vsel,
173 static struct omap_voltdm_pmic omap4_mpu_pmic = {
176 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
177 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
178 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
181 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
182 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
183 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
184 .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG,
185 .i2c_high_speed = true,
186 .vsel_to_uv = twl6030_vsel_to_uv,
187 .uv_to_vsel = twl6030_uv_to_vsel,
190 static struct omap_voltdm_pmic omap4_iva_pmic = {
193 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
194 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
195 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
198 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
199 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
200 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
201 .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG,
202 .i2c_high_speed = true,
203 .vsel_to_uv = twl6030_vsel_to_uv,
204 .uv_to_vsel = twl6030_uv_to_vsel,
207 static struct omap_voltdm_pmic omap4_core_pmic = {
210 .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET,
211 .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN,
212 .vp_vstepmax = OMAP4_VP_VSTEPMAX_VSTEPMAX,
215 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
216 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
217 .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
218 .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG,
219 .vsel_to_uv = twl6030_vsel_to_uv,
220 .uv_to_vsel = twl6030_uv_to_vsel,
223 int __init omap4_twl_init(void)
225 struct voltagedomain *voltdm;
227 if (!cpu_is_omap44xx())
230 voltdm = voltdm_lookup("mpu");
231 omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic);
233 voltdm = voltdm_lookup("iva");
234 omap_voltage_register_pmic(voltdm, &omap4_iva_pmic);
236 voltdm = voltdm_lookup("core");
237 omap_voltage_register_pmic(voltdm, &omap4_core_pmic);
242 int __init omap3_twl_init(void)
244 struct voltagedomain *voltdm;
246 if (!cpu_is_omap34xx())
250 * The smartreflex bit on twl4030 specifies if the setting of voltage
251 * is done over the I2C_SR path. Since this setting is independent of
252 * the actual usage of smartreflex AVS module, we enable TWL SR bit
253 * by default irrespective of whether smartreflex AVS module is enabled
254 * on the OMAP side or not. This is because without this bit enabled,
255 * the voltage scaling through vp forceupdate/bypass mechanism of
256 * voltage scaling will not function on TWL over I2C_SR.
258 if (!twl_sr_enable_autoinit)
259 omap3_twl_set_sr_bit(true);
261 voltdm = voltdm_lookup("mpu_iva");
262 omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
264 voltdm = voltdm_lookup("core");
265 omap_voltage_register_pmic(voltdm, &omap3_core_pmic);
271 * omap3_twl_set_sr_bit() - Set/Clear SR bit on TWL
272 * @enable: enable SR mode in twl or not
274 * If 'enable' is true, enables Smartreflex bit on TWL 4030 to make sure
275 * voltage scaling through OMAP SR works. Else, the smartreflex bit
276 * on twl4030 is cleared as there are platforms which use OMAP3 and T2 but
277 * use Synchronized Scaling Hardware Strategy (ENABLE_VMODE=1) and Direct
278 * Strategy Software Scaling Mode (ENABLE_VMODE=0), for setting the voltages,
279 * in those scenarios this bit is to be cleared (enable = false).
281 * Returns 0 on success, error is returned if I2C read/write fails.
283 int __init omap3_twl_set_sr_bit(bool enable)
287 if (twl_sr_enable_autoinit)
288 pr_warning("%s: unexpected multiple calls\n", __func__);
290 ret = twl_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &temp,
291 TWL4030_DCDC_GLOBAL_CFG);
296 temp |= SMARTREFLEX_ENABLE;
298 temp &= ~SMARTREFLEX_ENABLE;
300 ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, temp,
301 TWL4030_DCDC_GLOBAL_CFG);
303 twl_sr_enable_autoinit = true;
307 pr_err("%s: Error access to TWL4030 (%d)\n", __func__, ret);