2 * IO mappings for OMAP2+
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 #define IOMEM(x) ((void __force __iomem *)(x))
31 #define OMAP2_L3_IO_OFFSET 0x90000000
32 #define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
34 #define OMAP2_L4_IO_OFFSET 0xb2000000
35 #define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
37 #define OMAP4_L3_IO_OFFSET 0xb4000000
38 #define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
40 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000
41 #define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
43 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000
44 #define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
46 #define OMAP4_GPMC_IO_OFFSET 0xa9000000
47 #define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
49 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
50 #define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
53 * ----------------------------------------------------------------------------
54 * Omap2 specific IO mapping
55 * ----------------------------------------------------------------------------
58 /* We map both L3 and L4 on OMAP2 */
59 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
60 #define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
61 #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
62 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
63 #define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
64 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
66 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
67 #define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
68 #define L4_WK_243X_SIZE SZ_1M
69 #define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
70 #define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
71 /* 0x6e000000 --> 0xfe000000 */
72 #define OMAP243X_GPMC_SIZE SZ_1M
73 #define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
74 /* 0x6D000000 --> 0xfd000000 */
75 #define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
76 #define OMAP243X_SDRC_SIZE SZ_1M
77 #define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
78 /* 0x6c000000 --> 0xfc000000 */
79 #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
80 #define OMAP243X_SMS_SIZE SZ_1M
83 #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
84 /* 0x58000000 --> 0xfc100000 */
85 #define DSP_MEM_2420_VIRT 0xfc100000
86 #define DSP_MEM_2420_SIZE 0x28000
87 #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
88 /* 0x59000000 --> 0xfc128000 */
89 #define DSP_IPI_2420_VIRT 0xfc128000
90 #define DSP_IPI_2420_SIZE SZ_4K
91 #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
92 /* 0x5a000000 --> 0xfc129000 */
93 #define DSP_MMU_2420_VIRT 0xfc129000
94 #define DSP_MMU_2420_SIZE SZ_4K
96 /* 2430 IVA2.1 - currently unmapped */
99 * ----------------------------------------------------------------------------
100 * Omap3 specific IO mapping
101 * ----------------------------------------------------------------------------
104 /* We map both L3 and L4 on OMAP3 */
105 #define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
106 #define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
107 #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
109 #define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
110 #define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
111 #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
114 * ----------------------------------------------------------------------------
115 * AM33XX specific IO mapping
116 * ----------------------------------------------------------------------------
118 #define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
119 #define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
120 #define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
123 * Need to look at the Size 4M for L4.
124 * VPOM3430 was not working for Int controller
127 #define L4_PER_34XX_PHYS L4_PER_34XX_BASE
128 /* 0x49000000 --> 0xfb000000 */
129 #define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
130 #define L4_PER_34XX_SIZE SZ_1M
132 #define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
133 /* 0x54000000 --> 0xfe800000 */
134 #define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
135 #define L4_EMU_34XX_SIZE SZ_8M
137 #define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
138 /* 0x6e000000 --> 0xfe000000 */
139 #define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
140 #define OMAP34XX_GPMC_SIZE SZ_1M
142 #define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
143 /* 0x6c000000 --> 0xfc000000 */
144 #define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
145 #define OMAP343X_SMS_SIZE SZ_1M
147 #define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
148 /* 0x6D000000 --> 0xfd000000 */
149 #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
150 #define OMAP343X_SDRC_SIZE SZ_1M
152 /* 3430 IVA - currently unmapped */
155 * ----------------------------------------------------------------------------
156 * Omap4 specific IO mapping
157 * ----------------------------------------------------------------------------
160 /* We map both L3 and L4 on OMAP4 */
161 #define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
162 #define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
163 #define L3_44XX_SIZE SZ_1M
165 #define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
166 #define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
167 #define L4_44XX_SIZE SZ_4M
169 #define L4_PER_44XX_PHYS L4_PER_44XX_BASE
170 /* 0x48000000 --> 0xfa000000 */
171 #define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
172 #define L4_PER_44XX_SIZE SZ_4M
174 #define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
175 /* 0x49000000 --> 0xfb000000 */
176 #define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
177 #define L4_ABE_44XX_SIZE SZ_1M
179 #define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
180 /* 0x54000000 --> 0xfe800000 */
181 #define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
182 #define L4_EMU_44XX_SIZE SZ_8M
184 #define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
185 /* 0x50000000 --> 0xf9000000 */
186 #define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
187 #define OMAP44XX_GPMC_SIZE SZ_1M
190 #define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
191 /* 0x4c000000 --> 0xfd100000 */
192 #define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
193 #define OMAP44XX_EMIF1_SIZE SZ_1M
195 #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
196 /* 0x4d000000 --> 0xfd200000 */
197 #define OMAP44XX_EMIF2_SIZE SZ_1M
198 #define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
200 #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
201 /* 0x4e000000 --> 0xfd300000 */
202 #define OMAP44XX_DMM_SIZE SZ_1M
203 #define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)