Pileus Git - ~andy/linux/blob - arch/arm/mach-omap1/board-perseus2.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-perseus2.c
   3  *
   4  * Modified from board-generic.c
   5  *
   6  * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
   7  * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13 #include <linux/gpio.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/delay.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/physmap.h>
  22 #include <linux/input.h>
  23 #include <linux/smc91x.h>
  24 #include <linux/omapfb.h>
  25
  26 #include <asm/mach-types.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/map.h>
  29
  30 #include <plat/tc.h>
  31 #include <plat/mux.h>
  32 #include <plat/fpga.h>
  33 #include <plat/flash.h>
  34 #include <plat/keypad.h>
  35 #include <plat/board.h>
  36
  37 #include <mach/hardware.h>
  38
  39 #include "iomap.h"
  40 #include "common.h"
  41
  42 static const unsigned int p2_keymap[] = {
  43         KEY(0, 0, KEY_UP),
  44         KEY(1, 0, KEY_RIGHT),
  45         KEY(2, 0, KEY_LEFT),
  46         KEY(3, 0, KEY_DOWN),
  47         KEY(4, 0, KEY_ENTER),
  48         KEY(0, 1, KEY_F10),
  49         KEY(1, 1, KEY_SEND),
  50         KEY(2, 1, KEY_END),
  51         KEY(3, 1, KEY_VOLUMEDOWN),
  52         KEY(4, 1, KEY_VOLUMEUP),
  53         KEY(5, 1, KEY_RECORD),
  54         KEY(0, 2, KEY_F9),
  55         KEY(1, 2, KEY_3),
  56         KEY(2, 2, KEY_6),
  57         KEY(3, 2, KEY_9),
  58         KEY(4, 2, KEY_KPDOT),
  59         KEY(0, 3, KEY_BACK),
  60         KEY(1, 3, KEY_2),
  61         KEY(2, 3, KEY_5),
  62         KEY(3, 3, KEY_8),
  63         KEY(4, 3, KEY_0),
  64         KEY(5, 3, KEY_KPSLASH),
  65         KEY(0, 4, KEY_HOME),
  66         KEY(1, 4, KEY_1),
  67         KEY(2, 4, KEY_4),
  68         KEY(3, 4, KEY_7),
  69         KEY(4, 4, KEY_KPASTERISK),
  70         KEY(5, 4, KEY_POWER),
  71 };
  72
  73 static struct smc91x_platdata smc91x_info = {
  74         .flags  = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  75         .leda   = RPC_LED_100_10,
  76         .ledb   = RPC_LED_TX_RX,
  77 };
  78
  79 static struct resource smc91x_resources[] = {
  80         [0] = {
  81                 .start  = H2P2_DBG_FPGA_ETHR_START,     /* Physical */
  82                 .end    = H2P2_DBG_FPGA_ETHR_START + 0xf,
  83                 .flags  = IORESOURCE_MEM,
  84         },
  85         [1] = {
  86                 .start  = INT_7XX_MPU_EXT_NIRQ,
  87                 .end    = 0,
  88                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  89         },
  90 };
  91
  92 static struct mtd_partition nor_partitions[] = {
  93         /* bootloader (U-Boot, etc) in first sector */
  94         {
  95               .name             = "bootloader",
  96               .offset           = 0,
  97               .size             = SZ_128K,
  98               .mask_flags       = MTD_WRITEABLE, /* force read-only */
  99         },
 100         /* bootloader params in the next sector */
 101         {
 102               .name             = "params",
 103               .offset           = MTDPART_OFS_APPEND,
 104               .size             = SZ_128K,
 105               .mask_flags       = 0,
 106         },
 107         /* kernel */
 108         {
 109               .name             = "kernel",
 110               .offset           = MTDPART_OFS_APPEND,
 111               .size             = SZ_2M,
 112               .mask_flags       = 0
 113         },
 114         /* rest of flash is a file system */
 115         {
 116               .name             = "rootfs",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = MTDPART_SIZ_FULL,
 119               .mask_flags       = 0
 120         },
 121 };
 122
 123 static struct physmap_flash_data nor_data = {
 124         .width          = 2,
 125         .set_vpp        = omap1_set_vpp,
 126         .parts          = nor_partitions,
 127         .nr_parts       = ARRAY_SIZE(nor_partitions),
 128 };
 129
 130 static struct resource nor_resource = {
 131         .start          = OMAP_CS0_PHYS,
 132         .end            = OMAP_CS0_PHYS + SZ_32M - 1,
 133         .flags          = IORESOURCE_MEM,
 134 };
 135
 136 static struct platform_device nor_device = {
 137         .name           = "physmap-flash",
 138         .id             = 0,
 139         .dev            = {
 140                 .platform_data  = &nor_data,
 141         },
 142         .num_resources  = 1,
 143         .resource       = &nor_resource,
 144 };
 145
 146 static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 147 {
 148         struct nand_chip *this = mtd->priv;
 149         unsigned long mask;
 150
 151         if (cmd == NAND_CMD_NONE)
 152                 return;
 153
 154         mask = (ctrl & NAND_CLE) ? 0x02 : 0;
 155         if (ctrl & NAND_ALE)
 156                 mask |= 0x04;
 157         writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
 158 }
 159
 160 #define P2_NAND_RB_GPIO_PIN     62
 161
 162 static int nand_dev_ready(struct mtd_info *mtd)
 163 {
 164         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 165 }
 166
 167 static const char *part_probes[] = { "cmdlinepart", NULL };
 168
 169 static struct platform_nand_data nand_data = {
 170         .chip   = {
 171                 .nr_chips               = 1,
 172                 .chip_offset            = 0,
 173                 .options                = NAND_SAMSUNG_LP_OPTIONS,
 174                 .part_probe_types       = part_probes,
 175         },
 176         .ctrl   = {
 177                 .cmd_ctrl       = nand_cmd_ctl,
 178                 .dev_ready      = nand_dev_ready,
 179         },
 180 };
 181
 182 static struct resource nand_resource = {
 183         .start          = OMAP_CS3_PHYS,
 184         .end            = OMAP_CS3_PHYS + SZ_4K - 1,
 185         .flags          = IORESOURCE_MEM,
 186 };
 187
 188 static struct platform_device nand_device = {
 189         .name           = "gen_nand",
 190         .id             = 0,
 191         .dev            = {
 192                 .platform_data  = &nand_data,
 193         },
 194         .num_resources  = 1,
 195         .resource       = &nand_resource,
 196 };
 197
 198 static struct platform_device smc91x_device = {
 199         .name           = "smc91x",
 200         .id             = 0,
 201         .dev    = {
 202                 .platform_data  = &smc91x_info,
 203         },
 204         .num_resources  = ARRAY_SIZE(smc91x_resources),
 205         .resource       = smc91x_resources,
 206 };
 207
 208 static struct resource kp_resources[] = {
 209         [0] = {
 210                 .start  = INT_7XX_MPUIO_KEYPAD,
 211                 .end    = INT_7XX_MPUIO_KEYPAD,
 212                 .flags  = IORESOURCE_IRQ,
 213         },
 214 };
 215
 216 static const struct matrix_keymap_data p2_keymap_data = {
 217         .keymap         = p2_keymap,
 218         .keymap_size    = ARRAY_SIZE(p2_keymap),
 219 };
 220
 221 static struct omap_kp_platform_data kp_data = {
 222         .rows           = 8,
 223         .cols           = 8,
 224         .keymap_data    = &p2_keymap_data,
 225         .delay          = 4,
 226         .dbounce        = true,
 227 };
 228
 229 static struct platform_device kp_device = {
 230         .name           = "omap-keypad",
 231         .id             = -1,
 232         .dev            = {
 233                 .platform_data = &kp_data,
 234         },
 235         .num_resources  = ARRAY_SIZE(kp_resources),
 236         .resource       = kp_resources,
 237 };
 238
 239 static struct platform_device *devices[] __initdata = {
 240         &nor_device,
 241         &nand_device,
 242         &smc91x_device,
 243         &kp_device,
 244 };
 245
 246 static struct omap_lcd_config perseus2_lcd_config __initdata = {
 247         .ctrl_name      = "internal",
 248 };
 249
 250 static void __init perseus2_init_smc91x(void)
 251 {
 252         fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
 253         mdelay(50);
 254         fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
 255                    H2P2_DBG_FPGA_LAN_RESET);
 256         mdelay(50);
 257 }
 258
 259 static void __init omap_perseus2_init(void)
 260 {
 261         /* Early, board-dependent init */
 262
 263         /*
 264          * Hold GSM Reset until needed
 265          */
 266         omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
 267
 268         /*
 269          * UARTs -> done automagically by 8250 driver
 270          */
 271
 272         /*
 273          * CSx timings, GPIO Mux ... setup
 274          */
 275
 276         /* Flash: CS0 timings setup */
 277         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
 278         omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
 279
 280         /*
 281          * Ethernet support through the debug board
 282          * CS1 timings setup
 283          */
 284         omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
 285         omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
 286
 287         /*
 288          * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
 289          * It is used as the Ethernet controller interrupt
 290          */
 291         omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
 292                                 OMAP7XX_IO_CONF_9);
 293
 294         perseus2_init_smc91x();
 295
 296         if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
 297                 BUG();
 298         gpio_direction_input(P2_NAND_RB_GPIO_PIN);
 299
 300         omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
 301         omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
 302
 303         /* Mux pins for keypad */
 304         omap_cfg_reg(E2_7XX_KBR0);
 305         omap_cfg_reg(J7_7XX_KBR1);
 306         omap_cfg_reg(E1_7XX_KBR2);
 307         omap_cfg_reg(F3_7XX_KBR3);
 308         omap_cfg_reg(D2_7XX_KBR4);
 309         omap_cfg_reg(C2_7XX_KBC0);
 310         omap_cfg_reg(D3_7XX_KBC1);
 311         omap_cfg_reg(E4_7XX_KBC2);
 312         omap_cfg_reg(F4_7XX_KBC3);
 313         omap_cfg_reg(E3_7XX_KBC4);
 314
 315         platform_add_devices(devices, ARRAY_SIZE(devices));
 316
 317         omap_serial_init();
 318         omap_register_i2c_bus(1, 100, NULL, 0);
 319
 320         omapfb_set_lcd_config(&perseus2_lcd_config);
 321 }
 322
 323 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 324 static struct map_desc omap_perseus2_io_desc[] __initdata = {
 325         {
 326                 .virtual        = H2P2_DBG_FPGA_BASE,
 327                 .pfn            = __phys_to_pfn(H2P2_DBG_FPGA_START),
 328                 .length         = H2P2_DBG_FPGA_SIZE,
 329                 .type           = MT_DEVICE
 330         }
 331 };
 332
 333 static void __init omap_perseus2_map_io(void)
 334 {
 335         omap7xx_map_io();
 336         iotable_init(omap_perseus2_io_desc,
 337                      ARRAY_SIZE(omap_perseus2_io_desc));
 338 }
 339
 340 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
 341         /* Maintainer: Kevin Hilman <kjh@hilman.org> */
 342         .atag_offset    = 0x100,
 343         .map_io         = omap_perseus2_map_io,
 344         .init_early     = omap1_init_early,
 345         .reserve        = omap_reserve,
 346         .init_irq       = omap1_init_irq,
 347         .init_machine   = omap_perseus2_init,
 348         .timer          = &omap1_timer,
 349         .restart        = omap1_restart,
 350 MACHINE_END