Pileus Git - ~andy/linux/blob - arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/ata_platform.h>
  16 #include <linux/mtd/nand.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/clk-provider.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/mv643xx_i2c.h>
  21 #include <net/dsa.h>
  22 #include <asm/page.h>
  23 #include <asm/timex.h>
  24 #include <asm/kexec.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/kirkwood.h>
  28 #include <mach/bridge-regs.h>
  29 #include <plat/audio.h>
  30 #include <plat/cache-feroceon-l2.h>
  31 #include <plat/mvsdio.h>
  32 #include <plat/orion_nand.h>
  33 #include <plat/ehci-orion.h>
  34 #include <plat/common.h>
  35 #include <plat/time.h>
  36 #include <plat/addr-map.h>
  37 #include <plat/mv_xor.h>
  38 #include "common.h"
  39
  40 /*****************************************************************************
  41  * I/O Address Mapping
  42  ****************************************************************************/
  43 static struct map_desc kirkwood_io_desc[] __initdata = {
  44         {
  45                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  47                 .length         = KIRKWOOD_REGS_SIZE,
  48                 .type           = MT_DEVICE,
  49         },
  50 };
  51
  52 void __init kirkwood_map_io(void)
  53 {
  54         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  55 }
  56
  57 /*****************************************************************************
  58  * CLK tree
  59  ****************************************************************************/
  60
  61 static void enable_sata0(void)
  62 {
  63         /* Enable PLL and IVREF */
  64         writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
  65         /* Enable PHY */
  66         writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
  67 }
  68
  69 static void disable_sata0(void)
  70 {
  71         /* Disable PLL and IVREF */
  72         writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  73         /* Disable PHY */
  74         writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  75 }
  76
  77 static void enable_sata1(void)
  78 {
  79         /* Enable PLL and IVREF */
  80         writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
  81         /* Enable PHY */
  82         writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
  83 }
  84
  85 static void disable_sata1(void)
  86 {
  87         /* Disable PLL and IVREF */
  88         writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  89         /* Disable PHY */
  90         writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  91 }
  92
  93 static void disable_pcie0(void)
  94 {
  95         writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  96         while (1)
  97                 if (readl(PCIE_STATUS) & 0x1)
  98                         break;
  99         writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
 100 }
 101
 102 static void disable_pcie1(void)
 103 {
 104         u32 dev, rev;
 105
 106         kirkwood_pcie_id(&dev, &rev);
 107
 108         if (dev == MV88F6282_DEV_ID) {
 109                 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 110                 while (1)
 111                         if (readl(PCIE1_STATUS) & 0x1)
 112                                 break;
 113                 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 114         }
 115 }
 116
 117 /* An extended version of the gated clk. This calls fn_en()/fn_dis
 118  * before enabling/disabling the clock.  We use this to turn on/off
 119  * PHYs etc.  */
 120 struct clk_gate_fn {
 121         struct clk_gate gate;
 122         void (*fn_en)(void);
 123         void (*fn_dis)(void);
 124 };
 125
 126 #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
 127 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
 128
 129 static int clk_gate_fn_enable(struct clk_hw *hw)
 130 {
 131         struct clk_gate *gate = to_clk_gate(hw);
 132         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 133         int ret;
 134
 135         ret = clk_gate_ops.enable(hw);
 136         if (!ret && gate_fn->fn_en)
 137                 gate_fn->fn_en();
 138
 139         return ret;
 140 }
 141
 142 static void clk_gate_fn_disable(struct clk_hw *hw)
 143 {
 144         struct clk_gate *gate = to_clk_gate(hw);
 145         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 146
 147         if (gate_fn->fn_dis)
 148                 gate_fn->fn_dis();
 149
 150         clk_gate_ops.disable(hw);
 151 }
 152
 153 static struct clk_ops clk_gate_fn_ops;
 154
 155 static struct clk __init *clk_register_gate_fn(struct device *dev,
 156                 const char *name,
 157                 const char *parent_name, unsigned long flags,
 158                 void __iomem *reg, u8 bit_idx,
 159                 u8 clk_gate_flags, spinlock_t *lock,
 160                 void (*fn_en)(void), void (*fn_dis)(void))
 161 {
 162         struct clk_gate_fn *gate_fn;
 163         struct clk *clk;
 164         struct clk_init_data init;
 165
 166         gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
 167         if (!gate_fn) {
 168                 pr_err("%s: could not allocate gated clk\n", __func__);
 169                 return ERR_PTR(-ENOMEM);
 170         }
 171
 172         init.name = name;
 173         init.ops = &clk_gate_fn_ops;
 174         init.flags = flags;
 175         init.parent_names = (parent_name ? &parent_name : NULL);
 176         init.num_parents = (parent_name ? 1 : 0);
 177
 178         /* struct clk_gate assignments */
 179         gate_fn->gate.reg = reg;
 180         gate_fn->gate.bit_idx = bit_idx;
 181         gate_fn->gate.flags = clk_gate_flags;
 182         gate_fn->gate.lock = lock;
 183         gate_fn->gate.hw.init = &init;
 184         gate_fn->fn_en = fn_en;
 185         gate_fn->fn_dis = fn_dis;
 186
 187         /* ops is the gate ops, but with our enable/disable functions */
 188         if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
 189             clk_gate_fn_ops.disable != clk_gate_fn_disable) {
 190                 clk_gate_fn_ops = clk_gate_ops;
 191                 clk_gate_fn_ops.enable = clk_gate_fn_enable;
 192                 clk_gate_fn_ops.disable = clk_gate_fn_disable;
 193         }
 194
 195         clk = clk_register(dev, &gate_fn->gate.hw);
 196
 197         if (IS_ERR(clk))
 198                 kfree(gate_fn);
 199
 200         return clk;
 201 }
 202
 203 static DEFINE_SPINLOCK(gating_lock);
 204 static struct clk *tclk;
 205
 206 static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
 207 {
 208         return clk_register_gate(NULL, name, "tclk", 0,
 209                                  (void __iomem *)CLOCK_GATING_CTRL,
 210                                  bit_idx, 0, &gating_lock);
 211 }
 212
 213 static struct clk __init *kirkwood_register_gate_fn(const char *name,
 214                                                     u8 bit_idx,
 215                                                     void (*fn_en)(void),
 216                                                     void (*fn_dis)(void))
 217 {
 218         return clk_register_gate_fn(NULL, name, "tclk", 0,
 219                                     (void __iomem *)CLOCK_GATING_CTRL,
 220                                     bit_idx, 0, &gating_lock, fn_en, fn_dis);
 221 }
 222
 223 static struct clk *ge0, *ge1;
 224
 225 void __init kirkwood_clk_init(void)
 226 {
 227         struct clk *runit, *sata0, *sata1, *usb0, *sdio;
 228         struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
 229
 230         tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
 231                                        CLK_IS_ROOT, kirkwood_tclk);
 232
 233         runit = kirkwood_register_gate("runit",  CGC_BIT_RUNIT);
 234         ge0 = kirkwood_register_gate("ge0",    CGC_BIT_GE0);
 235         ge1 = kirkwood_register_gate("ge1",    CGC_BIT_GE1);
 236         sata0 = kirkwood_register_gate_fn("sata0",  CGC_BIT_SATA0,
 237                                           enable_sata0, disable_sata0);
 238         sata1 = kirkwood_register_gate_fn("sata1",  CGC_BIT_SATA1,
 239                                           enable_sata1, disable_sata1);
 240         usb0 = kirkwood_register_gate("usb0",   CGC_BIT_USB0);
 241         sdio = kirkwood_register_gate("sdio",   CGC_BIT_SDIO);
 242         crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
 243         xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);
 244         xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);
 245         pex0 = kirkwood_register_gate_fn("pex0",   CGC_BIT_PEX0,
 246                                          NULL, disable_pcie0);
 247         pex1 = kirkwood_register_gate_fn("pex1",   CGC_BIT_PEX1,
 248                                          NULL, disable_pcie1);
 249         audio = kirkwood_register_gate("audio",  CGC_BIT_AUDIO);
 250         kirkwood_register_gate("tdm",    CGC_BIT_TDM);
 251         kirkwood_register_gate("tsu",    CGC_BIT_TSU);
 252
 253         /* clkdev entries, mapping clks to devices */
 254         orion_clkdev_add(NULL, "orion_spi.0", runit);
 255         orion_clkdev_add(NULL, "orion_spi.1", runit);
 256         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
 257         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
 258         orion_clkdev_add(NULL, "orion_wdt", tclk);
 259         orion_clkdev_add("0", "sata_mv.0", sata0);
 260         orion_clkdev_add("1", "sata_mv.0", sata1);
 261         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 262         orion_clkdev_add(NULL, "orion_nand", runit);
 263         orion_clkdev_add(NULL, "mvsdio", sdio);
 264         orion_clkdev_add(NULL, "mv_crypto", crypto);
 265         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
 266         orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
 267         orion_clkdev_add("0", "pcie", pex0);
 268         orion_clkdev_add("1", "pcie", pex1);
 269         orion_clkdev_add(NULL, "kirkwood-i2s", audio);
 270         orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
 271
 272         /* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
 273          * so should never be gated.
 274          */
 275         clk_prepare_enable(runit);
 276 }
 277
 278 /*****************************************************************************
 279  * EHCI0
 280  ****************************************************************************/
 281 void __init kirkwood_ehci_init(void)
 282 {
 283         orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
 284 }
 285
 286
 287 /*****************************************************************************
 288  * GE00
 289  ****************************************************************************/
 290 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 291 {
 292         orion_ge00_init(eth_data,
 293                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 294                         IRQ_KIRKWOOD_GE00_ERR);
 295         /* The interface forgets the MAC address assigned by u-boot if
 296         the clock is turned off, so claim the clk now. */
 297         clk_prepare_enable(ge0);
 298 }
 299
 300
 301 /*****************************************************************************
 302  * GE01
 303  ****************************************************************************/
 304 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 305 {
 306         orion_ge01_init(eth_data,
 307                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 308                         IRQ_KIRKWOOD_GE01_ERR);
 309         clk_prepare_enable(ge1);
 310 }
 311
 312
 313 /*****************************************************************************
 314  * Ethernet switch
 315  ****************************************************************************/
 316 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 317 {
 318         orion_ge00_switch_init(d, irq);
 319 }
 320
 321
 322 /*****************************************************************************
 323  * NAND flash
 324  ****************************************************************************/
 325 static struct resource kirkwood_nand_resource = {
 326         .flags          = IORESOURCE_MEM,
 327         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 328         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 329                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 330 };
 331
 332 static struct orion_nand_data kirkwood_nand_data = {
 333         .cle            = 0,
 334         .ale            = 1,
 335         .width          = 8,
 336 };
 337
 338 static struct platform_device kirkwood_nand_flash = {
 339         .name           = "orion_nand",
 340         .id             = -1,
 341         .dev            = {
 342                 .platform_data  = &kirkwood_nand_data,
 343         },
 344         .resource       = &kirkwood_nand_resource,
 345         .num_resources  = 1,
 346 };
 347
 348 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 349                                int chip_delay)
 350 {
 351         kirkwood_nand_data.parts = parts;
 352         kirkwood_nand_data.nr_parts = nr_parts;
 353         kirkwood_nand_data.chip_delay = chip_delay;
 354         platform_device_register(&kirkwood_nand_flash);
 355 }
 356
 357 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 358                                    int (*dev_ready)(struct mtd_info *))
 359 {
 360         kirkwood_nand_data.parts = parts;
 361         kirkwood_nand_data.nr_parts = nr_parts;
 362         kirkwood_nand_data.dev_ready = dev_ready;
 363         platform_device_register(&kirkwood_nand_flash);
 364 }
 365
 366 /*****************************************************************************
 367  * SoC RTC
 368  ****************************************************************************/
 369 static void __init kirkwood_rtc_init(void)
 370 {
 371         orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
 372 }
 373
 374
 375 /*****************************************************************************
 376  * SATA
 377  ****************************************************************************/
 378 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 379 {
 380         orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 381 }
 382
 383
 384 /*****************************************************************************
 385  * SD/SDIO/MMC
 386  ****************************************************************************/
 387 static struct resource mvsdio_resources[] = {
 388         [0] = {
 389                 .start  = SDIO_PHYS_BASE,
 390                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 391                 .flags  = IORESOURCE_MEM,
 392         },
 393         [1] = {
 394                 .start  = IRQ_KIRKWOOD_SDIO,
 395                 .end    = IRQ_KIRKWOOD_SDIO,
 396                 .flags  = IORESOURCE_IRQ,
 397         },
 398 };
 399
 400 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 401
 402 static struct platform_device kirkwood_sdio = {
 403         .name           = "mvsdio",
 404         .id             = -1,
 405         .dev            = {
 406                 .dma_mask = &mvsdio_dmamask,
 407                 .coherent_dma_mask = DMA_BIT_MASK(32),
 408         },
 409         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 410         .resource       = mvsdio_resources,
 411 };
 412
 413 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 414 {
 415         u32 dev, rev;
 416
 417         kirkwood_pcie_id(&dev, &rev);
 418         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 419                 mvsdio_data->clock = 100000000;
 420         else
 421                 mvsdio_data->clock = 200000000;
 422         kirkwood_sdio.dev.platform_data = mvsdio_data;
 423         platform_device_register(&kirkwood_sdio);
 424 }
 425
 426
 427 /*****************************************************************************
 428  * SPI
 429  ****************************************************************************/
 430 void __init kirkwood_spi_init()
 431 {
 432         orion_spi_init(SPI_PHYS_BASE);
 433 }
 434
 435
 436 /*****************************************************************************
 437  * I2C
 438  ****************************************************************************/
 439 void __init kirkwood_i2c_init(void)
 440 {
 441         orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
 442 }
 443
 444
 445 /*****************************************************************************
 446  * UART0
 447  ****************************************************************************/
 448
 449 void __init kirkwood_uart0_init(void)
 450 {
 451         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 452                          IRQ_KIRKWOOD_UART_0, tclk);
 453 }
 454
 455
 456 /*****************************************************************************
 457  * UART1
 458  ****************************************************************************/
 459 void __init kirkwood_uart1_init(void)
 460 {
 461         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 462                          IRQ_KIRKWOOD_UART_1, tclk);
 463 }
 464
 465 /*****************************************************************************
 466  * Cryptographic Engines and Security Accelerator (CESA)
 467  ****************************************************************************/
 468 void __init kirkwood_crypto_init(void)
 469 {
 470         orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
 471                           KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
 472 }
 473
 474
 475 /*****************************************************************************
 476  * XOR0
 477  ****************************************************************************/
 478 void __init kirkwood_xor0_init(void)
 479 {
 480         orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 481                         IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 482 }
 483
 484
 485 /*****************************************************************************
 486  * XOR1
 487  ****************************************************************************/
 488 void __init kirkwood_xor1_init(void)
 489 {
 490         orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
 491                         IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
 492 }
 493
 494
 495 /*****************************************************************************
 496  * Watchdog
 497  ****************************************************************************/
 498 void __init kirkwood_wdt_init(void)
 499 {
 500         orion_wdt_init();
 501 }
 502
 503
 504 /*****************************************************************************
 505  * Time handling
 506  ****************************************************************************/
 507 void __init kirkwood_init_early(void)
 508 {
 509         orion_time_set_base(TIMER_VIRT_BASE);
 510 }
 511
 512 int kirkwood_tclk;
 513
 514 static int __init kirkwood_find_tclk(void)
 515 {
 516         u32 dev, rev;
 517
 518         kirkwood_pcie_id(&dev, &rev);
 519
 520         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 521                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 522                         return 200000000;
 523
 524         return 166666667;
 525 }
 526
 527 static void __init kirkwood_timer_init(void)
 528 {
 529         kirkwood_tclk = kirkwood_find_tclk();
 530
 531         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 532                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 533 }
 534
 535 struct sys_timer kirkwood_timer = {
 536         .init = kirkwood_timer_init,
 537 };
 538
 539 /*****************************************************************************
 540  * Audio
 541  ****************************************************************************/
 542 static struct resource kirkwood_i2s_resources[] = {
 543         [0] = {
 544                 .start  = AUDIO_PHYS_BASE,
 545                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 546                 .flags  = IORESOURCE_MEM,
 547         },
 548         [1] = {
 549                 .start  = IRQ_KIRKWOOD_I2S,
 550                 .end    = IRQ_KIRKWOOD_I2S,
 551                 .flags  = IORESOURCE_IRQ,
 552         },
 553 };
 554
 555 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 556         .burst       = 128,
 557 };
 558
 559 static struct platform_device kirkwood_i2s_device = {
 560         .name           = "kirkwood-i2s",
 561         .id             = -1,
 562         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 563         .resource       = kirkwood_i2s_resources,
 564         .dev            = {
 565                 .platform_data  = &kirkwood_i2s_data,
 566         },
 567 };
 568
 569 static struct platform_device kirkwood_pcm_device = {
 570         .name           = "kirkwood-pcm-audio",
 571         .id             = -1,
 572 };
 573
 574 void __init kirkwood_audio_init(void)
 575 {
 576         platform_device_register(&kirkwood_i2s_device);
 577         platform_device_register(&kirkwood_pcm_device);
 578 }
 579
 580 /*****************************************************************************
 581  * General
 582  ****************************************************************************/
 583 /*
 584  * Identify device ID and revision.
 585  */
 586 char * __init kirkwood_id(void)
 587 {
 588         u32 dev, rev;
 589
 590         kirkwood_pcie_id(&dev, &rev);
 591
 592         if (dev == MV88F6281_DEV_ID) {
 593                 if (rev == MV88F6281_REV_Z0)
 594                         return "MV88F6281-Z0";
 595                 else if (rev == MV88F6281_REV_A0)
 596                         return "MV88F6281-A0";
 597                 else if (rev == MV88F6281_REV_A1)
 598                         return "MV88F6281-A1";
 599                 else
 600                         return "MV88F6281-Rev-Unsupported";
 601         } else if (dev == MV88F6192_DEV_ID) {
 602                 if (rev == MV88F6192_REV_Z0)
 603                         return "MV88F6192-Z0";
 604                 else if (rev == MV88F6192_REV_A0)
 605                         return "MV88F6192-A0";
 606                 else if (rev == MV88F6192_REV_A1)
 607                         return "MV88F6192-A1";
 608                 else
 609                         return "MV88F6192-Rev-Unsupported";
 610         } else if (dev == MV88F6180_DEV_ID) {
 611                 if (rev == MV88F6180_REV_A0)
 612                         return "MV88F6180-Rev-A0";
 613                 else if (rev == MV88F6180_REV_A1)
 614                         return "MV88F6180-Rev-A1";
 615                 else
 616                         return "MV88F6180-Rev-Unsupported";
 617         } else if (dev == MV88F6282_DEV_ID) {
 618                 if (rev == MV88F6282_REV_A0)
 619                         return "MV88F6282-Rev-A0";
 620                 else if (rev == MV88F6282_REV_A1)
 621                         return "MV88F6282-Rev-A1";
 622                 else
 623                         return "MV88F6282-Rev-Unsupported";
 624         } else {
 625                 return "Device-Unknown";
 626         }
 627 }
 628
 629 void __init kirkwood_l2_init(void)
 630 {
 631 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 632         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 633         feroceon_l2_init(1);
 634 #else
 635         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 636         feroceon_l2_init(0);
 637 #endif
 638 }
 639
 640 void __init kirkwood_init(void)
 641 {
 642         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 643                 kirkwood_id(), kirkwood_tclk);
 644
 645         /*
 646          * Disable propagation of mbus errors to the CPU local bus,
 647          * as this causes mbus errors (which can occur for example
 648          * for PCI aborts) to throw CPU aborts, which we're not set
 649          * up to deal with.
 650          */
 651         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 652
 653         kirkwood_setup_cpu_mbus();
 654
 655 #ifdef CONFIG_CACHE_FEROCEON_L2
 656         kirkwood_l2_init();
 657 #endif
 658
 659         /* Setup root of clk tree */
 660         kirkwood_clk_init();
 661
 662         /* internal devices that every board has */
 663         kirkwood_rtc_init();
 664         kirkwood_wdt_init();
 665         kirkwood_xor0_init();
 666         kirkwood_xor1_init();
 667         kirkwood_crypto_init();
 668
 669 #ifdef CONFIG_KEXEC
 670         kexec_reinit = kirkwood_enable_pcie;
 671 #endif
 672 }
 673
 674 void kirkwood_restart(char mode, const char *cmd)
 675 {
 676         /*
 677          * Enable soft reset to assert RSTOUTn.
 678          */
 679         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 680
 681         /*
 682          * Assert soft reset.
 683          */
 684         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 685
 686         while (1)
 687                 ;
 688 }