2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/clk.h>
14 #include <linux/clkdev.h>
15 #include <linux/cpuidle.h>
16 #include <linux/delay.h>
17 #include <linux/export.h>
18 #include <linux/init.h>
20 #include <linux/irq.h>
22 #include <linux/of_address.h>
23 #include <linux/of_irq.h>
24 #include <linux/of_platform.h>
25 #include <linux/phy.h>
26 #include <linux/micrel_phy.h>
27 #include <linux/mfd/anatop.h>
28 #include <asm/cpuidle.h>
29 #include <asm/smp_twd.h>
30 #include <asm/hardware/cache-l2x0.h>
31 #include <asm/hardware/gic.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/time.h>
34 #include <asm/system_misc.h>
35 #include <mach/common.h>
36 #include <mach/cpuidle.h>
37 #include <mach/hardware.h>
40 void imx6q_restart(char mode, const char *cmd)
42 struct device_node *np;
43 void __iomem *wdog_base;
45 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
46 wdog_base = of_iomap(np, 0);
50 imx_src_prepare_restart();
53 writew_relaxed(1 << 2, wdog_base);
54 /* write twice to ensure the request will not get ignored */
55 writew_relaxed(1 << 2, wdog_base);
57 /* wait for reset to assert ... */
60 pr_err("Watchdog reset failed to assert reset\n");
62 /* delay to allow the serial port to show the message */
66 /* we'll take a jump through zero as a poor second */
70 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
71 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
73 if (IS_BUILTIN(CONFIG_PHYLIB)) {
74 /* min rx data delay */
75 phy_write(phydev, 0x0b, 0x8105);
76 phy_write(phydev, 0x0c, 0x0000);
78 /* max rx/tx clock delay, min rx/tx control delay */
79 phy_write(phydev, 0x0b, 0x8104);
80 phy_write(phydev, 0x0c, 0xf0f0);
81 phy_write(phydev, 0x0b, 0x104);
87 static void __init imx6q_sabrelite_cko1_setup(void)
89 struct clk *cko1_sel, *ahb, *cko1;
92 cko1_sel = clk_get_sys(NULL, "cko1_sel");
93 ahb = clk_get_sys(NULL, "ahb");
94 cko1 = clk_get_sys(NULL, "cko1");
95 if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
96 pr_err("cko1 setup failed!\n");
99 clk_set_parent(cko1_sel, ahb);
100 rate = clk_round_rate(cko1, 16000000);
101 clk_set_rate(cko1, rate);
103 if (!IS_ERR(cko1_sel))
111 static void __init imx6q_sabrelite_init(void)
113 if (IS_BUILTIN(CONFIG_PHYLIB))
114 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
115 ksz9021rn_phy_fixup);
116 imx6q_sabrelite_cko1_setup();
119 static void __init imx6q_usb_init(void)
121 struct device_node *np;
122 struct platform_device *pdev = NULL;
123 struct anatop *adata = NULL;
125 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
127 pdev = of_find_device_by_node(np);
129 adata = platform_get_drvdata(pdev);
136 #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
137 #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
139 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
140 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
143 * The external charger detector needs to be disabled,
144 * or the signal at DP will be poor
146 anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
147 BM_ANADIG_USB_CHRG_DETECT_EN_B
148 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
150 anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
151 BM_ANADIG_USB_CHRG_DETECT_EN_B |
152 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
158 static void __init imx6q_init_machine(void)
160 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
161 imx6q_sabrelite_init();
163 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
169 static struct cpuidle_driver imx6q_cpuidle_driver = {
170 .name = "imx6q_cpuidle",
171 .owner = THIS_MODULE,
172 .en_core_tk_irqen = 1,
173 .states[0] = ARM_CPUIDLE_WFI_STATE,
177 static void __init imx6q_init_late(void)
179 imx_cpuidle_init(&imx6q_cpuidle_driver);
182 static void __init imx6q_map_io(void)
186 imx6q_clock_map_io();
189 static const struct of_device_id imx6q_irq_match[] __initconst = {
190 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
194 static void __init imx6q_init_irq(void)
196 l2x0_of_init(0, ~0UL);
199 of_irq_init(imx6q_irq_match);
202 static void __init imx6q_timer_init(void)
205 twd_local_timer_of_register();
208 static struct sys_timer imx6q_timer = {
209 .init = imx6q_timer_init,
212 static const char *imx6q_dt_compat[] __initdata = {
217 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
218 .smp = smp_ops(imx_smp_ops),
219 .map_io = imx6q_map_io,
220 .init_irq = imx6q_init_irq,
221 .handle_irq = imx6q_handle_irq,
222 .timer = &imx6q_timer,
223 .init_machine = imx6q_init_machine,
224 .init_late = imx6q_init_late,
225 .dt_compat = imx6q_dt_compat,
226 .restart = imx6q_restart,