Pileus Git - ~andy/linux/blob - arch/arm/mach-highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/clk.h>
  17 #include <linux/clkdev.h>
  18 #include <linux/clocksource.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/input.h>
  21 #include <linux/io.h>
  22 #include <linux/irqchip.h>
  23 #include <linux/mailbox.h>
  24 #include <linux/of.h>
  25 #include <linux/of_irq.h>
  26 #include <linux/of_platform.h>
  27 #include <linux/of_address.h>
  28 #include <linux/reboot.h>
  29 #include <linux/amba/bus.h>
  30 #include <linux/platform_device.h>
  31
  32 #include <asm/psci.h>
  33 #include <asm/hardware/cache-l2x0.h>
  34 #include <asm/mach/arch.h>
  35 #include <asm/mach/map.h>
  36
  37 #include "core.h"
  38 #include "sysregs.h"
  39
  40 void __iomem *sregs_base;
  41 void __iomem *scu_base_addr;
  42
  43 static void __init highbank_scu_map_io(void)
  44 {
  45         unsigned long base;
  46
  47         /* Get SCU base */
  48         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  49
  50         scu_base_addr = ioremap(base, SZ_4K);
  51 }
  52
  53
  54 static void highbank_l2x0_disable(void)
  55 {
  56         outer_flush_all();
  57         /* Disable PL310 L2 Cache controller */
  58         highbank_smc1(0x102, 0x0);
  59 }
  60
  61 static void __init highbank_init_irq(void)
  62 {
  63         irqchip_init();
  64
  65         if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  66                 highbank_scu_map_io();
  67
  68         /* Enable PL310 L2 Cache controller */
  69         if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
  70             of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
  71                 highbank_smc1(0x102, 0x1);
  72                 l2x0_of_init(0, ~0UL);
  73                 outer_cache.disable = highbank_l2x0_disable;
  74         }
  75 }
  76
  77 static void highbank_power_off(void)
  78 {
  79         highbank_set_pwr_shutdown();
  80
  81         while (1)
  82                 cpu_do_idle();
  83 }
  84
  85 static int highbank_platform_notifier(struct notifier_block *nb,
  86                                   unsigned long event, void *__dev)
  87 {
  88         struct resource *res;
  89         int reg = -1;
  90         u32 val;
  91         struct device *dev = __dev;
  92
  93         if (event != BUS_NOTIFY_ADD_DEVICE)
  94                 return NOTIFY_DONE;
  95
  96         if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  97                 reg = 0xc;
  98         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  99                 reg = 0x18;
 100         else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
 101                 reg = 0x20;
 102         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
 103                 res = platform_get_resource(to_platform_device(dev),
 104                                             IORESOURCE_MEM, 0);
 105                 if (res) {
 106                         if (res->start == 0xfff50000)
 107                                 reg = 0;
 108                         else if (res->start == 0xfff51000)
 109                                 reg = 4;
 110                 }
 111         }
 112
 113         if (reg < 0)
 114                 return NOTIFY_DONE;
 115
 116         if (of_property_read_bool(dev->of_node, "dma-coherent")) {
 117                 val = readl(sregs_base + reg);
 118                 writel(val | 0xff01, sregs_base + reg);
 119                 set_dma_ops(dev, &arm_coherent_dma_ops);
 120         }
 121
 122         return NOTIFY_OK;
 123 }
 124
 125 static struct notifier_block highbank_amba_nb = {
 126         .notifier_call = highbank_platform_notifier,
 127 };
 128
 129 static struct notifier_block highbank_platform_nb = {
 130         .notifier_call = highbank_platform_notifier,
 131 };
 132
 133 static struct platform_device highbank_cpuidle_device = {
 134         .name = "cpuidle-calxeda",
 135 };
 136
 137 static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
 138 {
 139         u32 key = *(u32 *)data;
 140
 141         if (event != 0x1000)
 142                 return 0;
 143
 144         if (key == KEY_POWER)
 145                 orderly_poweroff(false);
 146         else if (key == 0xffff)
 147                 ctrl_alt_del();
 148
 149         return 0;
 150 }
 151 static struct notifier_block hb_keys_nb = {
 152         .notifier_call = hb_keys_notifier,
 153 };
 154
 155 static void __init highbank_init(void)
 156 {
 157         struct device_node *np;
 158
 159         /* Map system registers */
 160         np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
 161         sregs_base = of_iomap(np, 0);
 162         WARN_ON(!sregs_base);
 163
 164         pm_power_off = highbank_power_off;
 165         highbank_pm_init();
 166
 167         bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
 168         bus_register_notifier(&amba_bustype, &highbank_amba_nb);
 169
 170         pl320_ipc_register_notifier(&hb_keys_nb);
 171
 172         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 173
 174         if (psci_ops.cpu_suspend)
 175                 platform_device_register(&highbank_cpuidle_device);
 176 }
 177
 178 static const char *highbank_match[] __initconst = {
 179         "calxeda,highbank",
 180         "calxeda,ecx-2000",
 181         NULL,
 182 };
 183
 184 DT_MACHINE_START(HIGHBANK, "Highbank")
 185 #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
 186         .dma_zone_size  = (4ULL * SZ_1G),
 187 #endif
 188         .init_irq       = highbank_init_irq,
 189         .init_machine   = highbank_init,
 190         .dt_compat      = highbank_match,
 191         .restart        = highbank_restart,
 192 MACHINE_END