1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
17 #include <linux/mfd/max8998.h>
18 #include <linux/regulator/machine.h>
19 #include <linux/regulator/fixed.h>
20 #include <linux/regulator/max8952.h>
21 #include <linux/mmc/host.h>
22 #include <linux/i2c-gpio.h>
23 #include <linux/i2c/mcs.h>
24 #include <linux/i2c/atmel_mxt_ts.h>
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
28 #include <asm/mach-types.h>
30 #include <plat/regs-serial.h>
32 #include <plat/devs.h>
34 #include <plat/gpio-cfg.h>
37 #include <plat/sdhci.h>
39 #include <plat/regs-fb-v4.h>
40 #include <plat/fimc-core.h>
41 #include <plat/camport.h>
42 #include <plat/mipi_csis.h>
46 #include <media/v4l2-mediabus.h>
47 #include <media/s5p_fimc.h>
48 #include <media/m5mols.h>
49 #include <media/s5k6aa.h>
53 /* Following are default values for UCON, ULCON and UFCON UART registers */
54 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
55 S3C2410_UCON_RXILEVEL | \
56 S3C2410_UCON_TXIRQMODE | \
57 S3C2410_UCON_RXIRQMODE | \
58 S3C2410_UCON_RXFIFO_TOI | \
59 S3C2443_UCON_RXERR_IRQEN)
61 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
63 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
64 S5PV210_UFCON_TXTRIG256 | \
65 S5PV210_UFCON_RXTRIG256)
67 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
70 .ucon = UNIVERSAL_UCON_DEFAULT,
71 .ulcon = UNIVERSAL_ULCON_DEFAULT,
72 .ufcon = UNIVERSAL_UFCON_DEFAULT,
76 .ucon = UNIVERSAL_UCON_DEFAULT,
77 .ulcon = UNIVERSAL_ULCON_DEFAULT,
78 .ufcon = UNIVERSAL_UFCON_DEFAULT,
82 .ucon = UNIVERSAL_UCON_DEFAULT,
83 .ulcon = UNIVERSAL_ULCON_DEFAULT,
84 .ufcon = UNIVERSAL_UFCON_DEFAULT,
88 .ucon = UNIVERSAL_UCON_DEFAULT,
89 .ulcon = UNIVERSAL_ULCON_DEFAULT,
90 .ufcon = UNIVERSAL_UFCON_DEFAULT,
94 static struct regulator_consumer_supply max8952_consumer =
95 REGULATOR_SUPPLY("vdd_arm", NULL);
97 static struct max8952_platform_data universal_max8952_pdata __initdata = {
98 .gpio_vid0 = EXYNOS4_GPX0(3),
99 .gpio_vid1 = EXYNOS4_GPX0(4),
100 .gpio_en = -1, /* Not controllable, set "Always High" */
101 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
102 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
103 .sync_freq = 0, /* default: fastest */
104 .ramp_speed = 0, /* default: fastest */
111 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
115 .num_consumer_supplies = 1,
116 .consumer_supplies = &max8952_consumer,
120 static struct regulator_consumer_supply lp3974_buck1_consumer =
121 REGULATOR_SUPPLY("vdd_int", NULL);
123 static struct regulator_consumer_supply lp3974_buck2_consumer =
124 REGULATOR_SUPPLY("vddg3d", NULL);
126 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
127 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
128 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
131 static struct regulator_init_data lp3974_buck1_data = {
136 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
137 REGULATOR_CHANGE_STATUS,
143 .num_consumer_supplies = 1,
144 .consumer_supplies = &lp3974_buck1_consumer,
147 static struct regulator_init_data lp3974_buck2_data = {
152 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
153 REGULATOR_CHANGE_STATUS,
159 .num_consumer_supplies = 1,
160 .consumer_supplies = &lp3974_buck2_consumer,
163 static struct regulator_init_data lp3974_buck3_data = {
174 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
175 .consumer_supplies = lp3974_buck3_consumer,
178 static struct regulator_init_data lp3974_buck4_data = {
183 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
191 static struct regulator_init_data lp3974_ldo2_data = {
193 .name = "VALIVE_1.2V",
204 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
205 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
206 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
207 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
210 static struct regulator_init_data lp3974_ldo3_data = {
212 .name = "VUSB+MIPI_1.1V",
216 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
221 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
222 .consumer_supplies = lp3974_ldo3_consumer,
225 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
226 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
229 static struct regulator_init_data lp3974_ldo4_data = {
235 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
240 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
241 .consumer_supplies = lp3974_ldo4_consumer,
244 static struct regulator_init_data lp3974_ldo5_data = {
250 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
257 static struct regulator_init_data lp3974_ldo6_data = {
263 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
270 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
271 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
274 static struct regulator_init_data lp3974_ldo7_data = {
276 .name = "VLCD+VMIPI_1.8V",
280 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
285 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
286 .consumer_supplies = lp3974_ldo7_consumer,
289 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
290 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
293 static struct regulator_init_data lp3974_ldo8_data = {
295 .name = "VUSB+VDAC_3.3V",
299 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
304 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
305 .consumer_supplies = lp3974_ldo8_consumer,
308 static struct regulator_consumer_supply lp3974_ldo9_consumer =
309 REGULATOR_SUPPLY("vddio", "0-003c");
311 static struct regulator_init_data lp3974_ldo9_data = {
322 .num_consumer_supplies = 1,
323 .consumer_supplies = &lp3974_ldo9_consumer,
326 static struct regulator_init_data lp3974_ldo10_data = {
333 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
340 static struct regulator_consumer_supply lp3974_ldo11_consumer =
341 REGULATOR_SUPPLY("dig_28", "0-001f");
343 static struct regulator_init_data lp3974_ldo11_data = {
345 .name = "CAM_AF_3.3V",
349 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
354 .num_consumer_supplies = 1,
355 .consumer_supplies = &lp3974_ldo11_consumer,
358 static struct regulator_init_data lp3974_ldo12_data = {
364 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
371 static struct regulator_init_data lp3974_ldo13_data = {
377 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
384 static struct regulator_consumer_supply lp3974_ldo14_consumer =
385 REGULATOR_SUPPLY("dig_18", "0-001f");
387 static struct regulator_init_data lp3974_ldo14_data = {
389 .name = "CAM_I_HOST_1.8V",
393 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
398 .num_consumer_supplies = 1,
399 .consumer_supplies = &lp3974_ldo14_consumer,
403 static struct regulator_consumer_supply lp3974_ldo15_consumer =
404 REGULATOR_SUPPLY("dig_12", "0-001f");
406 static struct regulator_init_data lp3974_ldo15_data = {
408 .name = "CAM_S_DIG+FM33_CORE_1.2V",
412 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
417 .num_consumer_supplies = 1,
418 .consumer_supplies = &lp3974_ldo15_consumer,
421 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
422 REGULATOR_SUPPLY("vdda", "0-003c"),
423 REGULATOR_SUPPLY("a_sensor", "0-001f"),
426 static struct regulator_init_data lp3974_ldo16_data = {
428 .name = "CAM_S_ANA_2.8V",
432 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
437 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
438 .consumer_supplies = lp3974_ldo16_consumer,
441 static struct regulator_init_data lp3974_ldo17_data = {
443 .name = "VCC_3.0V_LCD",
447 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
455 static struct regulator_init_data lp3974_32khz_ap_data = {
465 static struct regulator_init_data lp3974_32khz_cp_data = {
474 static struct regulator_init_data lp3974_vichg_data = {
483 static struct regulator_init_data lp3974_esafeout1_data = {
486 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
493 static struct regulator_init_data lp3974_esafeout2_data = {
497 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
504 static struct max8998_regulator_data lp3974_regulators[] = {
505 { MAX8998_LDO2, &lp3974_ldo2_data },
506 { MAX8998_LDO3, &lp3974_ldo3_data },
507 { MAX8998_LDO4, &lp3974_ldo4_data },
508 { MAX8998_LDO5, &lp3974_ldo5_data },
509 { MAX8998_LDO6, &lp3974_ldo6_data },
510 { MAX8998_LDO7, &lp3974_ldo7_data },
511 { MAX8998_LDO8, &lp3974_ldo8_data },
512 { MAX8998_LDO9, &lp3974_ldo9_data },
513 { MAX8998_LDO10, &lp3974_ldo10_data },
514 { MAX8998_LDO11, &lp3974_ldo11_data },
515 { MAX8998_LDO12, &lp3974_ldo12_data },
516 { MAX8998_LDO13, &lp3974_ldo13_data },
517 { MAX8998_LDO14, &lp3974_ldo14_data },
518 { MAX8998_LDO15, &lp3974_ldo15_data },
519 { MAX8998_LDO16, &lp3974_ldo16_data },
520 { MAX8998_LDO17, &lp3974_ldo17_data },
521 { MAX8998_BUCK1, &lp3974_buck1_data },
522 { MAX8998_BUCK2, &lp3974_buck2_data },
523 { MAX8998_BUCK3, &lp3974_buck3_data },
524 { MAX8998_BUCK4, &lp3974_buck4_data },
525 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
526 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
527 { MAX8998_ENVICHG, &lp3974_vichg_data },
528 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
529 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
532 static struct max8998_platform_data universal_lp3974_pdata = {
533 .num_regulators = ARRAY_SIZE(lp3974_regulators),
534 .regulators = lp3974_regulators,
535 .buck1_voltage1 = 1100000, /* INT */
536 .buck1_voltage2 = 1000000,
537 .buck1_voltage3 = 1100000,
538 .buck1_voltage4 = 1000000,
539 .buck1_set1 = EXYNOS4_GPX0(5),
540 .buck1_set2 = EXYNOS4_GPX0(6),
541 .buck2_voltage1 = 1200000, /* G3D */
542 .buck2_voltage2 = 1100000,
543 .buck1_default_idx = 0,
544 .buck2_set3 = EXYNOS4_GPE2(0),
545 .buck2_default_idx = 0,
550 enum fixed_regulator_id {
552 FIXED_REG_ID_HDMI_5V,
553 FIXED_REG_ID_CAM_S_IF,
554 FIXED_REG_ID_CAM_I_CORE,
555 FIXED_REG_ID_CAM_VT_DIO,
558 static struct regulator_consumer_supply hdmi_fixed_consumer =
559 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
561 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
564 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
566 .num_consumer_supplies = 1,
567 .consumer_supplies = &hdmi_fixed_consumer,
570 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
571 .supply_name = "HDMI_EN1",
572 .microvolts = 5000000,
573 .gpio = EXYNOS4_GPE0(1),
575 .init_data = &hdmi_fixed_voltage_init_data,
578 static struct platform_device hdmi_fixed_voltage = {
579 .name = "reg-fixed-voltage",
580 .id = FIXED_REG_ID_HDMI_5V,
582 .platform_data = &hdmi_fixed_voltage_config,
586 /* GPIO I2C 5 (PMIC) */
587 static struct i2c_board_info i2c5_devs[] __initdata = {
589 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
590 .platform_data = &universal_max8952_pdata,
592 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
593 .platform_data = &universal_lp3974_pdata,
598 static struct mxt_platform_data qt602240_platform_data = {
605 .voltage = 2800000, /* 2.8V */
606 .orient = MXT_DIAGONAL,
609 static struct i2c_board_info i2c3_devs[] __initdata = {
611 I2C_BOARD_INFO("qt602240_ts", 0x4a),
612 .platform_data = &qt602240_platform_data,
616 static void __init universal_tsp_init(void)
620 /* TSP_LDO_ON: XMDMADDR_11 */
621 gpio = EXYNOS4_GPE2(3);
622 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
623 gpio_export(gpio, 0);
625 /* TSP_INT: XMDMADDR_7 */
626 gpio = EXYNOS4_GPE1(7);
627 gpio_request(gpio, "TSP_INT");
629 s5p_register_gpio_interrupt(gpio);
630 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
631 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
632 i2c3_devs[0].irq = gpio_to_irq(gpio);
636 /* GPIO I2C 12 (3 Touchkey) */
637 static uint32_t touchkey_keymap[] = {
638 /* MCS_KEY_MAP(value, keycode) */
639 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
640 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
643 static struct mcs_platform_data touchkey_data = {
644 .keymap = touchkey_keymap,
645 .keymap_size = ARRAY_SIZE(touchkey_keymap),
649 /* GPIO I2C 3_TOUCH 2.8V */
650 #define I2C_GPIO_BUS_12 12
651 static struct i2c_gpio_platform_data i2c_gpio12_data = {
652 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
653 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
656 static struct platform_device i2c_gpio12 = {
658 .id = I2C_GPIO_BUS_12,
660 .platform_data = &i2c_gpio12_data,
664 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
666 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
667 .platform_data = &touchkey_data,
671 static void __init universal_touchkey_init(void)
675 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
676 gpio_request(gpio, "3_TOUCH_INT");
677 s5p_register_gpio_interrupt(gpio);
678 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
679 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
681 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
682 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
685 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
686 .frequency = 300 * 1000,
691 static struct gpio_keys_button universal_gpio_keys_tables[] = {
693 .code = KEY_VOLUMEUP,
694 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
695 .desc = "gpio-keys: KEY_VOLUMEUP",
698 .debounce_interval = 1,
700 .code = KEY_VOLUMEDOWN,
701 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
702 .desc = "gpio-keys: KEY_VOLUMEDOWN",
705 .debounce_interval = 1,
708 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
709 .desc = "gpio-keys: KEY_CONFIG",
712 .debounce_interval = 1,
715 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
716 .desc = "gpio-keys: KEY_CAMERA",
719 .debounce_interval = 1,
722 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
723 .desc = "gpio-keys: KEY_OK",
726 .debounce_interval = 1,
730 static struct gpio_keys_platform_data universal_gpio_keys_data = {
731 .buttons = universal_gpio_keys_tables,
732 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
735 static struct platform_device universal_gpio_keys = {
738 .platform_data = &universal_gpio_keys_data,
743 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
745 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
746 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
748 .cd_type = S3C_SDHCI_CD_PERMANENT,
749 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
752 static struct regulator_consumer_supply mmc0_supplies[] = {
753 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
756 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
758 .name = "VMEM_VDD_2.8V",
759 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
761 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
762 .consumer_supplies = mmc0_supplies,
765 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
766 .supply_name = "MASSMEMORY_EN",
767 .microvolts = 2800000,
768 .gpio = EXYNOS4_GPE1(3),
770 .init_data = &mmc0_fixed_voltage_init_data,
773 static struct platform_device mmc0_fixed_voltage = {
774 .name = "reg-fixed-voltage",
775 .id = FIXED_REG_ID_MMC0,
777 .platform_data = &mmc0_fixed_voltage_config,
782 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
784 .host_caps = MMC_CAP_4_BIT_DATA |
785 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
787 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
788 .ext_cd_gpio_invert = 1,
789 .cd_type = S3C_SDHCI_CD_GPIO,
790 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
794 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
796 .host_caps = MMC_CAP_4_BIT_DATA |
797 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
799 .cd_type = S3C_SDHCI_CD_EXTERNAL,
802 static void __init universal_sdhci_init(void)
804 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
805 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
806 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
810 static struct i2c_board_info i2c1_devs[] __initdata = {
811 /* Gyro, To be updated */
815 static struct s3c_fb_pd_win universal_fb_win0 = {
830 .virtual_y = 2 * 800,
833 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
834 .win[0] = &universal_fb_win0,
835 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
837 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
838 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
839 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
842 static struct regulator_consumer_supply cam_vt_dio_supply =
843 REGULATOR_SUPPLY("vdd_core", "0-003c");
845 static struct regulator_init_data cam_vt_dio_reg_init_data = {
846 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
847 .num_consumer_supplies = 1,
848 .consumer_supplies = &cam_vt_dio_supply,
851 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
852 .supply_name = "CAM_VT_D_IO",
853 .microvolts = 2800000,
854 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
856 .init_data = &cam_vt_dio_reg_init_data,
859 static struct platform_device cam_vt_dio_fixed_reg_dev = {
860 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
861 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
864 static struct regulator_consumer_supply cam_i_core_supply =
865 REGULATOR_SUPPLY("core", "0-001f");
867 static struct regulator_init_data cam_i_core_reg_init_data = {
868 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
869 .num_consumer_supplies = 1,
870 .consumer_supplies = &cam_i_core_supply,
873 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
874 .supply_name = "CAM_I_CORE_1.2V",
875 .microvolts = 1200000,
876 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
878 .init_data = &cam_i_core_reg_init_data,
881 static struct platform_device cam_i_core_fixed_reg_dev = {
882 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
883 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
886 static struct regulator_consumer_supply cam_s_if_supply =
887 REGULATOR_SUPPLY("d_sensor", "0-001f");
889 static struct regulator_init_data cam_s_if_reg_init_data = {
890 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
891 .num_consumer_supplies = 1,
892 .consumer_supplies = &cam_s_if_supply,
895 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
896 .supply_name = "CAM_S_IF_1.8V",
897 .microvolts = 1800000,
898 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
900 .init_data = &cam_s_if_reg_init_data,
903 static struct platform_device cam_s_if_fixed_reg_dev = {
904 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
905 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
908 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
909 .clk_rate = 166000000UL,
913 .phy_enable = s5p_csis_phy_enable,
916 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
917 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
918 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
919 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
920 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
922 static int s5k6aa_set_power(int on)
924 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
928 static struct s5k6aa_platform_data s5k6aa_platdata = {
929 .mclk_frequency = 21600000UL,
930 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
931 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
932 .bus_type = V4L2_MBUS_PARALLEL,
934 .set_power = s5k6aa_set_power,
937 static struct i2c_board_info s5k6aa_board_info = {
938 I2C_BOARD_INFO("S5K6AA", 0x3C),
939 .platform_data = &s5k6aa_platdata,
942 static int m5mols_set_power(struct device *dev, int on)
944 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
945 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
949 static struct m5mols_platform_data m5mols_platdata = {
950 .gpio_reset = GPIO_CAM_MEGA_nRST,
952 .set_power = m5mols_set_power,
955 static struct i2c_board_info m5mols_board_info = {
956 I2C_BOARD_INFO("M5MOLS", 0x1F),
957 .platform_data = &m5mols_platdata,
960 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
963 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
964 V4L2_MBUS_VSYNC_ACTIVE_LOW,
965 .bus_type = FIMC_ITU_601,
966 .board_info = &s5k6aa_board_info,
968 .clk_frequency = 24000000UL,
971 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
972 V4L2_MBUS_VSYNC_ACTIVE_LOW,
973 .bus_type = FIMC_MIPI_CSI2,
974 .board_info = &m5mols_board_info,
976 .clk_frequency = 24000000UL,
977 .csi_data_align = 32,
981 static struct s5p_platform_fimc fimc_md_platdata = {
982 .isp_info = universal_camera_sensors,
983 .num_clients = ARRAY_SIZE(universal_camera_sensors),
986 static struct gpio universal_camera_gpios[] = {
987 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
988 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
989 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
990 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
991 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
992 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
995 static void __init universal_camera_init(void)
997 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
998 &s5p_device_mipi_csis0);
999 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1000 &s5p_device_fimc_md);
1002 if (gpio_request_array(universal_camera_gpios,
1003 ARRAY_SIZE(universal_camera_gpios))) {
1004 pr_err("%s: GPIO request failed\n", __func__);
1008 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1009 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1011 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1013 /* Free GPIOs controlled directly by the sensor drivers. */
1014 gpio_free(GPIO_CAM_MEGA_nRST);
1015 gpio_free(GPIO_CAM_8M_ISP_INT);
1016 gpio_free(GPIO_CAM_VGA_NRST);
1017 gpio_free(GPIO_CAM_VGA_NSTBY);
1019 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1020 pr_err("Camera port A setup failed\n");
1023 static struct platform_device *universal_devices[] __initdata = {
1024 /* Samsung Platform Devices */
1025 &s5p_device_mipi_csis0,
1031 &mmc0_fixed_voltage,
1038 &s5p_device_i2c_hdmiphy,
1039 &hdmi_fixed_voltage,
1040 &exynos4_device_pd[PD_TV],
1045 /* Universal Devices */
1047 &universal_gpio_keys,
1048 &s5p_device_onenand,
1054 &exynos4_device_pd[PD_MFC],
1055 &exynos4_device_pd[PD_LCD0],
1056 &exynos4_device_pd[PD_CAM],
1057 &cam_vt_dio_fixed_reg_dev,
1058 &cam_i_core_fixed_reg_dev,
1059 &cam_s_if_fixed_reg_dev,
1060 &s5p_device_fimc_md,
1063 static void __init universal_map_io(void)
1065 exynos_init_io(NULL, 0);
1066 s3c24xx_init_clocks(24000000);
1067 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1070 void s5p_tv_setup(void)
1072 /* direct HPD to HDMI chip */
1073 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1074 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1075 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1077 /* setup dependencies between TV devices */
1078 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
1079 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
1082 static void __init universal_reserve(void)
1084 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1087 static void __init universal_machine_init(void)
1089 universal_sdhci_init();
1092 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1093 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1095 universal_tsp_init();
1096 s3c_i2c3_set_platdata(NULL);
1097 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1099 s3c_i2c5_set_platdata(NULL);
1100 s5p_i2c_hdmiphy_set_platdata(NULL);
1101 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1103 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1105 universal_touchkey_init();
1106 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1107 ARRAY_SIZE(i2c_gpio12_devs));
1109 universal_camera_init();
1112 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1114 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
1115 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
1117 s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1118 s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1119 s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1120 s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1121 s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1124 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1125 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1126 .atag_offset = 0x100,
1127 .init_irq = exynos4_init_irq,
1128 .map_io = universal_map_io,
1129 .handle_irq = gic_handle_irq,
1130 .init_machine = universal_machine_init,
1131 .timer = &exynos4_timer,
1132 .reserve = &universal_reserve,
1133 .restart = exynos4_restart,