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[~andy/linux] / arch / arm / mach-ebsa110 / core.c
1 /*
2  *  linux/arch/arm/mach-ebsa110/core.c
3  *
4  *  Copyright (C) 1998-2001 Russell King
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  *  Extra MM routines for the EBSA-110 architecture
11  */
12 #include <linux/kernel.h>
13 #include <linux/mm.h>
14 #include <linux/interrupt.h>
15 #include <linux/serial_8250.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18
19 #include <mach/hardware.h>
20 #include <asm/irq.h>
21 #include <asm/setup.h>
22 #include <asm/mach-types.h>
23 #include <asm/pgtable.h>
24 #include <asm/page.h>
25 #include <asm/system_misc.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/mach/irq.h>
29 #include <asm/mach/map.h>
30
31 #include <asm/mach/time.h>
32
33 #include "core.h"
34
35 static void ebsa110_mask_irq(struct irq_data *d)
36 {
37         __raw_writeb(1 << d->irq, IRQ_MCLR);
38 }
39
40 static void ebsa110_unmask_irq(struct irq_data *d)
41 {
42         __raw_writeb(1 << d->irq, IRQ_MSET);
43 }
44
45 static struct irq_chip ebsa110_irq_chip = {
46         .irq_ack        = ebsa110_mask_irq,
47         .irq_mask       = ebsa110_mask_irq,
48         .irq_unmask     = ebsa110_unmask_irq,
49 };
50  
51 static void __init ebsa110_init_irq(void)
52 {
53         unsigned long flags;
54         unsigned int irq;
55
56         local_irq_save(flags);
57         __raw_writeb(0xff, IRQ_MCLR);
58         __raw_writeb(0x55, IRQ_MSET);
59         __raw_writeb(0x00, IRQ_MSET);
60         if (__raw_readb(IRQ_MASK) != 0x55)
61                 while (1);
62         __raw_writeb(0xff, IRQ_MCLR);   /* clear all interrupt enables */
63         local_irq_restore(flags);
64
65         for (irq = 0; irq < NR_IRQS; irq++) {
66                 irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
67                                          handle_level_irq);
68                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
69         }
70 }
71
72 static struct map_desc ebsa110_io_desc[] __initdata = {
73         /*
74          * sparse external-decode ISAIO space
75          */
76         {       /* IRQ_STAT/IRQ_MCLR */
77                 .virtual        = IRQ_STAT,
78                 .pfn            = __phys_to_pfn(TRICK4_PHYS),
79                 .length         = TRICK4_SIZE,
80                 .type           = MT_DEVICE
81         }, {    /* IRQ_MASK/IRQ_MSET */
82                 .virtual        = IRQ_MASK,
83                 .pfn            = __phys_to_pfn(TRICK3_PHYS),
84                 .length         = TRICK3_SIZE,
85                 .type           = MT_DEVICE
86         }, {    /* SOFT_BASE */
87                 .virtual        = SOFT_BASE,
88                 .pfn            = __phys_to_pfn(TRICK1_PHYS),
89                 .length         = TRICK1_SIZE,
90                 .type           = MT_DEVICE
91         }, {    /* PIT_BASE */
92                 .virtual        = PIT_BASE,
93                 .pfn            = __phys_to_pfn(TRICK0_PHYS),
94                 .length         = TRICK0_SIZE,
95                 .type           = MT_DEVICE
96         },
97
98         /*
99          * self-decode ISAIO space
100          */
101         {
102                 .virtual        = ISAIO_BASE,
103                 .pfn            = __phys_to_pfn(ISAIO_PHYS),
104                 .length         = ISAIO_SIZE,
105                 .type           = MT_DEVICE
106         }, {
107                 .virtual        = ISAMEM_BASE,
108                 .pfn            = __phys_to_pfn(ISAMEM_PHYS),
109                 .length         = ISAMEM_SIZE,
110                 .type           = MT_DEVICE
111         }
112 };
113
114 static void __init ebsa110_map_io(void)
115 {
116         iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
117 }
118
119
120 #define PIT_CTRL                (PIT_BASE + 0x0d)
121 #define PIT_T2                  (PIT_BASE + 0x09)
122 #define PIT_T1                  (PIT_BASE + 0x05)
123 #define PIT_T0                  (PIT_BASE + 0x01)
124
125 /*
126  * This is the rate at which your MCLK signal toggles (in Hz)
127  * This was measured on a 10 digit frequency counter sampling
128  * over 1 second.
129  */
130 #define MCLK    47894000
131
132 /*
133  * This is the rate at which the PIT timers get clocked
134  */
135 #define CLKBY7  (MCLK / 7)
136
137 /*
138  * This is the counter value.  We tick at 200Hz on this platform.
139  */
140 #define COUNT   ((CLKBY7 + (HZ / 2)) / HZ)
141
142 /*
143  * Get the time offset from the system PIT.  Note that if we have missed an
144  * interrupt, then the PIT counter will roll over (ie, be negative).
145  * This actually works out to be convenient.
146  */
147 static unsigned long ebsa110_gettimeoffset(void)
148 {
149         unsigned long offset, count;
150
151         __raw_writeb(0x40, PIT_CTRL);
152         count = __raw_readb(PIT_T1);
153         count |= __raw_readb(PIT_T1) << 8;
154
155         /*
156          * If count > COUNT, make the number negative.
157          */
158         if (count > COUNT)
159                 count |= 0xffff0000;
160
161         offset = COUNT;
162         offset -= count;
163
164         /*
165          * `offset' is in units of timer counts.  Convert
166          * offset to units of microseconds.
167          */
168         offset = offset * (1000000 / HZ) / COUNT;
169
170         return offset;
171 }
172
173 static irqreturn_t
174 ebsa110_timer_interrupt(int irq, void *dev_id)
175 {
176         u32 count;
177
178         /* latch and read timer 1 */
179         __raw_writeb(0x40, PIT_CTRL);
180         count = __raw_readb(PIT_T1);
181         count |= __raw_readb(PIT_T1) << 8;
182
183         count += COUNT;
184
185         __raw_writeb(count & 0xff, PIT_T1);
186         __raw_writeb(count >> 8, PIT_T1);
187
188         timer_tick();
189
190         return IRQ_HANDLED;
191 }
192
193 static struct irqaction ebsa110_timer_irq = {
194         .name           = "EBSA110 Timer Tick",
195         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
196         .handler        = ebsa110_timer_interrupt,
197 };
198
199 /*
200  * Set up timer interrupt.
201  */
202 static void __init ebsa110_timer_init(void)
203 {
204         /*
205          * Timer 1, mode 2, LSB/MSB
206          */
207         __raw_writeb(0x70, PIT_CTRL);
208         __raw_writeb(COUNT & 0xff, PIT_T1);
209         __raw_writeb(COUNT >> 8, PIT_T1);
210
211         setup_irq(IRQ_EBSA110_TIMER0, &ebsa110_timer_irq);
212 }
213
214 static struct sys_timer ebsa110_timer = {
215         .init           = ebsa110_timer_init,
216         .offset         = ebsa110_gettimeoffset,
217 };
218
219 static struct plat_serial8250_port serial_platform_data[] = {
220         {
221                 .iobase         = 0x3f8,
222                 .irq            = 1,
223                 .uartclk        = 1843200,
224                 .regshift       = 0,
225                 .iotype         = UPIO_PORT,
226                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
227         },
228         {
229                 .iobase         = 0x2f8,
230                 .irq            = 2,
231                 .uartclk        = 1843200,
232                 .regshift       = 0,
233                 .iotype         = UPIO_PORT,
234                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
235         },
236         { },
237 };
238
239 static struct platform_device serial_device = {
240         .name                   = "serial8250",
241         .id                     = PLAT8250_DEV_PLATFORM,
242         .dev                    = {
243                 .platform_data  = serial_platform_data,
244         },
245 };
246
247 static struct resource am79c961_resources[] = {
248         {
249                 .start          = 0x220,
250                 .end            = 0x238,
251                 .flags          = IORESOURCE_IO,
252         }, {
253                 .start          = IRQ_EBSA110_ETHERNET,
254                 .end            = IRQ_EBSA110_ETHERNET,
255                 .flags          = IORESOURCE_IRQ,
256         },
257 };
258
259 static struct platform_device am79c961_device = {
260         .name                   = "am79c961",
261         .id                     = -1,
262         .num_resources          = ARRAY_SIZE(am79c961_resources),
263         .resource               = am79c961_resources,
264 };
265
266 static struct platform_device *ebsa110_devices[] = {
267         &serial_device,
268         &am79c961_device,
269 };
270
271 /*
272  * EBSA110 idling methodology:
273  *
274  * We can not execute the "wait for interrupt" instruction since that
275  * will stop our MCLK signal (which provides the clock for the glue
276  * logic, and therefore the timer interrupt).
277  *
278  * Instead, we spin, polling the IRQ_STAT register for the occurrence
279  * of any interrupt with core clock down to the memory clock.
280  */
281 static void ebsa110_idle(void)
282 {
283         const char *irq_stat = (char *)0xff000000;
284
285         /* disable clock switching */
286         asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
287
288         /* wait for an interrupt to occur */
289         while (!*irq_stat);
290
291         /* enable clock switching */
292         asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
293 }
294
295 static int __init ebsa110_init(void)
296 {
297         arm_pm_idle = ebsa110_idle;
298         return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
299 }
300
301 arch_initcall(ebsa110_init);
302
303 static void ebsa110_restart(char mode, const char *cmd)
304 {
305         soft_restart(0x80000000);
306 }
307
308 MACHINE_START(EBSA110, "EBSA110")
309         /* Maintainer: Russell King */
310         .atag_offset    = 0x400,
311         .reserve_lp0    = 1,
312         .reserve_lp2    = 1,
313         .restart_mode   = 's',
314         .map_io         = ebsa110_map_io,
315         .init_irq       = ebsa110_init_irq,
316         .timer          = &ebsa110_timer,
317         .restart        = ebsa110_restart,
318 MACHINE_END