Pileus Git - ~andy/linux/blob - arch/arm/mach-clps711x/common.c

   1 /*
   2  *  linux/arch/arm/mach-clps711x/core.c
   3  *
   4  *  Core support for the CLPS711x-based machines.
   5  *
   6  *  Copyright (C) 2001,2011 Deep Blue Solutions Ltd
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/irq.h>
  28 #include <linux/sched.h>
  29
  30 #include <asm/sizes.h>
  31 #include <mach/hardware.h>
  32 #include <asm/irq.h>
  33 #include <asm/pgtable.h>
  34 #include <asm/page.h>
  35 #include <asm/mach/map.h>
  36 #include <asm/mach/time.h>
  37 #include <asm/system_misc.h>
  38
  39 /*
  40  * This maps the generic CLPS711x registers
  41  */
  42 static struct map_desc clps711x_io_desc[] __initdata = {
  43         {
  44                 .virtual        = (unsigned long)CLPS711X_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(CLPS711X_PHYS_BASE),
  46                 .length         = SZ_1M,
  47                 .type           = MT_DEVICE
  48         }
  49 };
  50
  51 void __init clps711x_map_io(void)
  52 {
  53         iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
  54 }
  55
  56 static void int1_mask(struct irq_data *d)
  57 {
  58         u32 intmr1;
  59
  60         intmr1 = clps_readl(INTMR1);
  61         intmr1 &= ~(1 << d->irq);
  62         clps_writel(intmr1, INTMR1);
  63 }
  64
  65 static void int1_ack(struct irq_data *d)
  66 {
  67         switch (d->irq) {
  68         case IRQ_CSINT:  clps_writel(0, COEOI);  break;
  69         case IRQ_TC1OI:  clps_writel(0, TC1EOI); break;
  70         case IRQ_TC2OI:  clps_writel(0, TC2EOI); break;
  71         case IRQ_RTCMI:  clps_writel(0, RTCEOI); break;
  72         case IRQ_TINT:   clps_writel(0, TEOI);   break;
  73         case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
  74         }
  75 }
  76
  77 static void int1_unmask(struct irq_data *d)
  78 {
  79         u32 intmr1;
  80
  81         intmr1 = clps_readl(INTMR1);
  82         intmr1 |= 1 << d->irq;
  83         clps_writel(intmr1, INTMR1);
  84 }
  85
  86 static struct irq_chip int1_chip = {
  87         .irq_ack        = int1_ack,
  88         .irq_mask       = int1_mask,
  89         .irq_unmask     = int1_unmask,
  90 };
  91
  92 static void int2_mask(struct irq_data *d)
  93 {
  94         u32 intmr2;
  95
  96         intmr2 = clps_readl(INTMR2);
  97         intmr2 &= ~(1 << (d->irq - 16));
  98         clps_writel(intmr2, INTMR2);
  99 }
 100
 101 static void int2_ack(struct irq_data *d)
 102 {
 103         switch (d->irq) {
 104         case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
 105         }
 106 }
 107
 108 static void int2_unmask(struct irq_data *d)
 109 {
 110         u32 intmr2;
 111
 112         intmr2 = clps_readl(INTMR2);
 113         intmr2 |= 1 << (d->irq - 16);
 114         clps_writel(intmr2, INTMR2);
 115 }
 116
 117 static struct irq_chip int2_chip = {
 118         .irq_ack        = int2_ack,
 119         .irq_mask       = int2_mask,
 120         .irq_unmask     = int2_unmask,
 121 };
 122
 123 void __init clps711x_init_irq(void)
 124 {
 125         unsigned int i;
 126
 127         for (i = 0; i < NR_IRQS; i++) {
 128                 if (INT1_IRQS & (1 << i)) {
 129                         irq_set_chip_and_handler(i, &int1_chip,
 130                                                  handle_level_irq);
 131                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 132                 }
 133                 if (INT2_IRQS & (1 << i)) {
 134                         irq_set_chip_and_handler(i, &int2_chip,
 135                                                  handle_level_irq);
 136                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 137                 }
 138         }
 139
 140         /*
 141          * Disable interrupts
 142          */
 143         clps_writel(0, INTMR1);
 144         clps_writel(0, INTMR2);
 145
 146         /*
 147          * Clear down any pending interrupts
 148          */
 149         clps_writel(0, COEOI);
 150         clps_writel(0, TC1EOI);
 151         clps_writel(0, TC2EOI);
 152         clps_writel(0, RTCEOI);
 153         clps_writel(0, TEOI);
 154         clps_writel(0, UMSEOI);
 155         clps_writel(0, SYNCIO);
 156         clps_writel(0, KBDEOI);
 157 }
 158
 159 /*
 160  * gettimeoffset() returns time since last timer tick, in usecs.
 161  *
 162  * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
 163  * 'tick' is usecs per jiffy.
 164  */
 165 static unsigned long clps711x_gettimeoffset(void)
 166 {
 167         unsigned long hwticks;
 168         hwticks = LATCH - (clps_readl(TC2D) & 0xffff);  /* since last underflow */
 169         return (hwticks * (tick_nsec / 1000)) / LATCH;
 170 }
 171
 172 /*
 173  * IRQ handler for the timer
 174  */
 175 static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
 176 {
 177         timer_tick();
 178         return IRQ_HANDLED;
 179 }
 180
 181 static struct irqaction clps711x_timer_irq = {
 182         .name           = "CLPS711x Timer Tick",
 183         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 184         .handler        = p720t_timer_interrupt,
 185 };
 186
 187 static void __init clps711x_timer_init(void)
 188 {
 189         unsigned int syscon;
 190
 191         syscon = clps_readl(SYSCON1);
 192         syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
 193         clps_writel(syscon, SYSCON1);
 194
 195         clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
 196
 197         setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
 198 }
 199
 200 struct sys_timer clps711x_timer = {
 201         .init           = clps711x_timer_init,
 202         .offset         = clps711x_gettimeoffset,
 203 };
 204
 205 void clps711x_restart(char mode, const char *cmd)
 206 {
 207         soft_restart(0);
 208 }
 209
 210 static void clps711x_idle(void)
 211 {
 212         clps_writel(1, HALT);
 213         __asm__ __volatile__(
 214         "mov    r0, r0\n\
 215         mov     r0, r0");
 216 }
 217
 218 static int __init clps711x_idle_init(void)
 219 {
 220         arm_pm_idle = clps711x_idle;
 221         return 0;
 222 }
 223
 224 arch_initcall(clps711x_idle_init);