Pileus Git - ~andy/linux/blob - arch/arm/mach-at91/board-dt.c

   1 /*
   2  *  Setup code for AT91SAM Evaluation Kits with Device Tree support
   3  *
   4  *  Covers: * AT91SAM9G45-EKES  board
   5  *          * AT91SAM9M10-EKES  board
   6  *          * AT91SAM9M10G45-EK board
   7  *
   8  *  Copyright (C) 2011 Atmel,
   9  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  10  *
  11  * Licensed under GPLv2 or later.
  12  */
  13
  14 #include <linux/types.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/gpio.h>
  18 #include <linux/of_platform.h>
  19
  20 #include <mach/hardware.h>
  21 #include <mach/board.h>
  22 #include <mach/system_rev.h>
  23 #include <mach/at91sam9_smc.h>
  24
  25 #include <asm/setup.h>
  26 #include <asm/irq.h>
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach/map.h>
  29 #include <asm/mach/irq.h>
  30
  31 #include "sam9_smc.h"
  32 #include "generic.h"
  33
  34
  35 static void __init ek_init_early(void)
  36 {
  37         /* Initialize processor: 12.000 MHz crystal */
  38         at91_initialize(12000000);
  39 }
  40
  41 /* det_pin is not connected */
  42 static struct atmel_nand_data __initdata ek_nand_data = {
  43         .ale            = 21,
  44         .cle            = 22,
  45         .det_pin        = -EINVAL,
  46         .rdy_pin        = AT91_PIN_PC8,
  47         .enable_pin     = AT91_PIN_PC14,
  48 };
  49
  50 static struct sam9_smc_config __initdata ek_nand_smc_config = {
  51         .ncs_read_setup         = 0,
  52         .nrd_setup              = 2,
  53         .ncs_write_setup        = 0,
  54         .nwe_setup              = 2,
  55
  56         .ncs_read_pulse         = 4,
  57         .nrd_pulse              = 4,
  58         .ncs_write_pulse        = 4,
  59         .nwe_pulse              = 4,
  60
  61         .read_cycle             = 7,
  62         .write_cycle            = 7,
  63
  64         .mode                   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
  65         .tdf_cycles             = 3,
  66 };
  67
  68 static void __init ek_add_device_nand(void)
  69 {
  70         ek_nand_data.bus_width_16 = board_have_nand_16bit();
  71         /* setup bus-width (8 or 16) */
  72         if (ek_nand_data.bus_width_16)
  73                 ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
  74         else
  75                 ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
  76
  77         /* configure chip-select 3 (NAND) */
  78         sam9_smc_configure(0, 3, &ek_nand_smc_config);
  79
  80         at91_add_device_nand(&ek_nand_data);
  81 }
  82
  83 static void __init at91_dt_init_irq(void)
  84 {
  85         at91_init_irq_default();
  86 }
  87
  88 static void __init at91_dt_device_init(void)
  89 {
  90         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  91
  92         /* NAND */
  93         ek_add_device_nand();
  94 }
  95
  96 static const char *at91_dt_board_compat[] __initdata = {
  97         "atmel,at91sam9m10g45ek",
  98         "atmel,at91sam9x5ek",
  99         "calao,usb-a9g20",
 100         NULL
 101 };
 102
 103 DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
 104         /* Maintainer: Atmel */
 105         .timer          = &at91sam926x_timer,
 106         .map_io         = at91_map_io,
 107         .init_early     = ek_init_early,
 108         .init_irq       = at91_dt_init_irq,
 109         .init_machine   = at91_dt_device_init,
 110         .dt_compat      = at91_dt_board_compat,
 111 MACHINE_END