Pileus Git - ~andy/linux/blob - arch/arm/kernel/perf_event_cpu.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14  *
  15  * Copyright (C) 2012 ARM Limited
  16  *
  17  * Author: Will Deacon <will.deacon@arm.com>
  18  */
  19 #define pr_fmt(fmt) "CPU PMU: " fmt
  20
  21 #include <linux/bitmap.h>
  22 #include <linux/export.h>
  23 #include <linux/kernel.h>
  24 #include <linux/of.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/spinlock.h>
  27
  28 #include <asm/cputype.h>
  29 #include <asm/irq_regs.h>
  30 #include <asm/pmu.h>
  31
  32 /* Set at runtime when we know what CPU type we are. */
  33 static struct arm_pmu *cpu_pmu;
  34
  35 static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events);
  36 static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask);
  37 static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
  38
  39 /*
  40  * Despite the names, these two functions are CPU-specific and are used
  41  * by the OProfile/perf code.
  42  */
  43 const char *perf_pmu_name(void)
  44 {
  45         if (!cpu_pmu)
  46                 return NULL;
  47
  48         return cpu_pmu->pmu.name;
  49 }
  50 EXPORT_SYMBOL_GPL(perf_pmu_name);
  51
  52 int perf_num_counters(void)
  53 {
  54         int max_events = 0;
  55
  56         if (cpu_pmu != NULL)
  57                 max_events = cpu_pmu->num_events;
  58
  59         return max_events;
  60 }
  61 EXPORT_SYMBOL_GPL(perf_num_counters);
  62
  63 /* Include the PMU-specific implementations. */
  64 #include "perf_event_xscale.c"
  65 #include "perf_event_v6.c"
  66 #include "perf_event_v7.c"
  67
  68 static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
  69 {
  70         return &__get_cpu_var(cpu_hw_events);
  71 }
  72
  73 static void cpu_pmu_free_irq(void)
  74 {
  75         int i, irq, irqs;
  76         struct platform_device *pmu_device = cpu_pmu->plat_device;
  77
  78         irqs = min(pmu_device->num_resources, num_possible_cpus());
  79
  80         for (i = 0; i < irqs; ++i) {
  81                 if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
  82                         continue;
  83                 irq = platform_get_irq(pmu_device, i);
  84                 if (irq >= 0)
  85                         free_irq(irq, cpu_pmu);
  86         }
  87 }
  88
  89 static int cpu_pmu_request_irq(irq_handler_t handler)
  90 {
  91         int i, err, irq, irqs;
  92         struct platform_device *pmu_device = cpu_pmu->plat_device;
  93
  94         if (!pmu_device)
  95                 return -ENODEV;
  96
  97         irqs = min(pmu_device->num_resources, num_possible_cpus());
  98         if (irqs < 1) {
  99                 pr_err("no irqs for PMUs defined\n");
 100                 return -ENODEV;
 101         }
 102
 103         for (i = 0; i < irqs; ++i) {
 104                 err = 0;
 105                 irq = platform_get_irq(pmu_device, i);
 106                 if (irq < 0)
 107                         continue;
 108
 109                 /*
 110                  * If we have a single PMU interrupt that we can't shift,
 111                  * assume that we're running on a uniprocessor machine and
 112                  * continue. Otherwise, continue without this interrupt.
 113                  */
 114                 if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
 115                         pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
 116                                     irq, i);
 117                         continue;
 118                 }
 119
 120                 err = request_irq(irq, handler, IRQF_NOBALANCING, "arm-pmu",
 121                                   cpu_pmu);
 122                 if (err) {
 123                         pr_err("unable to request IRQ%d for ARM PMU counters\n",
 124                                 irq);
 125                         return err;
 126                 }
 127
 128                 cpumask_set_cpu(i, &cpu_pmu->active_irqs);
 129         }
 130
 131         return 0;
 132 }
 133
 134 static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu)
 135 {
 136         int cpu;
 137         for_each_possible_cpu(cpu) {
 138                 struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu);
 139                 events->events = per_cpu(hw_events, cpu);
 140                 events->used_mask = per_cpu(used_mask, cpu);
 141                 raw_spin_lock_init(&events->pmu_lock);
 142         }
 143
 144         cpu_pmu->get_hw_events  = cpu_pmu_get_cpu_events;
 145         cpu_pmu->request_irq    = cpu_pmu_request_irq;
 146         cpu_pmu->free_irq       = cpu_pmu_free_irq;
 147
 148         /* Ensure the PMU has sane values out of reset. */
 149         if (cpu_pmu && cpu_pmu->reset)
 150                 on_each_cpu(cpu_pmu->reset, NULL, 1);
 151 }
 152
 153 /*
 154  * PMU hardware loses all context when a CPU goes offline.
 155  * When a CPU is hotplugged back in, since some hardware registers are
 156  * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
 157  * junk values out of them.
 158  */
 159 static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
 160                                     unsigned long action, void *hcpu)
 161 {
 162         if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
 163                 return NOTIFY_DONE;
 164
 165         if (cpu_pmu && cpu_pmu->reset)
 166                 cpu_pmu->reset(NULL);
 167
 168         return NOTIFY_OK;
 169 }
 170
 171 static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
 172         .notifier_call = cpu_pmu_notify,
 173 };
 174
 175 /*
 176  * PMU platform driver and devicetree bindings.
 177  */
 178 static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
 179         {.compatible = "arm,cortex-a15-pmu",    .data = armv7_a15_pmu_init},
 180         {.compatible = "arm,cortex-a9-pmu",     .data = armv7_a9_pmu_init},
 181         {.compatible = "arm,cortex-a8-pmu",     .data = armv7_a8_pmu_init},
 182         {.compatible = "arm,cortex-a7-pmu",     .data = armv7_a7_pmu_init},
 183         {.compatible = "arm,cortex-a5-pmu",     .data = armv7_a5_pmu_init},
 184         {.compatible = "arm,arm11mpcore-pmu",   .data = armv6mpcore_pmu_init},
 185         {.compatible = "arm,arm1176-pmu",       .data = armv6pmu_init},
 186         {.compatible = "arm,arm1136-pmu",       .data = armv6pmu_init},
 187         {},
 188 };
 189
 190 static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
 191         {.name = "arm-pmu"},
 192         {},
 193 };
 194
 195 /*
 196  * CPU PMU identification and probing.
 197  */
 198 static struct arm_pmu *__devinit probe_current_pmu(void)
 199 {
 200         struct arm_pmu *pmu = NULL;
 201         int cpu = get_cpu();
 202         unsigned long cpuid = read_cpuid_id();
 203         unsigned long implementor = (cpuid & 0xFF000000) >> 24;
 204         unsigned long part_number = (cpuid & 0xFFF0);
 205
 206         pr_info("probing PMU on CPU %d\n", cpu);
 207
 208         /* ARM Ltd CPUs. */
 209         if (0x41 == implementor) {
 210                 switch (part_number) {
 211                 case 0xB360:    /* ARM1136 */
 212                 case 0xB560:    /* ARM1156 */
 213                 case 0xB760:    /* ARM1176 */
 214                         pmu = armv6pmu_init();
 215                         break;
 216                 case 0xB020:    /* ARM11mpcore */
 217                         pmu = armv6mpcore_pmu_init();
 218                         break;
 219                 case 0xC080:    /* Cortex-A8 */
 220                         pmu = armv7_a8_pmu_init();
 221                         break;
 222                 case 0xC090:    /* Cortex-A9 */
 223                         pmu = armv7_a9_pmu_init();
 224                         break;
 225                 case 0xC050:    /* Cortex-A5 */
 226                         pmu = armv7_a5_pmu_init();
 227                         break;
 228                 case 0xC0F0:    /* Cortex-A15 */
 229                         pmu = armv7_a15_pmu_init();
 230                         break;
 231                 case 0xC070:    /* Cortex-A7 */
 232                         pmu = armv7_a7_pmu_init();
 233                         break;
 234                 }
 235         /* Intel CPUs [xscale]. */
 236         } else if (0x69 == implementor) {
 237                 part_number = (cpuid >> 13) & 0x7;
 238                 switch (part_number) {
 239                 case 1:
 240                         pmu = xscale1pmu_init();
 241                         break;
 242                 case 2:
 243                         pmu = xscale2pmu_init();
 244                         break;
 245                 }
 246         }
 247
 248         put_cpu();
 249         return pmu;
 250 }
 251
 252 static int __devinit cpu_pmu_device_probe(struct platform_device *pdev)
 253 {
 254         const struct of_device_id *of_id;
 255         struct arm_pmu *(*init_fn)(void);
 256         struct device_node *node = pdev->dev.of_node;
 257
 258         if (cpu_pmu) {
 259                 pr_info("attempt to register multiple PMU devices!");
 260                 return -ENOSPC;
 261         }
 262
 263         if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
 264                 init_fn = of_id->data;
 265                 cpu_pmu = init_fn();
 266         } else {
 267                 cpu_pmu = probe_current_pmu();
 268         }
 269
 270         if (!cpu_pmu)
 271                 return -ENODEV;
 272
 273         cpu_pmu->plat_device = pdev;
 274         cpu_pmu_init(cpu_pmu);
 275         register_cpu_notifier(&cpu_pmu_hotplug_notifier);
 276         armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW);
 277
 278         return 0;
 279 }
 280
 281 static struct platform_driver cpu_pmu_driver = {
 282         .driver         = {
 283                 .name   = "arm-pmu",
 284                 .pm     = &armpmu_dev_pm_ops,
 285                 .of_match_table = cpu_pmu_of_device_ids,
 286         },
 287         .probe          = cpu_pmu_device_probe,
 288         .id_table       = cpu_pmu_plat_device_ids,
 289 };
 290
 291 static int __init register_pmu_driver(void)
 292 {
 293         return platform_driver_register(&cpu_pmu_driver);
 294 }
 295 device_initcall(register_pmu_driver);