2 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
4 * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
6 * Licensed under GPLv2 or later
9 /include/ "skeleton.dtsi"
12 compatible = "wm,wm8650";
17 compatible = "simple-bus";
19 interrupt-parent = <&intc0>;
21 intc0: interrupt-controller@d8140000 {
22 compatible = "via,vt8500-intc";
24 reg = <0xd8140000 0x10000>;
25 #interrupt-cells = <1>;
28 /* Secondary IC cascaded to intc0 */
29 intc1: interrupt-controller@d8150000 {
30 compatible = "via,vt8500-intc";
32 #interrupt-cells = <1>;
33 reg = <0xD8150000 0x10000>;
34 interrupts = <56 57 58 59 60 61 62 63>;
37 gpio: gpio-controller@d8110000 {
38 compatible = "wm,wm8650-gpio";
40 reg = <0xd8110000 0x10000>;
45 compatible = "via,vt8500-pmc";
46 reg = <0xd8130000 0x1000>;
54 compatible = "fixed-clock";
55 clock-frequency = <25000000>;
60 compatible = "fixed-clock";
61 clock-frequency = <24000000>;
66 compatible = "wm,wm8650-pll-clock";
73 compatible = "wm,wm8650-pll-clock";
80 compatible = "via,vt8500-device-clock";
82 divisor-reg = <0x300>;
87 compatible = "via,vt8500-device-clock";
89 divisor-reg = <0x328>;
90 divisor-mask = <0x3f>;
98 compatible = "via,vt8500-timer";
99 reg = <0xd8130100 0x28>;
104 compatible = "via,vt8500-ehci";
105 reg = <0xd8007900 0x200>;
110 compatible = "platform-uhci";
111 reg = <0xd8007b00 0x200>;
116 compatible = "wm,wm8505-fb";
117 reg = <0xd8050800 0x200>;
118 display = <&display>;
119 default-mode = <&mode0>;
123 compatible = "wm,prizm-ge-rops";
124 reg = <0xd8050400 0x100>;
128 compatible = "via,vt8500-uart";
129 reg = <0xd8200000 0x1040>;
135 compatible = "via,vt8500-uart";
136 reg = <0xd82b0000 0x1040>;
142 compatible = "via,vt8500-rtc";
143 reg = <0xd8100000 0x10000>;