3 /include/ "tegra20.dtsi"
6 model = "Toshiba AC100 / Dynabook AZ";
7 compatible = "compal,paz00", "nvidia,tegra20";
10 reg = <0x00000000 0x20000000>;
14 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>;
17 state_default: pinmux {
19 nvidia,pins = "ata", "atc", "atd", "ate",
20 "dap2", "gmb", "gmc", "gmd", "spia",
21 "spib", "spic", "spid", "spie";
22 nvidia,function = "gmi";
25 nvidia,pins = "atb", "gma", "gme";
26 nvidia,function = "sdio4";
29 nvidia,pins = "cdev1";
30 nvidia,function = "plla_out";
33 nvidia,pins = "cdev2";
34 nvidia,function = "pllp_out4";
38 nvidia,function = "crt";
42 nvidia,function = "pllc_out1";
46 nvidia,function = "dap1";
50 nvidia,function = "dap3";
54 nvidia,function = "dap4";
58 nvidia,function = "i2c2";
61 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
62 nvidia,function = "rsvd1";
66 nvidia,function = "i2c3";
69 nvidia,pins = "gpu", "sdb", "sdd";
70 nvidia,function = "pwm";
74 nvidia,function = "rtck";
77 nvidia,pins = "gpv", "slxa", "slxk";
78 nvidia,function = "pcie";
81 nvidia,pins = "hdint", "pta";
82 nvidia,function = "hdmi";
86 nvidia,function = "i2cp";
89 nvidia,pins = "irrx", "irtx";
90 nvidia,function = "uarta";
93 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
94 nvidia,function = "kbc";
97 nvidia,pins = "kbcb", "kbcd";
98 nvidia,function = "sdio2";
101 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
102 "ld3", "ld4", "ld5", "ld6", "ld7",
103 "ld8", "ld9", "ld10", "ld11", "ld12",
104 "ld13", "ld14", "ld15", "ld16", "ld17",
105 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
106 "lhs", "lm0", "lm1", "lpp", "lpw0",
107 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
108 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
110 nvidia,function = "displaya";
114 nvidia,function = "owr";
118 nvidia,function = "pwr_on";
122 nvidia,function = "i2c1";
126 nvidia,function = "twc";
129 nvidia,pins = "sdio1";
130 nvidia,function = "sdio1";
133 nvidia,pins = "slxc", "slxd";
134 nvidia,function = "spi4";
137 nvidia,pins = "spdi", "spdo";
138 nvidia,function = "rsvd2";
141 nvidia,pins = "spif", "uac";
142 nvidia,function = "rsvd4";
145 nvidia,pins = "spig", "spih";
146 nvidia,function = "spi2_alt";
149 nvidia,pins = "uaa", "uab", "uda";
150 nvidia,function = "ulpi";
154 nvidia,function = "spdif";
157 nvidia,pins = "uca", "ucb";
158 nvidia,function = "uartc";
161 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
162 "cdev1", "cdev2", "dap1", "dap2", "dtf",
163 "gma", "gmb", "gmc", "gmd", "gme",
164 "gpu", "gpu7", "gpv", "i2cp", "pta",
165 "rm", "sdio1", "slxk", "spdo", "uac",
168 nvidia,tristate = <0>;
171 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
172 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
176 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
177 "dtc", "dte", "slxa", "slxc", "slxd",
180 nvidia,tristate = <1>;
183 nvidia,pins = "csus", "spia", "spib", "spid",
186 nvidia,tristate = <1>;
189 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
190 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
191 "spic", "spig", "uaa", "uab";
193 nvidia,tristate = <0>;
196 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
197 "spie", "spih", "uad", "uca", "ucb";
199 nvidia,tristate = <1>;
202 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
203 "ld3", "ld4", "ld5", "ld6", "ld7",
204 "ld8", "ld9", "ld10", "ld11", "ld12",
205 "ld13", "ld14", "ld15", "ld16", "ld17",
206 "ldc", "ldi", "lhs", "lsc0", "lspi",
208 nvidia,tristate = <0>;
211 nvidia,pins = "lc", "ls";
215 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
216 "lm0", "lm1", "lpp", "lpw0", "lpw1",
217 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
218 "lvp0", "lvp1", "sdb";
219 nvidia,tristate = <1>;
222 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
235 clock-frequency = <216000000>;
240 clock-frequency = <216000000>;
245 clock-frequency = <400000>;
247 alc5632: alc5632@1e {
248 compatible = "realtek,alc5632";
257 clock-frequency = <400000>;
261 compatible = "nvidia,nvec";
262 reg = <0x7000c500 0x100>;
263 interrupts = <0 92 0x04>;
264 #address-cells = <1>;
266 clock-frequency = <80000>;
267 request-gpios = <&gpio 170 0>; /* gpio PV2 */
273 clock-frequency = <400000>;
276 compatible = "ti,tps6586x";
278 interrupts = <0 86 0x4>;
283 sys-supply = <&p5valw_reg>;
284 vin-sm0-supply = <&sys_reg>;
285 vin-sm1-supply = <&sys_reg>;
286 vin-sm2-supply = <&sys_reg>;
287 vinldo01-supply = <&sm2_reg>;
288 vinldo23-supply = <&sm2_reg>;
289 vinldo4-supply = <&sm2_reg>;
290 vinldo678-supply = <&sm2_reg>;
291 vinldo9-supply = <&sm2_reg>;
295 regulator-name = "vdd_sys";
300 regulator-name = "+1.2vs_sm0,vdd_core";
301 regulator-min-microvolt = <1200000>;
302 regulator-max-microvolt = <1200000>;
307 regulator-name = "+1.0vs_sm1,vdd_cpu";
308 regulator-min-microvolt = <1000000>;
309 regulator-max-microvolt = <1000000>;
314 regulator-name = "+3.7vs_sm2,vin_ldo*";
315 regulator-min-microvolt = <3700000>;
316 regulator-max-microvolt = <3700000>;
320 /* LDO0 is not connected to anything */
323 regulator-name = "+1.1vs_ldo1,avdd_pll*";
324 regulator-min-microvolt = <1100000>;
325 regulator-max-microvolt = <1100000>;
330 regulator-name = "+1.2vs_ldo2,vdd_rtc";
331 regulator-min-microvolt = <1200000>;
332 regulator-max-microvolt = <1200000>;
336 regulator-name = "+3.3vs_ldo3,avdd_usb*";
337 regulator-min-microvolt = <3300000>;
338 regulator-max-microvolt = <3300000>;
343 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>;
350 regulator-name = "+2.85vs_ldo5,vcore_mmc";
351 regulator-min-microvolt = <2850000>;
352 regulator-max-microvolt = <2850000>;
358 * Research indicates this should be
359 * 1.8v; other boards that use this
360 * rail for the same purpose need it
361 * set to 1.8v. The schematic signal
362 * name is incorrect; perhaps copied
363 * from an incorrect NVIDIA reference.
365 regulator-name = "+2.85vs_ldo6,avdd_vdac";
366 regulator-min-microvolt = <1800000>;
367 regulator-max-microvolt = <1800000>;
371 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
372 regulator-min-microvolt = <3300000>;
373 regulator-max-microvolt = <3300000>;
377 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>;
383 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
384 regulator-min-microvolt = <2850000>;
385 regulator-max-microvolt = <2850000>;
390 regulator-name = "+3.3vs_rtc";
391 regulator-min-microvolt = <3300000>;
392 regulator-max-microvolt = <3300000>;
399 compatible = "adi,adt7461";
405 nvidia,invert-interrupt;
414 nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
423 cd-gpios = <&gpio 173 0>; /* gpio PV5 */
424 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
425 power-gpios = <&gpio 169 0>; /* gpio PV1 */
435 compatible = "gpio-keys";
439 gpios = <&gpio 79 1>; /* gpio PJ7, active low */
440 linux,code = <116>; /* KEY_POWER */
446 compatible = "gpio-leds";
450 gpios = <&gpio 24 0>; /* gpio PD0 */
451 linux,default-trigger = "rfkill0";
456 compatible = "simple-bus";
457 #address-cells = <1>;
460 p5valw_reg: regulator@0 {
461 compatible = "regulator-fixed";
463 regulator-name = "+5valw";
464 regulator-min-microvolt = <5000000>;
465 regulator-max-microvolt = <5000000>;
471 compatible = "nvidia,tegra-audio-alc5632-paz00",
472 "nvidia,tegra-audio-alc5632";
474 nvidia,model = "Compal PAZ00";
476 nvidia,audio-routing =
478 "Int Spk", "SPKOUTN",
479 "Headset Mic", "MICBIAS1",
480 "MIC1", "Headset Mic",
481 "Headset Stereophone", "HPR",
482 "Headset Stereophone", "HPL",
483 "DMICDAT", "Digital Mic";
485 nvidia,audio-codec = <&alc5632>;
486 nvidia,i2s-controller = <&tegra_i2s1>;
487 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */