Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/sh73a0.dtsi

   1 /*
   2  * Device Tree Source for the SH73A0 SoC
   3  *
   4  * Copyright (C) 2012 Renesas Solutions Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /include/ "skeleton.dtsi"
  12
  13 / {
  14         compatible = "renesas,sh73a0";
  15
  16         cpus {
  17                 #address-cells = <1>;
  18                 #size-cells = <0>;
  19
  20                 cpu@0 {
  21                         device_type = "cpu";
  22                         compatible = "arm,cortex-a9";
  23                         reg = <0>;
  24                 };
  25                 cpu@1 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a9";
  28                         reg = <1>;
  29                 };
  30         };
  31
  32         gic: interrupt-controller@f0001000 {
  33                 compatible = "arm,cortex-a9-gic";
  34                 #interrupt-cells = <3>;
  35                 #address-cells = <1>;
  36                 interrupt-controller;
  37                 reg = <0xf0001000 0x1000>,
  38                       <0xf0000100 0x100>;
  39         };
  40
  41         irqpin0: irqpin@e6900000 {
  42                 compatible = "renesas,intc-irqpin";
  43                 #interrupt-cells = <2>;
  44                 interrupt-controller;
  45                 reg = <0xe6900000 4>,
  46                         <0xe6900010 4>,
  47                         <0xe6900020 1>,
  48                         <0xe6900040 1>,
  49                         <0xe6900060 1>;
  50                 interrupt-parent = <&gic>;
  51                 interrupts = <0 1 0x4
  52                               0 2 0x4
  53                               0 3 0x4
  54                               0 4 0x4
  55                               0 5 0x4
  56                               0 6 0x4
  57                               0 7 0x4
  58                               0 8 0x4>;
  59         };
  60
  61         irqpin1: irqpin@e6900004 {
  62                 compatible = "renesas,intc-irqpin";
  63                 #interrupt-cells = <2>;
  64                 interrupt-controller;
  65                 reg = <0xe6900004 4>,
  66                         <0xe6900014 4>,
  67                         <0xe6900024 1>,
  68                         <0xe6900044 1>,
  69                         <0xe6900064 1>;
  70                 interrupt-parent = <&gic>;
  71                 interrupts = <0 9 0x4
  72                               0 10 0x4
  73                               0 11 0x4
  74                               0 12 0x4
  75                               0 13 0x4
  76                               0 14 0x4
  77                               0 15 0x4
  78                               0 16 0x4>;
  79                 control-parent;
  80         };
  81
  82         irqpin2: irqpin@e6900008 {
  83                 compatible = "renesas,intc-irqpin";
  84                 #interrupt-cells = <2>;
  85                 interrupt-controller;
  86                 reg = <0xe6900008 4>,
  87                         <0xe6900018 4>,
  88                         <0xe6900028 1>,
  89                         <0xe6900048 1>,
  90                         <0xe6900068 1>;
  91                 interrupt-parent = <&gic>;
  92                 interrupts = <0 17 0x4
  93                               0 18 0x4
  94                               0 19 0x4
  95                               0 20 0x4
  96                               0 21 0x4
  97                               0 22 0x4
  98                               0 23 0x4
  99                               0 24 0x4>;
 100         };
 101
 102         irqpin3: irqpin@e690000c {
 103                 compatible = "renesas,intc-irqpin";
 104                 #interrupt-cells = <2>;
 105                 interrupt-controller;
 106                 reg = <0xe690000c 4>,
 107                         <0xe690001c 4>,
 108                         <0xe690002c 1>,
 109                         <0xe690004c 1>,
 110                         <0xe690006c 1>;
 111                 interrupt-parent = <&gic>;
 112                 interrupts = <0 25 0x4
 113                               0 26 0x4
 114                               0 27 0x4
 115                               0 28 0x4
 116                               0 29 0x4
 117                               0 30 0x4
 118                               0 31 0x4
 119                               0 32 0x4>;
 120         };
 121
 122         i2c0: i2c@e6820000 {
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125                 compatible = "renesas,rmobile-iic";
 126                 reg = <0xe6820000 0x425>;
 127                 interrupt-parent = <&gic>;
 128                 interrupts = <0 167 0x4
 129                               0 168 0x4
 130                               0 169 0x4
 131                               0 170 0x4>;
 132         };
 133
 134         i2c1: i2c@e6822000 {
 135                 #address-cells = <1>;
 136                 #size-cells = <0>;
 137                 compatible = "renesas,rmobile-iic";
 138                 reg = <0xe6822000 0x425>;
 139                 interrupt-parent = <&gic>;
 140                 interrupts = <0 51 0x4
 141                               0 52 0x4
 142                               0 53 0x4
 143                               0 54 0x4>;
 144         };
 145
 146         i2c2: i2c@e6824000 {
 147                 #address-cells = <1>;
 148                 #size-cells = <0>;
 149                 compatible = "renesas,rmobile-iic";
 150                 reg = <0xe6824000 0x425>;
 151                 interrupt-parent = <&gic>;
 152                 interrupts = <0 171 0x4
 153                               0 172 0x4
 154                               0 173 0x4
 155                               0 174 0x4>;
 156         };
 157
 158         i2c3: i2c@e6826000 {
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161                 compatible = "renesas,rmobile-iic";
 162                 reg = <0xe6826000 0x425>;
 163                 interrupt-parent = <&gic>;
 164                 interrupts = <0 183 0x4
 165                               0 184 0x4
 166                               0 185 0x4
 167                               0 186 0x4>;
 168         };
 169
 170         i2c4: i2c@e6828000 {
 171                 #address-cells = <1>;
 172                 #size-cells = <0>;
 173                 compatible = "renesas,rmobile-iic";
 174                 reg = <0xe6828000 0x425>;
 175                 interrupt-parent = <&gic>;
 176                 interrupts = <0 187 0x4
 177                               0 188 0x4
 178                               0 189 0x4
 179                               0 190 0x4>;
 180         };
 181
 182         mmcif: mmcif@e6bd0000 {
 183                 compatible = "renesas,sh-mmcif";
 184                 reg = <0xe6bd0000 0x100>;
 185                 interrupt-parent = <&gic>;
 186                 interrupts = <0 140 0x4
 187                               0 141 0x4>;
 188                 reg-io-width = <4>;
 189                 status = "disabled";
 190         };
 191
 192         sdhi0: sdhi@ee100000 {
 193                 compatible = "renesas,r8a7740-sdhi";
 194                 reg = <0xee100000 0x100>;
 195                 interrupt-parent = <&gic>;
 196                 interrupts = <0 83 4
 197                                 0 84 4
 198                                 0 85 4>;
 199                 cap-sd-highspeed;
 200                 status = "disabled";
 201         };
 202
 203         /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
 204         sdhi1: sdhi@ee120000 {
 205                 compatible = "renesas,r8a7740-sdhi";
 206                 reg = <0xee120000 0x100>;
 207                 interrupt-parent = <&gic>;
 208                 interrupts = <0 88 4
 209                                 0 89 4>;
 210                 toshiba,mmc-wrprotect-disable;
 211                 cap-sd-highspeed;
 212                 status = "disabled";
 213         };
 214
 215         sdhi2: sdhi@ee140000 {
 216                 compatible = "renesas,r8a7740-sdhi";
 217                 reg = <0xee140000 0x100>;
 218                 interrupt-parent = <&gic>;
 219                 interrupts = <0 104 4
 220                                 0 105 4>;
 221                 toshiba,mmc-wrprotect-disable;
 222                 cap-sd-highspeed;
 223                 status = "disabled";
 224         };
 225 };