Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/sama5d3.dtsi

   1 /*
   2  * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
   3  *                applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
   4  *
   5  *  Copyright (C) 2013 Atmel,
   6  *                2013 Ludovic Desroches <ludovic.desroches@atmel.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/dma/at91.h>
  13 #include <dt-bindings/pinctrl/at91.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/clk/at91.h>
  17
  18 / {
  19         model = "Atmel SAMA5D3 family SoC";
  20         compatible = "atmel,sama5d3", "atmel,sama5";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 gpio4 = &pioE;
  34                 tcb0 = &tcb0;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 ssc1 = &ssc1;
  40                 pwm0 = &pwm0;
  41         };
  42         cpus {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45                 cpu@0 {
  46                         device_type = "cpu";
  47                         compatible = "arm,cortex-a5";
  48                         reg = <0x0>;
  49                 };
  50         };
  51
  52         pmu {
  53                 compatible = "arm,cortex-a5-pmu";
  54                 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
  55         };
  56
  57         memory {
  58                 reg = <0x20000000 0x8000000>;
  59         };
  60
  61         clocks {
  62                 adc_op_clk: adc_op_clk{
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <20000000>;
  66                 };
  67         };
  68
  69         ahb {
  70                 compatible = "simple-bus";
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73                 ranges;
  74
  75                 apb {
  76                         compatible = "simple-bus";
  77                         #address-cells = <1>;
  78                         #size-cells = <1>;
  79                         ranges;
  80
  81                         mmc0: mmc@f0000000 {
  82                                 compatible = "atmel,hsmci";
  83                                 reg = <0xf0000000 0x600>;
  84                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
  85                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(0)>;
  86                                 dma-names = "rxtx";
  87                                 pinctrl-names = "default";
  88                                 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>;
  89                                 status = "disabled";
  90                                 #address-cells = <1>;
  91                                 #size-cells = <0>;
  92                                 clocks = <&mci0_clk>;
  93                                 clock-names = "mci_clk";
  94                         };
  95
  96                         spi0: spi@f0004000 {
  97                                 #address-cells = <1>;
  98                                 #size-cells = <0>;
  99                                 compatible = "atmel,at91rm9200-spi";
 100                                 reg = <0xf0004000 0x100>;
 101                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 102                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(1)>,
 103                                        <&dma0 2 AT91_DMA_CFG_PER_ID(2)>;
 104                                 dma-names = "tx", "rx";
 105                                 pinctrl-names = "default";
 106                                 pinctrl-0 = <&pinctrl_spi0>;
 107                                 clocks = <&spi0_clk>;
 108                                 clock-names = "spi_clk";
 109                                 status = "disabled";
 110                         };
 111
 112                         ssc0: ssc@f0008000 {
 113                                 compatible = "atmel,at91sam9g45-ssc";
 114                                 reg = <0xf0008000 0x4000>;
 115                                 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
 116                                 pinctrl-names = "default";
 117                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 118                                 clocks = <&ssc0_clk>;
 119                                 clock-names = "pclk";
 120                                 status = "disabled";
 121                         };
 122
 123                         tcb0: timer@f0010000 {
 124                                 compatible = "atmel,at91sam9x5-tcb";
 125                                 reg = <0xf0010000 0x100>;
 126                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 127                                 clocks = <&tcb0_clk>;
 128                                 clock-names = "t0_clk";
 129                         };
 130
 131                         i2c0: i2c@f0014000 {
 132                                 compatible = "atmel,at91sam9x5-i2c";
 133                                 reg = <0xf0014000 0x4000>;
 134                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
 135                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>,
 136                                        <&dma0 2 AT91_DMA_CFG_PER_ID(8)>;
 137                                 dma-names = "tx", "rx";
 138                                 pinctrl-names = "default";
 139                                 pinctrl-0 = <&pinctrl_i2c0>;
 140                                 #address-cells = <1>;
 141                                 #size-cells = <0>;
 142                                 clocks = <&twi0_clk>;
 143                                 status = "disabled";
 144                         };
 145
 146                         i2c1: i2c@f0018000 {
 147                                 compatible = "atmel,at91sam9x5-i2c";
 148                                 reg = <0xf0018000 0x4000>;
 149                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
 150                                 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>,
 151                                        <&dma0 2 AT91_DMA_CFG_PER_ID(10)>;
 152                                 dma-names = "tx", "rx";
 153                                 pinctrl-names = "default";
 154                                 pinctrl-0 = <&pinctrl_i2c1>;
 155                                 #address-cells = <1>;
 156                                 #size-cells = <0>;
 157                                 clocks = <&twi1_clk>;
 158                                 status = "disabled";
 159                         };
 160
 161                         usart0: serial@f001c000 {
 162                                 compatible = "atmel,at91sam9260-usart";
 163                                 reg = <0xf001c000 0x100>;
 164                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
 165                                 pinctrl-names = "default";
 166                                 pinctrl-0 = <&pinctrl_usart0>;
 167                                 clocks = <&usart0_clk>;
 168                                 clock-names = "usart";
 169                                 status = "disabled";
 170                         };
 171
 172                         usart1: serial@f0020000 {
 173                                 compatible = "atmel,at91sam9260-usart";
 174                                 reg = <0xf0020000 0x100>;
 175                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
 176                                 pinctrl-names = "default";
 177                                 pinctrl-0 = <&pinctrl_usart1>;
 178                                 clocks = <&usart1_clk>;
 179                                 clock-names = "usart";
 180                                 status = "disabled";
 181                         };
 182
 183                         pwm0: pwm@f002c000 {
 184                                 compatible = "atmel,sama5d3-pwm";
 185                                 reg = <0xf002c000 0x300>;
 186                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
 187                                 #pwm-cells = <3>;
 188                                 clocks = <&pwm_clk>;
 189                                 status = "disabled";
 190                         };
 191
 192                         isi: isi@f0034000 {
 193                                 compatible = "atmel,at91sam9g45-isi";
 194                                 reg = <0xf0034000 0x4000>;
 195                                 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
 196                                 status = "disabled";
 197                         };
 198
 199                         mmc1: mmc@f8000000 {
 200                                 compatible = "atmel,hsmci";
 201                                 reg = <0xf8000000 0x600>;
 202                                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
 203                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(0)>;
 204                                 dma-names = "rxtx";
 205                                 pinctrl-names = "default";
 206                                 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
 207                                 status = "disabled";
 208                                 #address-cells = <1>;
 209                                 #size-cells = <0>;
 210                                 clocks = <&mci1_clk>;
 211                                 clock-names = "mci_clk";
 212                         };
 213
 214                         spi1: spi@f8008000 {
 215                                 #address-cells = <1>;
 216                                 #size-cells = <0>;
 217                                 compatible = "atmel,at91rm9200-spi";
 218                                 reg = <0xf8008000 0x100>;
 219                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
 220                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(15)>,
 221                                        <&dma1 2 AT91_DMA_CFG_PER_ID(16)>;
 222                                 dma-names = "tx", "rx";
 223                                 pinctrl-names = "default";
 224                                 pinctrl-0 = <&pinctrl_spi1>;
 225                                 clocks = <&spi1_clk>;
 226                                 clock-names = "spi_clk";
 227                                 status = "disabled";
 228                         };
 229
 230                         ssc1: ssc@f800c000 {
 231                                 compatible = "atmel,at91sam9g45-ssc";
 232                                 reg = <0xf800c000 0x4000>;
 233                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
 234                                 pinctrl-names = "default";
 235                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 236                                 clocks = <&ssc1_clk>;
 237                                 clock-names = "pclk";
 238                                 status = "disabled";
 239                         };
 240
 241                         adc0: adc@f8018000 {
 242                                 compatible = "atmel,at91sam9260-adc";
 243                                 reg = <0xf8018000 0x100>;
 244                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 245                                 pinctrl-names = "default";
 246                                 pinctrl-0 = <
 247                                         &pinctrl_adc0_adtrg
 248                                         &pinctrl_adc0_ad0
 249                                         &pinctrl_adc0_ad1
 250                                         &pinctrl_adc0_ad2
 251                                         &pinctrl_adc0_ad3
 252                                         &pinctrl_adc0_ad4
 253                                         &pinctrl_adc0_ad5
 254                                         &pinctrl_adc0_ad6
 255                                         &pinctrl_adc0_ad7
 256                                         &pinctrl_adc0_ad8
 257                                         &pinctrl_adc0_ad9
 258                                         &pinctrl_adc0_ad10
 259                                         &pinctrl_adc0_ad11
 260                                         >;
 261                                 clocks = <&adc_clk>,
 262                                          <&adc_op_clk>;
 263                                 clock-names = "adc_clk", "adc_op_clk";
 264                                 atmel,adc-channel-base = <0x50>;
 265                                 atmel,adc-channels-used = <0xfff>;
 266                                 atmel,adc-drdy-mask = <0x1000000>;
 267                                 atmel,adc-num-channels = <12>;
 268                                 atmel,adc-startup-time = <40>;
 269                                 atmel,adc-status-register = <0x30>;
 270                                 atmel,adc-trigger-register = <0xc0>;
 271                                 atmel,adc-use-external;
 272                                 atmel,adc-vref = <3000>;
 273                                 atmel,adc-res = <10 12>;
 274                                 atmel,adc-res-names = "lowres", "highres";
 275                                 status = "disabled";
 276
 277                                 trigger@0 {
 278                                         trigger-name = "external-rising";
 279                                         trigger-value = <0x1>;
 280                                         trigger-external;
 281                                 };
 282                                 trigger@1 {
 283                                         trigger-name = "external-falling";
 284                                         trigger-value = <0x2>;
 285                                         trigger-external;
 286                                 };
 287                                 trigger@2 {
 288                                         trigger-name = "external-any";
 289                                         trigger-value = <0x3>;
 290                                         trigger-external;
 291                                 };
 292                                 trigger@3 {
 293                                         trigger-name = "continuous";
 294                                         trigger-value = <0x6>;
 295                                 };
 296                         };
 297
 298                         tsadcc: tsadcc@f8018000 {
 299                                 compatible = "atmel,at91sam9x5-tsadcc";
 300                                 reg = <0xf8018000 0x4000>;
 301                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
 302                                 atmel,tsadcc_clock = <300000>;
 303                                 atmel,filtering_average = <0x03>;
 304                                 atmel,pendet_debounce = <0x08>;
 305                                 atmel,pendet_sensitivity = <0x02>;
 306                                 atmel,ts_sample_hold_time = <0x0a>;
 307                                 status = "disabled";
 308                         };
 309
 310                         i2c2: i2c@f801c000 {
 311                                 compatible = "atmel,at91sam9x5-i2c";
 312                                 reg = <0xf801c000 0x4000>;
 313                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
 314                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>,
 315                                        <&dma1 2 AT91_DMA_CFG_PER_ID(12)>;
 316                                 dma-names = "tx", "rx";
 317                                 pinctrl-names = "default";
 318                                 pinctrl-0 = <&pinctrl_i2c2>;
 319                                 #address-cells = <1>;
 320                                 #size-cells = <0>;
 321                                 clocks = <&twi2_clk>;
 322                                 status = "disabled";
 323                         };
 324
 325                         usart2: serial@f8020000 {
 326                                 compatible = "atmel,at91sam9260-usart";
 327                                 reg = <0xf8020000 0x100>;
 328                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 329                                 pinctrl-names = "default";
 330                                 pinctrl-0 = <&pinctrl_usart2>;
 331                                 clocks = <&usart2_clk>;
 332                                 clock-names = "usart";
 333                                 status = "disabled";
 334                         };
 335
 336                         usart3: serial@f8024000 {
 337                                 compatible = "atmel,at91sam9260-usart";
 338                                 reg = <0xf8024000 0x100>;
 339                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 340                                 pinctrl-names = "default";
 341                                 pinctrl-0 = <&pinctrl_usart3>;
 342                                 clocks = <&usart3_clk>;
 343                                 clock-names = "usart";
 344                                 status = "disabled";
 345                         };
 346
 347                         sha@f8034000 {
 348                                 compatible = "atmel,at91sam9g46-sha";
 349                                 reg = <0xf8034000 0x100>;
 350                                 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
 351                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(17)>;
 352                                 dma-names = "tx";
 353                                 clocks = <&sha_clk>;
 354                                 clock-names = "sha_clk";
 355                         };
 356
 357                         aes@f8038000 {
 358                                 compatible = "atmel,at91sam9g46-aes";
 359                                 reg = <0xf8038000 0x100>;
 360                                 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 0>;
 361                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(18)>,
 362                                        <&dma1 2 AT91_DMA_CFG_PER_ID(19)>;
 363                                 dma-names = "tx", "rx";
 364                                 clocks = <&aes_clk>;
 365                                 clock-names = "aes_clk";
 366                         };
 367
 368                         tdes@f803c000 {
 369                                 compatible = "atmel,at91sam9g46-tdes";
 370                                 reg = <0xf803c000 0x100>;
 371                                 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
 372                                 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(20)>,
 373                                        <&dma1 2 AT91_DMA_CFG_PER_ID(21)>;
 374                                 dma-names = "tx", "rx";
 375                                 clocks = <&tdes_clk>;
 376                                 clock-names = "tdes_clk";
 377                         };
 378
 379                         dma0: dma-controller@ffffe600 {
 380                                 compatible = "atmel,at91sam9g45-dma";
 381                                 reg = <0xffffe600 0x200>;
 382                                 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
 383                                 #dma-cells = <2>;
 384                                 clocks = <&dma0_clk>;
 385                                 clock-names = "dma_clk";
 386                         };
 387
 388                         dma1: dma-controller@ffffe800 {
 389                                 compatible = "atmel,at91sam9g45-dma";
 390                                 reg = <0xffffe800 0x200>;
 391                                 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
 392                                 #dma-cells = <2>;
 393                                 clocks = <&dma1_clk>;
 394                                 clock-names = "dma_clk";
 395                         };
 396
 397                         ramc0: ramc@ffffea00 {
 398                                 compatible = "atmel,at91sam9g45-ddramc";
 399                                 reg = <0xffffea00 0x200>;
 400                         };
 401
 402                         dbgu: serial@ffffee00 {
 403                                 compatible = "atmel,at91sam9260-usart";
 404                                 reg = <0xffffee00 0x200>;
 405                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
 406                                 pinctrl-names = "default";
 407                                 pinctrl-0 = <&pinctrl_dbgu>;
 408                                 clocks = <&dbgu_clk>;
 409                                 clock-names = "usart";
 410                                 status = "disabled";
 411                         };
 412
 413                         aic: interrupt-controller@fffff000 {
 414                                 #interrupt-cells = <3>;
 415                                 compatible = "atmel,sama5d3-aic";
 416                                 interrupt-controller;
 417                                 reg = <0xfffff000 0x200>;
 418                                 atmel,external-irqs = <47>;
 419                         };
 420
 421                         pinctrl@fffff200 {
 422                                 #address-cells = <1>;
 423                                 #size-cells = <1>;
 424                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 425                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 426                                 atmel,mux-mask = <
 427                                         /*   A          B          C  */
 428                                         0xffffffff 0xc0fc0000 0xc0ff0000        /* pioA */
 429                                         0xffffffff 0x0ff8ffff 0x00000000        /* pioB */
 430                                         0xffffffff 0xbc00f1ff 0x7c00fc00        /* pioC */
 431                                         0xffffffff 0xc001c0e0 0x0001c1e0        /* pioD */
 432                                         0xffffffff 0xbf9f8000 0x18000000        /* pioE */
 433                                         >;
 434
 435                                 /* shared pinctrl settings */
 436                                 adc0 {
 437                                         pinctrl_adc0_adtrg: adc0_adtrg {
 438                                                 atmel,pins =
 439                                                         <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
 440                                         };
 441                                         pinctrl_adc0_ad0: adc0_ad0 {
 442                                                 atmel,pins =
 443                                                         <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
 444                                         };
 445                                         pinctrl_adc0_ad1: adc0_ad1 {
 446                                                 atmel,pins =
 447                                                         <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
 448                                         };
 449                                         pinctrl_adc0_ad2: adc0_ad2 {
 450                                                 atmel,pins =
 451                                                         <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
 452                                         };
 453                                         pinctrl_adc0_ad3: adc0_ad3 {
 454                                                 atmel,pins =
 455                                                         <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
 456                                         };
 457                                         pinctrl_adc0_ad4: adc0_ad4 {
 458                                                 atmel,pins =
 459                                                         <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
 460                                         };
 461                                         pinctrl_adc0_ad5: adc0_ad5 {
 462                                                 atmel,pins =
 463                                                         <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
 464                                         };
 465                                         pinctrl_adc0_ad6: adc0_ad6 {
 466                                                 atmel,pins =
 467                                                         <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
 468                                         };
 469                                         pinctrl_adc0_ad7: adc0_ad7 {
 470                                                 atmel,pins =
 471                                                         <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
 472                                         };
 473                                         pinctrl_adc0_ad8: adc0_ad8 {
 474                                                 atmel,pins =
 475                                                         <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
 476                                         };
 477                                         pinctrl_adc0_ad9: adc0_ad9 {
 478                                                 atmel,pins =
 479                                                         <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
 480                                         };
 481                                         pinctrl_adc0_ad10: adc0_ad10 {
 482                                                 atmel,pins =
 483                                                         <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
 484                                         };
 485                                         pinctrl_adc0_ad11: adc0_ad11 {
 486                                                 atmel,pins =
 487                                                         <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
 488                                         };
 489                                 };
 490
 491                                 dbgu {
 492                                         pinctrl_dbgu: dbgu-0 {
 493                                                 atmel,pins =
 494                                                         <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB30 periph A */
 495                                                          AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB31 periph A with pullup */
 496                                         };
 497                                 };
 498
 499                                 i2c0 {
 500                                         pinctrl_i2c0: i2c0-0 {
 501                                                 atmel,pins =
 502                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
 503                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
 504                                         };
 505                                 };
 506
 507                                 i2c1 {
 508                                         pinctrl_i2c1: i2c1-0 {
 509                                                 atmel,pins =
 510                                                         <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
 511                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
 512                                         };
 513                                 };
 514
 515                                 i2c2 {
 516                                         pinctrl_i2c2: i2c2-0 {
 517                                                 atmel,pins =
 518                                                         <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */
 519                                                          AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */
 520                                         };
 521                                 };
 522
 523                                 isi {
 524                                         pinctrl_isi: isi-0 {
 525                                                 atmel,pins =
 526                                                         <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
 527                                                          AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
 528                                                          AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
 529                                                          AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
 530                                                          AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
 531                                                          AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
 532                                                          AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
 533                                                          AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
 534                                                          AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
 535                                                          AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
 536                                                          AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
 537                                                          AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
 538                                                          AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
 539                                         };
 540                                         pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
 541                                                 atmel,pins =
 542                                                         <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
 543                                         };
 544                                 };
 545
 546                                 mmc0 {
 547                                         pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
 548                                                 atmel,pins =
 549                                                         <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A MCI0_CK */
 550                                                          AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
 551                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD1 periph A MCI0_DA0 with pullup */
 552                                         };
 553                                         pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
 554                                                 atmel,pins =
 555                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
 556                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
 557                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD4 periph A MCI0_DA3 with pullup */
 558                                         };
 559                                         pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
 560                                                 atmel,pins =
 561                                                         <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
 562                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
 563                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
 564                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
 565                                         };
 566                                 };
 567
 568                                 mmc1 {
 569                                         pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
 570                                                 atmel,pins =
 571                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A MCI1_CK, conflicts with GRX5 */
 572                                                          AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
 573                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
 574                                         };
 575                                         pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
 576                                                 atmel,pins =
 577                                                         <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
 578                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
 579                                                          AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
 580                                         };
 581                                 };
 582
 583                                 nand0 {
 584                                         pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
 585                                                 atmel,pins =
 586                                                         <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PE21 periph A with pullup */
 587                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PE22 periph A with pullup */
 588                                         };
 589                                 };
 590
 591                                 spi0 {
 592                                         pinctrl_spi0: spi0-0 {
 593                                                 atmel,pins =
 594                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A SPI0_MISO pin */
 595                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A SPI0_MOSI pin */
 596                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
 597                                         };
 598                                 };
 599
 600                                 spi1 {
 601                                         pinctrl_spi1: spi1-0 {
 602                                                 atmel,pins =
 603                                                         <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A SPI1_MISO pin */
 604                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A SPI1_MOSI pin */
 605                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
 606                                         };
 607                                 };
 608
 609                                 ssc0 {
 610                                         pinctrl_ssc0_tx: ssc0_tx {
 611                                                 atmel,pins =
 612                                                         <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A TK0 */
 613                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC17 periph A TF0 */
 614                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
 615                                         };
 616
 617                                         pinctrl_ssc0_rx: ssc0_rx {
 618                                                 atmel,pins =
 619                                                         <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A RK0 */
 620                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC20 periph A RF0 */
 621                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
 622                                         };
 623                                 };
 624
 625                                 ssc1 {
 626                                         pinctrl_ssc1_tx: ssc1_tx {
 627                                                 atmel,pins =
 628                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB2 periph B TK1, conflicts with GTX2 */
 629                                                          AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B TF1, conflicts with GTX3 */
 630                                                          AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB6 periph B TD1, conflicts with TD1 */
 631                                         };
 632
 633                                         pinctrl_ssc1_rx: ssc1_rx {
 634                                                 atmel,pins =
 635                                                         <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB7 periph B RK1, conflicts with EREFCK */
 636                                                          AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB10 periph B RF1, conflicts with GTXER */
 637                                                          AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
 638                                         };
 639                                 };
 640
 641                                 usart0 {
 642                                         pinctrl_usart0: usart0-0 {
 643                                                 atmel,pins =
 644                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A */
 645                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PD18 periph A with pullup */
 646                                         };
 647
 648                                         pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
 649                                                 atmel,pins =
 650                                                         <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
 651                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
 652                                         };
 653                                 };
 654
 655                                 usart1 {
 656                                         pinctrl_usart1: usart1-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB28 periph A */
 659                                                          AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB29 periph A with pullup */
 660                                         };
 661
 662                                         pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
 663                                                 atmel,pins =
 664                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB26 periph A, conflicts with GRX7 */
 665                                                          AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
 666                                         };
 667                                 };
 668
 669                                 usart2 {
 670                                         pinctrl_usart2: usart2-0 {
 671                                                 atmel,pins =
 672                                                         <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE25 periph B, conflicts with A25 */
 673                                                          AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE26 periph B with pullup, conflicts NCS0 */
 674                                         };
 675
 676                                         pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
 677                                                 atmel,pins =
 678                                                         <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE23 periph B, conflicts with A23 */
 679                                                          AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
 680                                         };
 681                                 };
 682
 683                                 usart3 {
 684                                         pinctrl_usart3: usart3-0 {
 685                                                 atmel,pins =
 686                                                         <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE18 periph B, conflicts with A18 */
 687                                                          AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PE19 periph B with pullup, conflicts with A19 */
 688                                         };
 689
 690                                         pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
 691                                                 atmel,pins =
 692                                                         <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PE16 periph B, conflicts with A16 */
 693                                                          AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
 694                                         };
 695                                 };
 696
 697
 698                                 pioA: gpio@fffff200 {
 699                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 700                                         reg = <0xfffff200 0x100>;
 701                                         interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
 702                                         #gpio-cells = <2>;
 703                                         gpio-controller;
 704                                         interrupt-controller;
 705                                         #interrupt-cells = <2>;
 706                                         clocks = <&pioA_clk>;
 707                                 };
 708
 709                                 pioB: gpio@fffff400 {
 710                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 711                                         reg = <0xfffff400 0x100>;
 712                                         interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
 713                                         #gpio-cells = <2>;
 714                                         gpio-controller;
 715                                         interrupt-controller;
 716                                         #interrupt-cells = <2>;
 717                                         clocks = <&pioB_clk>;
 718                                 };
 719
 720                                 pioC: gpio@fffff600 {
 721                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 722                                         reg = <0xfffff600 0x100>;
 723                                         interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
 724                                         #gpio-cells = <2>;
 725                                         gpio-controller;
 726                                         interrupt-controller;
 727                                         #interrupt-cells = <2>;
 728                                         clocks = <&pioC_clk>;
 729                                 };
 730
 731                                 pioD: gpio@fffff800 {
 732                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 733                                         reg = <0xfffff800 0x100>;
 734                                         interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
 735                                         #gpio-cells = <2>;
 736                                         gpio-controller;
 737                                         interrupt-controller;
 738                                         #interrupt-cells = <2>;
 739                                         clocks = <&pioD_clk>;
 740                                 };
 741
 742                                 pioE: gpio@fffffa00 {
 743                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 744                                         reg = <0xfffffa00 0x100>;
 745                                         interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
 746                                         #gpio-cells = <2>;
 747                                         gpio-controller;
 748                                         interrupt-controller;
 749                                         #interrupt-cells = <2>;
 750                                         clocks = <&pioE_clk>;
 751                                 };
 752                         };
 753
 754                         pmc: pmc@fffffc00 {
 755                                 compatible = "atmel,sama5d3-pmc";
 756                                 reg = <0xfffffc00 0x120>;
 757                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 758                                 interrupt-controller;
 759                                 #address-cells = <1>;
 760                                 #size-cells = <0>;
 761                                 #interrupt-cells = <1>;
 762
 763                                 clk32k: slck {
 764                                         compatible = "fixed-clock";
 765                                         #clock-cells = <0>;
 766                                         clock-frequency = <32768>;
 767                                 };
 768
 769                                 main: mainck {
 770                                         compatible = "atmel,at91rm9200-clk-main";
 771                                         #clock-cells = <0>;
 772                                         interrupt-parent = <&pmc>;
 773                                         interrupts = <AT91_PMC_MOSCS>;
 774                                         clocks = <&clk32k>;
 775                                 };
 776
 777                                 plla: pllack {
 778                                         compatible = "atmel,sama5d3-clk-pll";
 779                                         #clock-cells = <0>;
 780                                         interrupt-parent = <&pmc>;
 781                                         interrupts = <AT91_PMC_LOCKA>;
 782                                         clocks = <&main>;
 783                                         reg = <0>;
 784                                         atmel,clk-input-range = <8000000 50000000>;
 785                                         #atmel,pll-clk-output-range-cells = <4>;
 786                                         atmel,pll-clk-output-ranges = <400000000 1000000000 0 0>;
 787                                 };
 788
 789                                 plladiv: plladivck {
 790                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 791                                         #clock-cells = <0>;
 792                                         clocks = <&plla>;
 793                                 };
 794
 795                                 utmi: utmick {
 796                                         compatible = "atmel,at91sam9x5-clk-utmi";
 797                                         #clock-cells = <0>;
 798                                         interrupt-parent = <&pmc>;
 799                                         interrupts = <AT91_PMC_LOCKU>;
 800                                         clocks = <&main>;
 801                                 };
 802
 803                                 mck: masterck {
 804                                         compatible = "atmel,at91sam9x5-clk-master";
 805                                         #clock-cells = <0>;
 806                                         interrupt-parent = <&pmc>;
 807                                         interrupts = <AT91_PMC_MCKRDY>;
 808                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 809                                         atmel,clk-output-range = <0 166000000>;
 810                                         atmel,clk-divisors = <1 2 4 3>;
 811                                 };
 812
 813                                 usb: usbck {
 814                                         compatible = "atmel,at91sam9x5-clk-usb";
 815                                         #clock-cells = <0>;
 816                                         clocks = <&plladiv>, <&utmi>;
 817                                 };
 818
 819                                 prog: progck {
 820                                         compatible = "atmel,at91sam9x5-clk-programmable";
 821                                         #address-cells = <1>;
 822                                         #size-cells = <0>;
 823                                         interrupt-parent = <&pmc>;
 824                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 825
 826                                         prog0: prog0 {
 827                                                 #clock-cells = <0>;
 828                                                 reg = <0>;
 829                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 830                                         };
 831
 832                                         prog1: prog1 {
 833                                                 #clock-cells = <0>;
 834                                                 reg = <1>;
 835                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 836                                         };
 837
 838                                         prog2: prog2 {
 839                                                 #clock-cells = <0>;
 840                                                 reg = <2>;
 841                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
 842                                         };
 843                                 };
 844
 845                                 smd: smdclk {
 846                                         compatible = "atmel,at91sam9x5-clk-smd";
 847                                         #clock-cells = <0>;
 848                                         clocks = <&plladiv>, <&utmi>;
 849                                 };
 850
 851                                 systemck {
 852                                         compatible = "atmel,at91rm9200-clk-system";
 853                                         #address-cells = <1>;
 854                                         #size-cells = <0>;
 855
 856                                         ddrck: ddrck {
 857                                                 #clock-cells = <0>;
 858                                                 reg = <2>;
 859                                                 clocks = <&mck>;
 860                                         };
 861
 862                                         smdck: smdck {
 863                                                 #clock-cells = <0>;
 864                                                 reg = <4>;
 865                                                 clocks = <&smd>;
 866                                         };
 867
 868                                         uhpck: uhpck {
 869                                                 #clock-cells = <0>;
 870                                                 reg = <6>;
 871                                                 clocks = <&usb>;
 872                                         };
 873
 874                                         udpck: udpck {
 875                                                 #clock-cells = <0>;
 876                                                 reg = <7>;
 877                                                 clocks = <&usb>;
 878                                         };
 879
 880                                         pck0: pck0 {
 881                                                 #clock-cells = <0>;
 882                                                 reg = <8>;
 883                                                 clocks = <&prog0>;
 884                                         };
 885
 886                                         pck1: pck1 {
 887                                                 #clock-cells = <0>;
 888                                                 reg = <9>;
 889                                                 clocks = <&prog1>;
 890                                         };
 891
 892                                         pck2: pck2 {
 893                                                 #clock-cells = <0>;
 894                                                 reg = <10>;
 895                                                 clocks = <&prog2>;
 896                                         };
 897                                 };
 898
 899                                 periphck {
 900                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 901                                         #address-cells = <1>;
 902                                         #size-cells = <0>;
 903                                         clocks = <&mck>;
 904
 905                                         dbgu_clk: dbgu_clk {
 906                                                 #clock-cells = <0>;
 907                                                 reg = <2>;
 908                                         };
 909
 910                                         pioA_clk: pioA_clk {
 911                                                 #clock-cells = <0>;
 912                                                 reg = <6>;
 913                                         };
 914
 915                                         pioB_clk: pioB_clk {
 916                                                 #clock-cells = <0>;
 917                                                 reg = <7>;
 918                                         };
 919
 920                                         pioC_clk: pioC_clk {
 921                                                 #clock-cells = <0>;
 922                                                 reg = <8>;
 923                                         };
 924
 925                                         pioD_clk: pioD_clk {
 926                                                 #clock-cells = <0>;
 927                                                 reg = <9>;
 928                                         };
 929
 930                                         pioE_clk: pioE_clk {
 931                                                 #clock-cells = <0>;
 932                                                 reg = <10>;
 933                                         };
 934
 935                                         usart0_clk: usart0_clk {
 936                                                 #clock-cells = <0>;
 937                                                 reg = <12>;
 938                                                 atmel,clk-output-range = <0 66000000>;
 939                                         };
 940
 941                                         usart1_clk: usart1_clk {
 942                                                 #clock-cells = <0>;
 943                                                 reg = <13>;
 944                                                 atmel,clk-output-range = <0 66000000>;
 945                                         };
 946
 947                                         usart2_clk: usart2_clk {
 948                                                 #clock-cells = <0>;
 949                                                 reg = <14>;
 950                                                 atmel,clk-output-range = <0 66000000>;
 951                                         };
 952
 953                                         usart3_clk: usart3_clk {
 954                                                 #clock-cells = <0>;
 955                                                 reg = <15>;
 956                                                 atmel,clk-output-range = <0 66000000>;
 957                                         };
 958
 959                                         twi0_clk: twi0_clk {
 960                                                 reg = <18>;
 961                                                 #clock-cells = <0>;
 962                                                 atmel,clk-output-range = <0 16625000>;
 963                                         };
 964
 965                                         twi1_clk: twi1_clk {
 966                                                 #clock-cells = <0>;
 967                                                 reg = <19>;
 968                                                 atmel,clk-output-range = <0 16625000>;
 969                                         };
 970
 971                                         twi2_clk: twi2_clk {
 972                                                 #clock-cells = <0>;
 973                                                 reg = <20>;
 974                                                 atmel,clk-output-range = <0 16625000>;
 975                                         };
 976
 977                                         mci0_clk: mci0_clk {
 978                                                 #clock-cells = <0>;
 979                                                 reg = <21>;
 980                                         };
 981
 982                                         mci1_clk: mci1_clk {
 983                                                 #clock-cells = <0>;
 984                                                 reg = <22>;
 985                                         };
 986
 987                                         spi0_clk: spi0_clk {
 988                                                 #clock-cells = <0>;
 989                                                 reg = <24>;
 990                                                 atmel,clk-output-range = <0 133000000>;
 991                                         };
 992
 993                                         spi1_clk: spi1_clk {
 994                                                 #clock-cells = <0>;
 995                                                 reg = <25>;
 996                                                 atmel,clk-output-range = <0 133000000>;
 997                                         };
 998
 999                                         tcb0_clk: tcb0_clk {
1000                                                 #clock-cells = <0>;
1001                                                 reg = <26>;
1002                                                 atmel,clk-output-range = <0 133000000>;
1003                                         };
1004
1005                                         pwm_clk: pwm_clk {
1006                                                 #clock-cells = <0>;
1007                                                 reg = <28>;
1008                                         };
1009
1010                                         adc_clk: adc_clk {
1011                                                 #clock-cells = <0>;
1012                                                 reg = <29>;
1013                                                 atmel,clk-output-range = <0 66000000>;
1014                                         };
1015
1016                                         dma0_clk: dma0_clk {
1017                                                 #clock-cells = <0>;
1018                                                 reg = <30>;
1019                                         };
1020
1021                                         dma1_clk: dma1_clk {
1022                                                 #clock-cells = <0>;
1023                                                 reg = <31>;
1024                                         };
1025
1026                                         uhphs_clk: uhphs_clk {
1027                                                 #clock-cells = <0>;
1028                                                 reg = <32>;
1029                                         };
1030
1031                                         udphs_clk: udphs_clk {
1032                                                 #clock-cells = <0>;
1033                                                 reg = <33>;
1034                                         };
1035
1036                                         isi_clk: isi_clk {
1037                                                 #clock-cells = <0>;
1038                                                 reg = <37>;
1039                                         };
1040
1041                                         ssc0_clk: ssc0_clk {
1042                                                 #clock-cells = <0>;
1043                                                 reg = <38>;
1044                                                 atmel,clk-output-range = <0 66000000>;
1045                                         };
1046
1047                                         ssc1_clk: ssc1_clk {
1048                                                 #clock-cells = <0>;
1049                                                 reg = <39>;
1050                                                 atmel,clk-output-range = <0 66000000>;
1051                                         };
1052
1053                                         sha_clk: sha_clk {
1054                                                 #clock-cells = <0>;
1055                                                 reg = <42>;
1056                                         };
1057
1058                                         aes_clk: aes_clk {
1059                                                 #clock-cells = <0>;
1060                                                 reg = <43>;
1061                                         };
1062
1063                                         tdes_clk: tdes_clk {
1064                                                 #clock-cells = <0>;
1065                                                 reg = <44>;
1066                                         };
1067
1068                                         trng_clk: trng_clk {
1069                                                 #clock-cells = <0>;
1070                                                 reg = <45>;
1071                                         };
1072
1073                                         fuse_clk: fuse_clk {
1074                                                 #clock-cells = <0>;
1075                                                 reg = <48>;
1076                                         };
1077                                 };
1078                         };
1079
1080                         rstc@fffffe00 {
1081                                 compatible = "atmel,at91sam9g45-rstc";
1082                                 reg = <0xfffffe00 0x10>;
1083                         };
1084
1085                         pit: timer@fffffe30 {
1086                                 compatible = "atmel,at91sam9260-pit";
1087                                 reg = <0xfffffe30 0xf>;
1088                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1089                                 clocks = <&mck>;
1090                         };
1091
1092                         watchdog@fffffe40 {
1093                                 compatible = "atmel,at91sam9260-wdt";
1094                                 reg = <0xfffffe40 0x10>;
1095                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
1096                                 atmel,watchdog-type = "hardware";
1097                                 atmel,reset-type = "all";
1098                                 atmel,dbg-halt;
1099                                 atmel,idle-halt;
1100                                 status = "disabled";
1101                         };
1102
1103                         rtc@fffffeb0 {
1104                                 compatible = "atmel,at91rm9200-rtc";
1105                                 reg = <0xfffffeb0 0x30>;
1106                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1107                         };
1108                 };
1109
1110                 usb0: gadget@00500000 {
1111                         #address-cells = <1>;
1112                         #size-cells = <0>;
1113                         compatible = "atmel,at91sam9rl-udc";
1114                         reg = <0x00500000 0x100000
1115                                0xf8030000 0x4000>;
1116                         interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
1117                         clocks = <&udphs_clk>, <&utmi>;
1118                         clock-names = "pclk", "hclk";
1119                         status = "disabled";
1120
1121                         ep0 {
1122                                 reg = <0>;
1123                                 atmel,fifo-size = <64>;
1124                                 atmel,nb-banks = <1>;
1125                         };
1126
1127                         ep1 {
1128                                 reg = <1>;
1129                                 atmel,fifo-size = <1024>;
1130                                 atmel,nb-banks = <3>;
1131                                 atmel,can-dma;
1132                                 atmel,can-isoc;
1133                         };
1134
1135                         ep2 {
1136                                 reg = <2>;
1137                                 atmel,fifo-size = <1024>;
1138                                 atmel,nb-banks = <3>;
1139                                 atmel,can-dma;
1140                                 atmel,can-isoc;
1141                         };
1142
1143                         ep3 {
1144                                 reg = <3>;
1145                                 atmel,fifo-size = <1024>;
1146                                 atmel,nb-banks = <2>;
1147                                 atmel,can-dma;
1148                         };
1149
1150                         ep4 {
1151                                 reg = <4>;
1152                                 atmel,fifo-size = <1024>;
1153                                 atmel,nb-banks = <2>;
1154                                 atmel,can-dma;
1155                         };
1156
1157                         ep5 {
1158                                 reg = <5>;
1159                                 atmel,fifo-size = <1024>;
1160                                 atmel,nb-banks = <2>;
1161                                 atmel,can-dma;
1162                         };
1163
1164                         ep6 {
1165                                 reg = <6>;
1166                                 atmel,fifo-size = <1024>;
1167                                 atmel,nb-banks = <2>;
1168                                 atmel,can-dma;
1169                         };
1170
1171                         ep7 {
1172                                 reg = <7>;
1173                                 atmel,fifo-size = <1024>;
1174                                 atmel,nb-banks = <2>;
1175                                 atmel,can-dma;
1176                         };
1177
1178                         ep8 {
1179                                 reg = <8>;
1180                                 atmel,fifo-size = <1024>;
1181                                 atmel,nb-banks = <2>;
1182                         };
1183
1184                         ep9 {
1185                                 reg = <9>;
1186                                 atmel,fifo-size = <1024>;
1187                                 atmel,nb-banks = <2>;
1188                         };
1189
1190                         ep10 {
1191                                 reg = <10>;
1192                                 atmel,fifo-size = <1024>;
1193                                 atmel,nb-banks = <2>;
1194                         };
1195
1196                         ep11 {
1197                                 reg = <11>;
1198                                 atmel,fifo-size = <1024>;
1199                                 atmel,nb-banks = <2>;
1200                         };
1201
1202                         ep12 {
1203                                 reg = <12>;
1204                                 atmel,fifo-size = <1024>;
1205                                 atmel,nb-banks = <2>;
1206                         };
1207
1208                         ep13 {
1209                                 reg = <13>;
1210                                 atmel,fifo-size = <1024>;
1211                                 atmel,nb-banks = <2>;
1212                         };
1213
1214                         ep14 {
1215                                 reg = <14>;
1216                                 atmel,fifo-size = <1024>;
1217                                 atmel,nb-banks = <2>;
1218                         };
1219
1220                         ep15 {
1221                                 reg = <15>;
1222                                 atmel,fifo-size = <1024>;
1223                                 atmel,nb-banks = <2>;
1224                         };
1225                 };
1226
1227                 usb1: ohci@00600000 {
1228                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1229                         reg = <0x00600000 0x100000>;
1230                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1231                         clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>,
1232                                  <&uhpck>;
1233                         clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
1234                         status = "disabled";
1235                 };
1236
1237                 usb2: ehci@00700000 {
1238                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1239                         reg = <0x00700000 0x100000>;
1240                         interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1241                         clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1242                         clock-names = "usb_clk", "ehci_clk", "uhpck";
1243                         status = "disabled";
1244                 };
1245
1246                 nand0: nand@60000000 {
1247                         compatible = "atmel,at91rm9200-nand";
1248                         #address-cells = <1>;
1249                         #size-cells = <1>;
1250                         ranges;
1251                         reg = < 0x60000000 0x01000000   /* EBI CS3 */
1252                                 0xffffc070 0x00000490   /* SMC PMECC regs */
1253                                 0xffffc500 0x00000100   /* SMC PMECC Error Location regs */
1254                                 0x00110000 0x00018000   /* ROM code */
1255                                 >;
1256                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
1257                         atmel,nand-addr-offset = <21>;
1258                         atmel,nand-cmd-offset = <22>;
1259                         pinctrl-names = "default";
1260                         pinctrl-0 = <&pinctrl_nand0_ale_cle>;
1261                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1262                         status = "disabled";
1263
1264                         nfc@70000000 {
1265                                 compatible = "atmel,sama5d3-nfc";
1266                                 #address-cells = <1>;
1267                                 #size-cells = <1>;
1268                                 reg = <
1269                                         0x70000000 0x10000000   /* NFC Command Registers */
1270                                         0xffffc000 0x00000070   /* NFC HSMC regs */
1271                                         0x00200000 0x00100000   /* NFC SRAM banks */
1272                                         >;
1273                         };
1274                 };
1275         };
1276 };