Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/r8a7791.dtsi

   1 /*
   2  * Device Tree Source for the r8a7791 SoC
   3  *
   4  * Copyright (C) 2013 Renesas Electronics Corporation
   5  * Copyright (C) 2013 Renesas Solutions Corp.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14
  15 / {
  16         compatible = "renesas,r8a7791";
  17         interrupt-parent = <&gic>;
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a15";
  28                         reg = <0>;
  29                         clock-frequency = <1300000000>;
  30                 };
  31
  32                 cpu1: cpu@1 {
  33                         device_type = "cpu";
  34                         compatible = "arm,cortex-a15";
  35                         reg = <1>;
  36                         clock-frequency = <1300000000>;
  37                 };
  38         };
  39
  40         gic: interrupt-controller@f1001000 {
  41                 compatible = "arm,cortex-a15-gic";
  42                 #interrupt-cells = <3>;
  43                 #address-cells = <0>;
  44                 interrupt-controller;
  45                 reg = <0 0xf1001000 0 0x1000>,
  46                         <0 0xf1002000 0 0x1000>,
  47                         <0 0xf1004000 0 0x2000>,
  48                         <0 0xf1006000 0 0x2000>;
  49                 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
  50         };
  51
  52         gpio0: gpio@e6050000 {
  53                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
  54                 reg = <0 0xe6050000 0 0x50>;
  55                 interrupt-parent = <&gic>;
  56                 interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
  57                 #gpio-cells = <2>;
  58                 gpio-controller;
  59                 gpio-ranges = <&pfc 0 0 32>;
  60                 #interrupt-cells = <2>;
  61                 interrupt-controller;
  62         };
  63
  64         gpio1: gpio@e6051000 {
  65                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
  66                 reg = <0 0xe6051000 0 0x50>;
  67                 interrupt-parent = <&gic>;
  68                 interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
  69                 #gpio-cells = <2>;
  70                 gpio-controller;
  71                 gpio-ranges = <&pfc 0 32 32>;
  72                 #interrupt-cells = <2>;
  73                 interrupt-controller;
  74         };
  75
  76         gpio2: gpio@e6052000 {
  77                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
  78                 reg = <0 0xe6052000 0 0x50>;
  79                 interrupt-parent = <&gic>;
  80                 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
  81                 #gpio-cells = <2>;
  82                 gpio-controller;
  83                 gpio-ranges = <&pfc 0 64 32>;
  84                 #interrupt-cells = <2>;
  85                 interrupt-controller;
  86         };
  87
  88         gpio3: gpio@e6053000 {
  89                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
  90                 reg = <0 0xe6053000 0 0x50>;
  91                 interrupt-parent = <&gic>;
  92                 interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
  93                 #gpio-cells = <2>;
  94                 gpio-controller;
  95                 gpio-ranges = <&pfc 0 96 32>;
  96                 #interrupt-cells = <2>;
  97                 interrupt-controller;
  98         };
  99
 100         gpio4: gpio@e6054000 {
 101                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
 102                 reg = <0 0xe6054000 0 0x50>;
 103                 interrupt-parent = <&gic>;
 104                 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
 105                 #gpio-cells = <2>;
 106                 gpio-controller;
 107                 gpio-ranges = <&pfc 0 128 32>;
 108                 #interrupt-cells = <2>;
 109                 interrupt-controller;
 110         };
 111
 112         gpio5: gpio@e6055000 {
 113                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
 114                 reg = <0 0xe6055000 0 0x50>;
 115                 interrupt-parent = <&gic>;
 116                 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
 117                 #gpio-cells = <2>;
 118                 gpio-controller;
 119                 gpio-ranges = <&pfc 0 160 32>;
 120                 #interrupt-cells = <2>;
 121                 interrupt-controller;
 122         };
 123
 124         gpio6: gpio@e6055400 {
 125                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
 126                 reg = <0 0xe6055400 0 0x50>;
 127                 interrupt-parent = <&gic>;
 128                 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
 129                 #gpio-cells = <2>;
 130                 gpio-controller;
 131                 gpio-ranges = <&pfc 0 192 32>;
 132                 #interrupt-cells = <2>;
 133                 interrupt-controller;
 134         };
 135
 136         gpio7: gpio@e6055800 {
 137                 compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
 138                 reg = <0 0xe6055800 0 0x50>;
 139                 interrupt-parent = <&gic>;
 140                 interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
 141                 #gpio-cells = <2>;
 142                 gpio-controller;
 143                 gpio-ranges = <&pfc 0 224 26>;
 144                 #interrupt-cells = <2>;
 145                 interrupt-controller;
 146         };
 147
 148         thermal@e61f0000 {
 149                 compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
 150                 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
 151                 interrupt-parent = <&gic>;
 152                 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
 153         };
 154
 155         timer {
 156                 compatible = "arm,armv7-timer";
 157                 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 158                              <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 159                              <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 160                              <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 161         };
 162
 163         irqc0: interrupt-controller@e61c0000 {
 164                 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
 165                 #interrupt-cells = <2>;
 166                 interrupt-controller;
 167                 reg = <0 0xe61c0000 0 0x200>;
 168                 interrupt-parent = <&gic>;
 169                 interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
 170                              <0 1 IRQ_TYPE_LEVEL_HIGH>,
 171                              <0 2 IRQ_TYPE_LEVEL_HIGH>,
 172                              <0 3 IRQ_TYPE_LEVEL_HIGH>,
 173                              <0 12 IRQ_TYPE_LEVEL_HIGH>,
 174                              <0 13 IRQ_TYPE_LEVEL_HIGH>,
 175                              <0 14 IRQ_TYPE_LEVEL_HIGH>,
 176                              <0 15 IRQ_TYPE_LEVEL_HIGH>,
 177                              <0 16 IRQ_TYPE_LEVEL_HIGH>,
 178                              <0 17 IRQ_TYPE_LEVEL_HIGH>;
 179         };
 180
 181         pfc: pfc@e6060000 {
 182                 compatible = "renesas,pfc-r8a7791";
 183                 reg = <0 0xe6060000 0 0x250>;
 184                 #gpio-range-cells = <3>;
 185         };
 186 };