2 * DTS file for CSR SiRFprimaII SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,prima2";
14 interrupt-parent = <&intc>;
21 compatible = "arm,cortex-a9";
24 d-cache-line-size = <32>;
25 i-cache-line-size = <32>;
26 d-cache-size = <32768>;
27 i-cache-size = <32768>;
29 timebase-frequency = <0>;
31 clock-frequency = <0>;
36 compatible = "simple-bus";
39 ranges = <0x40000000 0x40000000 0x80000000>;
41 l2-cache-controller@80040000 {
42 compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
43 reg = <0x80040000 0x1000>;
45 arm,tag-latency = <1 1 1>;
46 arm,data-latency = <1 1 1>;
47 arm,filter-ranges = <0 0x40000000>;
50 intc: interrupt-controller@80020000 {
51 #interrupt-cells = <1>;
53 compatible = "sirf,prima2-intc";
54 reg = <0x80020000 0x1000>;
58 compatible = "simple-bus";
61 ranges = <0x88000000 0x88000000 0x40000>;
63 clks: clock-controller@88000000 {
64 compatible = "sirf,prima2-clkc";
65 reg = <0x88000000 0x1000>;
70 reset-controller@88010000 {
71 compatible = "sirf,prima2-rstc";
72 reg = <0x88010000 0x1000>;
75 rsc-controller@88020000 {
76 compatible = "sirf,prima2-rsc";
77 reg = <0x88020000 0x1000>;
82 compatible = "simple-bus";
85 ranges = <0x90000000 0x90000000 0x10000>;
87 memory-controller@90000000 {
88 compatible = "sirf,prima2-memc";
89 reg = <0x90000000 0x10000>;
96 compatible = "simple-bus";
99 ranges = <0x90010000 0x90010000 0x30000>;
102 compatible = "sirf,prima2-lcd";
103 reg = <0x90010000 0x20000>;
108 compatible = "sirf,prima2-vpp";
109 reg = <0x90020000 0x10000>;
116 compatible = "simple-bus";
117 #address-cells = <1>;
119 ranges = <0x98000000 0x98000000 0x8000000>;
122 compatible = "powervr,sgx531";
123 reg = <0x98000000 0x8000000>;
130 compatible = "simple-bus";
131 #address-cells = <1>;
133 ranges = <0xa0000000 0xa0000000 0x8000000>;
135 multimedia@a0000000 {
136 compatible = "sirf,prima2-video-codec";
137 reg = <0xa0000000 0x8000000>;
144 compatible = "simple-bus";
145 #address-cells = <1>;
147 ranges = <0xa8000000 0xa8000000 0x2000000>;
150 compatible = "sirf,prima2-dspif";
151 reg = <0xa8000000 0x10000>;
156 compatible = "sirf,prima2-gps";
157 reg = <0xa8010000 0x10000>;
163 compatible = "sirf,prima2-dsp";
164 reg = <0xa9000000 0x1000000>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>;
177 compatible = "sirf,prima2-tick";
178 reg = <0xb0020000 0x1000>;
183 compatible = "sirf,prima2-nand";
184 reg = <0xb0030000 0x10000>;
190 compatible = "sirf,prima2-audio";
191 reg = <0xb0040000 0x10000>;
196 uart0: uart@b0050000 {
198 compatible = "sirf,prima2-uart";
199 reg = <0xb0050000 0x10000>;
204 uart1: uart@b0060000 {
206 compatible = "sirf,prima2-uart";
207 reg = <0xb0060000 0x10000>;
212 uart2: uart@b0070000 {
214 compatible = "sirf,prima2-uart";
215 reg = <0xb0070000 0x10000>;
222 compatible = "sirf,prima2-usp";
223 reg = <0xb0080000 0x10000>;
230 compatible = "sirf,prima2-usp";
231 reg = <0xb0090000 0x10000>;
238 compatible = "sirf,prima2-usp";
239 reg = <0xb00a0000 0x10000>;
244 dmac0: dma-controller@b00b0000 {
246 compatible = "sirf,prima2-dmac";
247 reg = <0xb00b0000 0x10000>;
252 dmac1: dma-controller@b0160000 {
254 compatible = "sirf,prima2-dmac";
255 reg = <0xb0160000 0x10000>;
261 compatible = "sirf,prima2-vip";
262 reg = <0xb00C0000 0x10000>;
268 compatible = "sirf,prima2-spi";
269 reg = <0xb00d0000 0x10000>;
276 compatible = "sirf,prima2-spi";
277 reg = <0xb0170000 0x10000>;
284 compatible = "sirf,prima2-i2c";
285 reg = <0xb00e0000 0x10000>;
292 compatible = "sirf,prima2-i2c";
293 reg = <0xb00f0000 0x10000>;
299 compatible = "sirf,prima2-tsc";
300 reg = <0xb0110000 0x10000>;
305 gpio: pinctrl@b0120000 {
307 #interrupt-cells = <2>;
308 compatible = "sirf,prima2-pinctrl";
309 reg = <0xb0120000 0x10000>;
310 interrupts = <43 44 45 46 47>;
312 interrupt-controller;
314 lcd_16pins_a: lcd0@0 {
316 sirf,pins = "lcd_16bitsgrp";
317 sirf,function = "lcd_16bits";
320 lcd_18pins_a: lcd0@1 {
322 sirf,pins = "lcd_18bitsgrp";
323 sirf,function = "lcd_18bits";
326 lcd_24pins_a: lcd0@2 {
328 sirf,pins = "lcd_24bitsgrp";
329 sirf,function = "lcd_24bits";
332 lcdrom_pins_a: lcdrom0@0 {
334 sirf,pins = "lcdromgrp";
335 sirf,function = "lcdrom";
338 uart0_pins_a: uart0@0 {
340 sirf,pins = "uart0grp";
341 sirf,function = "uart0";
344 uart0_noflow_pins_a: uart0@1 {
346 sirf,pins = "uart0_nostreamctrlgrp";
347 sirf,function = "uart0_nostreamctrl";
350 uart1_pins_a: uart1@0 {
352 sirf,pins = "uart1grp";
353 sirf,function = "uart1";
356 uart2_pins_a: uart2@0 {
358 sirf,pins = "uart2grp";
359 sirf,function = "uart2";
362 uart2_noflow_pins_a: uart2@1 {
364 sirf,pins = "uart2_nostreamctrlgrp";
365 sirf,function = "uart2_nostreamctrl";
368 spi0_pins_a: spi0@0 {
370 sirf,pins = "spi0grp";
371 sirf,function = "spi0";
374 spi1_pins_a: spi1@0 {
376 sirf,pins = "spi1grp";
377 sirf,function = "spi1";
380 i2c0_pins_a: i2c0@0 {
382 sirf,pins = "i2c0grp";
383 sirf,function = "i2c0";
386 i2c1_pins_a: i2c1@0 {
388 sirf,pins = "i2c1grp";
389 sirf,function = "i2c1";
392 pwm0_pins_a: pwm0@0 {
394 sirf,pins = "pwm0grp";
395 sirf,function = "pwm0";
398 pwm1_pins_a: pwm1@0 {
400 sirf,pins = "pwm1grp";
401 sirf,function = "pwm1";
404 pwm2_pins_a: pwm2@0 {
406 sirf,pins = "pwm2grp";
407 sirf,function = "pwm2";
410 pwm3_pins_a: pwm3@0 {
412 sirf,pins = "pwm3grp";
413 sirf,function = "pwm3";
418 sirf,pins = "gpsgrp";
419 sirf,function = "gps";
424 sirf,pins = "vipgrp";
425 sirf,function = "vip";
428 sdmmc0_pins_a: sdmmc0@0 {
430 sirf,pins = "sdmmc0grp";
431 sirf,function = "sdmmc0";
434 sdmmc1_pins_a: sdmmc1@0 {
436 sirf,pins = "sdmmc1grp";
437 sirf,function = "sdmmc1";
440 sdmmc2_pins_a: sdmmc2@0 {
442 sirf,pins = "sdmmc2grp";
443 sirf,function = "sdmmc2";
446 sdmmc3_pins_a: sdmmc3@0 {
448 sirf,pins = "sdmmc3grp";
449 sirf,function = "sdmmc3";
452 sdmmc4_pins_a: sdmmc4@0 {
454 sirf,pins = "sdmmc4grp";
455 sirf,function = "sdmmc4";
458 sdmmc5_pins_a: sdmmc5@0 {
460 sirf,pins = "sdmmc5grp";
461 sirf,function = "sdmmc5";
466 sirf,pins = "i2sgrp";
467 sirf,function = "i2s";
470 ac97_pins_a: ac97@0 {
472 sirf,pins = "ac97grp";
473 sirf,function = "ac97";
476 nand_pins_a: nand@0 {
478 sirf,pins = "nandgrp";
479 sirf,function = "nand";
482 usp0_pins_a: usp0@0 {
484 sirf,pins = "usp0grp";
485 sirf,function = "usp0";
488 usp1_pins_a: usp1@0 {
490 sirf,pins = "usp1grp";
491 sirf,function = "usp1";
494 usp2_pins_a: usp2@0 {
496 sirf,pins = "usp2grp";
497 sirf,function = "usp2";
500 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
502 sirf,pins = "usb0_utmi_drvbusgrp";
503 sirf,function = "usb0_utmi_drvbus";
506 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
508 sirf,pins = "usb1_utmi_drvbusgrp";
509 sirf,function = "usb1_utmi_drvbus";
512 warm_rst_pins_a: warm_rst@0 {
514 sirf,pins = "warm_rstgrp";
515 sirf,function = "warm_rst";
518 pulse_count_pins_a: pulse_count@0 {
520 sirf,pins = "pulse_countgrp";
521 sirf,function = "pulse_count";
524 cko0_pins_a: cko0@0 {
526 sirf,pins = "cko0grp";
527 sirf,function = "cko0";
530 cko1_pins_a: cko1@0 {
532 sirf,pins = "cko1grp";
533 sirf,function = "cko1";
539 compatible = "sirf,prima2-pwm";
540 reg = <0xb0130000 0x10000>;
545 compatible = "sirf,prima2-efuse";
546 reg = <0xb0140000 0x10000>;
551 compatible = "sirf,prima2-pulsec";
552 reg = <0xb0150000 0x10000>;
558 compatible = "sirf,prima2-pciiobg", "simple-bus";
559 #address-cells = <1>;
561 ranges = <0x56000000 0x56000000 0x1b00000>;
563 sd0: sdhci@56000000 {
565 compatible = "sirf,prima2-sdhc";
566 reg = <0x56000000 0x100000>;
570 sd1: sdhci@56100000 {
572 compatible = "sirf,prima2-sdhc";
573 reg = <0x56100000 0x100000>;
577 sd2: sdhci@56200000 {
579 compatible = "sirf,prima2-sdhc";
580 reg = <0x56200000 0x100000>;
584 sd3: sdhci@56300000 {
586 compatible = "sirf,prima2-sdhc";
587 reg = <0x56300000 0x100000>;
591 sd4: sdhci@56400000 {
593 compatible = "sirf,prima2-sdhc";
594 reg = <0x56400000 0x100000>;
598 sd5: sdhci@56500000 {
600 compatible = "sirf,prima2-sdhc";
601 reg = <0x56500000 0x100000>;
606 compatible = "sirf,prima2-pcicp";
607 reg = <0x57900000 0x100000>;
611 rom-interface@57a00000 {
612 compatible = "sirf,prima2-romif";
613 reg = <0x57a00000 0x100000>;
619 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
620 #address-cells = <1>;
622 reg = <0x80030000 0x10000>;
625 compatible = "sirf,prima2-gpsrtc";
626 reg = <0x1000 0x1000>;
627 interrupts = <55 56 57>;
631 compatible = "sirf,prima2-sysrtc";
632 reg = <0x2000 0x1000>;
633 interrupts = <52 53 54>;
637 compatible = "sirf,prima2-pwrc";
638 reg = <0x3000 0x1000>;
644 compatible = "simple-bus";
645 #address-cells = <1>;
647 ranges = <0xb8000000 0xb8000000 0x40000>;
650 compatible = "chipidea,ci13611a-prima2";
651 reg = <0xb8000000 0x10000>;
657 compatible = "chipidea,ci13611a-prima2";
658 reg = <0xb8010000 0x10000>;
664 compatible = "synopsys,dwc-ahsata";
665 reg = <0xb8020000 0x10000>;
670 compatible = "sirf,prima2-security";
671 reg = <0xb8030000 0x10000>;