Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/keystone.dts

   1 /*
   2  * Copyright 2013 Texas Instruments, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10 /include/ "skeleton.dtsi"
  11
  12 / {
  13         model = "Texas Instruments Keystone 2 SoC";
  14         compatible =  "ti,keystone-evm";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17         interrupt-parent = <&gic>;
  18
  19         aliases {
  20                 serial0 = &uart0;
  21         };
  22
  23         memory {
  24                 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 interrupt-parent = <&gic>;
  32
  33                 cpu@0 {
  34                         compatible = "arm,cortex-a15";
  35                         device_type = "cpu";
  36                         reg = <0>;
  37                 };
  38
  39                 cpu@1 {
  40                         compatible = "arm,cortex-a15";
  41                         device_type = "cpu";
  42                         reg = <1>;
  43                 };
  44
  45                 cpu@2 {
  46                         compatible = "arm,cortex-a15";
  47                         device_type = "cpu";
  48                         reg = <2>;
  49                 };
  50
  51                 cpu@3 {
  52                         compatible = "arm,cortex-a15";
  53                         device_type = "cpu";
  54                         reg = <3>;
  55                 };
  56         };
  57
  58         gic: interrupt-controller {
  59                 compatible = "arm,cortex-a15-gic";
  60                 #interrupt-cells = <3>;
  61                 #size-cells = <0>;
  62                 #address-cells = <1>;
  63                 interrupt-controller;
  64                 reg = <0x0 0x02561000 0x0 0x1000>,
  65                       <0x0 0x02562000 0x0 0x2000>;
  66         };
  67
  68         timer {
  69                 compatible = "arm,armv7-timer";
  70                 interrupts = <1 13 0xf08>,
  71                              <1 14 0xf08>,
  72                              <1 11 0xf08>,
  73                              <1 10 0x308>;
  74         };
  75
  76         pmu {
  77                 compatible = "arm,cortex-a15-pmu";
  78                 interrupts = <0 20 0xf01>,
  79                              <0 21 0xf01>,
  80                              <0 22 0xf01>,
  81                              <0 23 0xf01>;
  82         };
  83
  84         soc {
  85                 #address-cells = <1>;
  86                 #size-cells = <1>;
  87                 compatible = "ti,keystone","simple-bus";
  88                 interrupt-parent = <&gic>;
  89                 ranges = <0x0 0x0 0x0 0xc0000000>;
  90
  91                 rstctrl: reset-controller {
  92                         compatible = "ti,keystone-reset";
  93                         reg = <0x023100e8 4>;   /* pll reset control reg */
  94                 };
  95
  96                 uart0: serial@02530c00 {
  97                         compatible = "ns16550a";
  98                         current-speed = <115200>;
  99                         reg-shift = <2>;
 100                         reg-io-width = <4>;
 101                         reg = <0x02530c00 0x100>;
 102                         clock-frequency = <133120000>;
 103                         interrupts = <0 277 0xf01>;
 104                 };
 105
 106                 uart1:  serial@02531000 {
 107                         compatible = "ns16550a";
 108                         current-speed = <115200>;
 109                         reg-shift = <2>;
 110                         reg-io-width = <4>;
 111                         reg = <0x02531000 0x100>;
 112                         clock-frequency = <133120000>;
 113                         interrupts = <0 280 0xf01>;
 114                 };
 115
 116         };
 117 };