Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         aliases {
  16                 gpio0 = &gpio1;
  17                 gpio1 = &gpio2;
  18                 gpio2 = &gpio3;
  19                 gpio3 = &gpio4;
  20                 gpio4 = &gpio5;
  21                 gpio5 = &gpio6;
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28                 serial4 = &uart5;
  29                 serial5 = &uart6;
  30                 spi0 = &cspi1;
  31                 spi1 = &cspi2;
  32                 spi2 = &cspi3;
  33         };
  34
  35         aitc: aitc-interrupt-controller@e0000000 {
  36                 compatible = "fsl,imx27-aitc", "fsl,avic";
  37                 interrupt-controller;
  38                 #interrupt-cells = <1>;
  39                 reg = <0x10040000 0x1000>;
  40         };
  41
  42         clocks {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45
  46                 osc26m {
  47                         compatible = "fsl,imx-osc26m", "fixed-clock";
  48                         clock-frequency = <26000000>;
  49                 };
  50         };
  51
  52         soc {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 compatible = "simple-bus";
  56                 interrupt-parent = <&aitc>;
  57                 ranges;
  58
  59                 aipi@10000000 { /* AIPI1 */
  60                         compatible = "fsl,aipi-bus", "simple-bus";
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         reg = <0x10000000 0x20000>;
  64                         ranges;
  65
  66                         dma: dma@10001000 {
  67                                 compatible = "fsl,imx27-dma";
  68                                 reg = <0x10001000 0x1000>;
  69                                 interrupts = <32>;
  70                                 clocks = <&clks 50>, <&clks 70>;
  71                                 clock-names = "ipg", "ahb";
  72                                 #dma-cells = <1>;
  73                                 #dma-channels = <16>;
  74                         };
  75
  76                         wdog: wdog@10002000 {
  77                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  78                                 reg = <0x10002000 0x1000>;
  79                                 interrupts = <27>;
  80                                 clocks = <&clks 0>;
  81                         };
  82
  83                         gpt1: timer@10003000 {
  84                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  85                                 reg = <0x10003000 0x1000>;
  86                                 interrupts = <26>;
  87                                 clocks = <&clks 46>, <&clks 61>;
  88                                 clock-names = "ipg", "per";
  89                         };
  90
  91                         gpt2: timer@10004000 {
  92                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  93                                 reg = <0x10004000 0x1000>;
  94                                 interrupts = <25>;
  95                                 clocks = <&clks 45>, <&clks 61>;
  96                                 clock-names = "ipg", "per";
  97                         };
  98
  99                         gpt3: timer@10005000 {
 100                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 101                                 reg = <0x10005000 0x1000>;
 102                                 interrupts = <24>;
 103                                 clocks = <&clks 44>, <&clks 61>;
 104                                 clock-names = "ipg", "per";
 105                         };
 106
 107                         pwm: pwm@10006000 {
 108                                 compatible = "fsl,imx27-pwm";
 109                                 reg = <0x10006000 0x1000>;
 110                                 interrupts = <23>;
 111                                 clocks = <&clks 34>, <&clks 61>;
 112                                 clock-names = "ipg", "per";
 113                         };
 114
 115                         kpp: kpp@10008000 {
 116                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
 117                                 reg = <0x10008000 0x1000>;
 118                                 interrupts = <21>;
 119                                 clocks = <&clks 37>;
 120                                 status = "disabled";
 121                         };
 122
 123                         owire: owire@10009000 {
 124                                 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
 125                                 reg = <0x10009000 0x1000>;
 126                                 clocks = <&clks 35>;
 127                                 status = "disabled";
 128                         };
 129
 130                         uart1: serial@1000a000 {
 131                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 132                                 reg = <0x1000a000 0x1000>;
 133                                 interrupts = <20>;
 134                                 clocks = <&clks 81>, <&clks 61>;
 135                                 clock-names = "ipg", "per";
 136                                 status = "disabled";
 137                         };
 138
 139                         uart2: serial@1000b000 {
 140                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 141                                 reg = <0x1000b000 0x1000>;
 142                                 interrupts = <19>;
 143                                 clocks = <&clks 80>, <&clks 61>;
 144                                 clock-names = "ipg", "per";
 145                                 status = "disabled";
 146                         };
 147
 148                         uart3: serial@1000c000 {
 149                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 150                                 reg = <0x1000c000 0x1000>;
 151                                 interrupts = <18>;
 152                                 clocks = <&clks 79>, <&clks 61>;
 153                                 clock-names = "ipg", "per";
 154                                 status = "disabled";
 155                         };
 156
 157                         uart4: serial@1000d000 {
 158                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 159                                 reg = <0x1000d000 0x1000>;
 160                                 interrupts = <17>;
 161                                 clocks = <&clks 78>, <&clks 61>;
 162                                 clock-names = "ipg", "per";
 163                                 status = "disabled";
 164                         };
 165
 166                         cspi1: cspi@1000e000 {
 167                                 #address-cells = <1>;
 168                                 #size-cells = <0>;
 169                                 compatible = "fsl,imx27-cspi";
 170                                 reg = <0x1000e000 0x1000>;
 171                                 interrupts = <16>;
 172                                 clocks = <&clks 53>, <&clks 53>;
 173                                 clock-names = "ipg", "per";
 174                                 status = "disabled";
 175                         };
 176
 177                         cspi2: cspi@1000f000 {
 178                                 #address-cells = <1>;
 179                                 #size-cells = <0>;
 180                                 compatible = "fsl,imx27-cspi";
 181                                 reg = <0x1000f000 0x1000>;
 182                                 interrupts = <15>;
 183                                 clocks = <&clks 52>, <&clks 52>;
 184                                 clock-names = "ipg", "per";
 185                                 status = "disabled";
 186                         };
 187
 188                         i2c1: i2c@10012000 {
 189                                 #address-cells = <1>;
 190                                 #size-cells = <0>;
 191                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 192                                 reg = <0x10012000 0x1000>;
 193                                 interrupts = <12>;
 194                                 clocks = <&clks 40>;
 195                                 status = "disabled";
 196                         };
 197
 198                         sdhci1: sdhci@10013000 {
 199                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 200                                 reg = <0x10013000 0x1000>;
 201                                 interrupts = <11>;
 202                                 clocks = <&clks 30>, <&clks 60>;
 203                                 clock-names = "ipg", "per";
 204                                 dmas = <&dma 7>;
 205                                 dma-names = "rx-tx";
 206                                 status = "disabled";
 207                         };
 208
 209                         sdhci2: sdhci@10014000 {
 210                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 211                                 reg = <0x10014000 0x1000>;
 212                                 interrupts = <10>;
 213                                 clocks = <&clks 29>, <&clks 60>;
 214                                 clock-names = "ipg", "per";
 215                                 dmas = <&dma 6>;
 216                                 dma-names = "rx-tx";
 217                                 status = "disabled";
 218                         };
 219
 220                         gpio1: gpio@10015000 {
 221                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 222                                 reg = <0x10015000 0x100>;
 223                                 interrupts = <8>;
 224                                 gpio-controller;
 225                                 #gpio-cells = <2>;
 226                                 interrupt-controller;
 227                                 #interrupt-cells = <2>;
 228                         };
 229
 230                         gpio2: gpio@10015100 {
 231                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 232                                 reg = <0x10015100 0x100>;
 233                                 interrupts = <8>;
 234                                 gpio-controller;
 235                                 #gpio-cells = <2>;
 236                                 interrupt-controller;
 237                                 #interrupt-cells = <2>;
 238                         };
 239
 240                         gpio3: gpio@10015200 {
 241                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 242                                 reg = <0x10015200 0x100>;
 243                                 interrupts = <8>;
 244                                 gpio-controller;
 245                                 #gpio-cells = <2>;
 246                                 interrupt-controller;
 247                                 #interrupt-cells = <2>;
 248                         };
 249
 250                         gpio4: gpio@10015300 {
 251                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 252                                 reg = <0x10015300 0x100>;
 253                                 interrupts = <8>;
 254                                 gpio-controller;
 255                                 #gpio-cells = <2>;
 256                                 interrupt-controller;
 257                                 #interrupt-cells = <2>;
 258                         };
 259
 260                         gpio5: gpio@10015400 {
 261                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 262                                 reg = <0x10015400 0x100>;
 263                                 interrupts = <8>;
 264                                 gpio-controller;
 265                                 #gpio-cells = <2>;
 266                                 interrupt-controller;
 267                                 #interrupt-cells = <2>;
 268                         };
 269
 270                         gpio6: gpio@10015500 {
 271                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 272                                 reg = <0x10015500 0x100>;
 273                                 interrupts = <8>;
 274                                 gpio-controller;
 275                                 #gpio-cells = <2>;
 276                                 interrupt-controller;
 277                                 #interrupt-cells = <2>;
 278                         };
 279
 280                         audmux: audmux@10016000 {
 281                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
 282                                 reg = <0x10016000 0x1000>;
 283                                 clocks = <&clks 0>;
 284                                 clock-names = "audmux";
 285                         };
 286
 287                         cspi3: cspi@10017000 {
 288                                 #address-cells = <1>;
 289                                 #size-cells = <0>;
 290                                 compatible = "fsl,imx27-cspi";
 291                                 reg = <0x10017000 0x1000>;
 292                                 interrupts = <6>;
 293                                 clocks = <&clks 51>, <&clks 51>;
 294                                 clock-names = "ipg", "per";
 295                                 status = "disabled";
 296                         };
 297
 298                         gpt4: timer@10019000 {
 299                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 300                                 reg = <0x10019000 0x1000>;
 301                                 interrupts = <4>;
 302                                 clocks = <&clks 43>, <&clks 61>;
 303                                 clock-names = "ipg", "per";
 304                         };
 305
 306                         gpt5: timer@1001a000 {
 307                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 308                                 reg = <0x1001a000 0x1000>;
 309                                 interrupts = <3>;
 310                                 clocks = <&clks 42>, <&clks 61>;
 311                                 clock-names = "ipg", "per";
 312                         };
 313
 314                         uart5: serial@1001b000 {
 315                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 316                                 reg = <0x1001b000 0x1000>;
 317                                 interrupts = <49>;
 318                                 clocks = <&clks 77>, <&clks 61>;
 319                                 clock-names = "ipg", "per";
 320                                 status = "disabled";
 321                         };
 322
 323                         uart6: serial@1001c000 {
 324                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 325                                 reg = <0x1001c000 0x1000>;
 326                                 interrupts = <48>;
 327                                 clocks = <&clks 78>, <&clks 61>;
 328                                 clock-names = "ipg", "per";
 329                                 status = "disabled";
 330                         };
 331
 332                         i2c2: i2c@1001d000 {
 333                                 #address-cells = <1>;
 334                                 #size-cells = <0>;
 335                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 336                                 reg = <0x1001d000 0x1000>;
 337                                 interrupts = <1>;
 338                                 clocks = <&clks 39>;
 339                                 status = "disabled";
 340                         };
 341
 342                         sdhci3: sdhci@1001e000 {
 343                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 344                                 reg = <0x1001e000 0x1000>;
 345                                 interrupts = <9>;
 346                                 clocks = <&clks 28>, <&clks 60>;
 347                                 clock-names = "ipg", "per";
 348                                 dmas = <&dma 36>;
 349                                 dma-names = "rx-tx";
 350                                 status = "disabled";
 351                         };
 352
 353                         gpt6: timer@1001f000 {
 354                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 355                                 reg = <0x1001f000 0x1000>;
 356                                 interrupts = <2>;
 357                                 clocks = <&clks 41>, <&clks 61>;
 358                                 clock-names = "ipg", "per";
 359                         };
 360
 361                         iim: iim@10028000 {
 362                                 compatible = "fsl,imx27-iim";
 363                                 reg = <0x10028000 0x1000>;
 364                                 interrupts = <62>;
 365                                 clocks = <&clks 38>;
 366                         };
 367                 };
 368
 369                 aipi@10020000 { /* AIPI2 */
 370                         compatible = "fsl,aipi-bus", "simple-bus";
 371                         #address-cells = <1>;
 372                         #size-cells = <1>;
 373                         reg = <0x10020000 0x20000>;
 374                         ranges;
 375
 376                         fb: fb@10021000 {
 377                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
 378                                 interrupts = <61>;
 379                                 reg = <0x10021000 0x1000>;
 380                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
 381                                 clock-names = "ipg", "ahb", "per";
 382                                 status = "disabled";
 383                         };
 384
 385                         coda: coda@10023000 {
 386                                 compatible = "fsl,imx27-vpu";
 387                                 reg = <0x10023000 0x0200>;
 388                                 interrupts = <53>;
 389                                 clocks = <&clks 57>, <&clks 66>;
 390                                 clock-names = "per", "ahb";
 391                                 iram = <&iram>;
 392                         };
 393
 394                         sahara2: sahara@10025000 {
 395                                 compatible = "fsl,imx27-sahara";
 396                                 reg = <0x10025000 0x1000>;
 397                                 interrupts = <59>;
 398                                 clocks = <&clks 32>, <&clks 64>;
 399                                 clock-names = "ipg", "ahb";
 400                         };
 401
 402                         clks: ccm@10027000{
 403                                 compatible = "fsl,imx27-ccm";
 404                                 reg = <0x10027000 0x1000>;
 405                                 #clock-cells = <1>;
 406                         };
 407
 408                         fec: ethernet@1002b000 {
 409                                 compatible = "fsl,imx27-fec";
 410                                 reg = <0x1002b000 0x4000>;
 411                                 interrupts = <50>;
 412                                 clocks = <&clks 48>, <&clks 67>, <&clks 0>;
 413                                 clock-names = "ipg", "ahb", "ptp";
 414                                 status = "disabled";
 415                         };
 416                 };
 417
 418                 nfc: nand@d8000000 {
 419                         #address-cells = <1>;
 420                         #size-cells = <1>;
 421                         compatible = "fsl,imx27-nand";
 422                         reg = <0xd8000000 0x1000>;
 423                         interrupts = <29>;
 424                         clocks = <&clks 54>;
 425                         status = "disabled";
 426                 };
 427
 428                 iram: iram@ffff4c00 {
 429                         compatible = "mmio-sram";
 430                         reg = <0xffff4c00 0xb400>;
 431                 };
 432         };
 433 };