Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         aliases {
  16                 gpio0 = &gpio1;
  17                 gpio1 = &gpio2;
  18                 gpio2 = &gpio3;
  19                 gpio3 = &gpio4;
  20                 gpio4 = &gpio5;
  21                 gpio5 = &gpio6;
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28                 serial4 = &uart5;
  29                 serial5 = &uart6;
  30                 spi0 = &cspi1;
  31                 spi1 = &cspi2;
  32                 spi2 = &cspi3;
  33         };
  34
  35         aitc: aitc-interrupt-controller@e0000000 {
  36                 compatible = "fsl,imx27-aitc", "fsl,avic";
  37                 interrupt-controller;
  38                 #interrupt-cells = <1>;
  39                 reg = <0x10040000 0x1000>;
  40         };
  41
  42         clocks {
  43                 #address-cells = <1>;
  44                 #size-cells = <0>;
  45
  46                 osc26m {
  47                         compatible = "fsl,imx-osc26m", "fixed-clock";
  48                         clock-frequency = <26000000>;
  49                 };
  50         };
  51
  52         soc {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 compatible = "simple-bus";
  56                 interrupt-parent = <&aitc>;
  57                 ranges;
  58
  59                 aipi@10000000 { /* AIPI1 */
  60                         compatible = "fsl,aipi-bus", "simple-bus";
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         reg = <0x10000000 0x20000>;
  64                         ranges;
  65
  66                         dma: dma@10001000 {
  67                                 compatible = "fsl,imx27-dma";
  68                                 reg = <0x10001000 0x1000>;
  69                                 interrupts = <32>;
  70                                 clocks = <&clks 50>, <&clks 70>;
  71                                 clock-names = "ipg", "ahb";
  72                                 #dma-cells = <1>;
  73                                 #dma-channels = <16>;
  74                         };
  75
  76                         wdog: wdog@10002000 {
  77                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  78                                 reg = <0x10002000 0x1000>;
  79                                 interrupts = <27>;
  80                                 clocks = <&clks 0>;
  81                         };
  82
  83                         gpt1: timer@10003000 {
  84                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  85                                 reg = <0x10003000 0x1000>;
  86                                 interrupts = <26>;
  87                                 clocks = <&clks 46>, <&clks 61>;
  88                                 clock-names = "ipg", "per";
  89                         };
  90
  91                         gpt2: timer@10004000 {
  92                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
  93                                 reg = <0x10004000 0x1000>;
  94                                 interrupts = <25>;
  95                                 clocks = <&clks 45>, <&clks 61>;
  96                                 clock-names = "ipg", "per";
  97                         };
  98
  99                         gpt3: timer@10005000 {
 100                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 101                                 reg = <0x10005000 0x1000>;
 102                                 interrupts = <24>;
 103                                 clocks = <&clks 44>, <&clks 61>;
 104                                 clock-names = "ipg", "per";
 105                         };
 106
 107                         pwm: pwm@10006000 {
 108                                 compatible = "fsl,imx27-pwm";
 109                                 reg = <0x10006000 0x1000>;
 110                                 interrupts = <23>;
 111                                 clocks = <&clks 34>, <&clks 61>;
 112                                 clock-names = "ipg", "per";
 113                         };
 114
 115                         kpp: kpp@10008000 {
 116                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
 117                                 reg = <0x10008000 0x1000>;
 118                                 interrupts = <21>;
 119                                 clocks = <&clks 37>;
 120                                 status = "disabled";
 121                         };
 122
 123                         uart1: serial@1000a000 {
 124                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 125                                 reg = <0x1000a000 0x1000>;
 126                                 interrupts = <20>;
 127                                 clocks = <&clks 81>, <&clks 61>;
 128                                 clock-names = "ipg", "per";
 129                                 status = "disabled";
 130                         };
 131
 132                         uart2: serial@1000b000 {
 133                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 134                                 reg = <0x1000b000 0x1000>;
 135                                 interrupts = <19>;
 136                                 clocks = <&clks 80>, <&clks 61>;
 137                                 clock-names = "ipg", "per";
 138                                 status = "disabled";
 139                         };
 140
 141                         uart3: serial@1000c000 {
 142                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 143                                 reg = <0x1000c000 0x1000>;
 144                                 interrupts = <18>;
 145                                 clocks = <&clks 79>, <&clks 61>;
 146                                 clock-names = "ipg", "per";
 147                                 status = "disabled";
 148                         };
 149
 150                         uart4: serial@1000d000 {
 151                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 152                                 reg = <0x1000d000 0x1000>;
 153                                 interrupts = <17>;
 154                                 clocks = <&clks 78>, <&clks 61>;
 155                                 clock-names = "ipg", "per";
 156                                 status = "disabled";
 157                         };
 158
 159                         cspi1: cspi@1000e000 {
 160                                 #address-cells = <1>;
 161                                 #size-cells = <0>;
 162                                 compatible = "fsl,imx27-cspi";
 163                                 reg = <0x1000e000 0x1000>;
 164                                 interrupts = <16>;
 165                                 clocks = <&clks 53>, <&clks 53>;
 166                                 clock-names = "ipg", "per";
 167                                 status = "disabled";
 168                         };
 169
 170                         cspi2: cspi@1000f000 {
 171                                 #address-cells = <1>;
 172                                 #size-cells = <0>;
 173                                 compatible = "fsl,imx27-cspi";
 174                                 reg = <0x1000f000 0x1000>;
 175                                 interrupts = <15>;
 176                                 clocks = <&clks 52>, <&clks 52>;
 177                                 clock-names = "ipg", "per";
 178                                 status = "disabled";
 179                         };
 180
 181                         i2c1: i2c@10012000 {
 182                                 #address-cells = <1>;
 183                                 #size-cells = <0>;
 184                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 185                                 reg = <0x10012000 0x1000>;
 186                                 interrupts = <12>;
 187                                 clocks = <&clks 40>;
 188                                 status = "disabled";
 189                         };
 190
 191                         sdhci1: sdhci@10013000 {
 192                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 193                                 reg = <0x10013000 0x1000>;
 194                                 interrupts = <11>;
 195                                 clocks = <&clks 30>, <&clks 60>;
 196                                 clock-names = "ipg", "per";
 197                                 dmas = <&dma 7>;
 198                                 dma-names = "rx-tx";
 199                                 status = "disabled";
 200                         };
 201
 202                         sdhci2: sdhci@10014000 {
 203                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 204                                 reg = <0x10014000 0x1000>;
 205                                 interrupts = <10>;
 206                                 clocks = <&clks 29>, <&clks 60>;
 207                                 clock-names = "ipg", "per";
 208                                 dmas = <&dma 6>;
 209                                 dma-names = "rx-tx";
 210                                 status = "disabled";
 211                         };
 212
 213                         gpio1: gpio@10015000 {
 214                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 215                                 reg = <0x10015000 0x100>;
 216                                 interrupts = <8>;
 217                                 gpio-controller;
 218                                 #gpio-cells = <2>;
 219                                 interrupt-controller;
 220                                 #interrupt-cells = <2>;
 221                         };
 222
 223                         gpio2: gpio@10015100 {
 224                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 225                                 reg = <0x10015100 0x100>;
 226                                 interrupts = <8>;
 227                                 gpio-controller;
 228                                 #gpio-cells = <2>;
 229                                 interrupt-controller;
 230                                 #interrupt-cells = <2>;
 231                         };
 232
 233                         gpio3: gpio@10015200 {
 234                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 235                                 reg = <0x10015200 0x100>;
 236                                 interrupts = <8>;
 237                                 gpio-controller;
 238                                 #gpio-cells = <2>;
 239                                 interrupt-controller;
 240                                 #interrupt-cells = <2>;
 241                         };
 242
 243                         gpio4: gpio@10015300 {
 244                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 245                                 reg = <0x10015300 0x100>;
 246                                 interrupts = <8>;
 247                                 gpio-controller;
 248                                 #gpio-cells = <2>;
 249                                 interrupt-controller;
 250                                 #interrupt-cells = <2>;
 251                         };
 252
 253                         gpio5: gpio@10015400 {
 254                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 255                                 reg = <0x10015400 0x100>;
 256                                 interrupts = <8>;
 257                                 gpio-controller;
 258                                 #gpio-cells = <2>;
 259                                 interrupt-controller;
 260                                 #interrupt-cells = <2>;
 261                         };
 262
 263                         gpio6: gpio@10015500 {
 264                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 265                                 reg = <0x10015500 0x100>;
 266                                 interrupts = <8>;
 267                                 gpio-controller;
 268                                 #gpio-cells = <2>;
 269                                 interrupt-controller;
 270                                 #interrupt-cells = <2>;
 271                         };
 272
 273                         audmux: audmux@10016000 {
 274                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
 275                                 reg = <0x10016000 0x1000>;
 276                                 clocks = <&clks 0>;
 277                                 clock-names = "audmux";
 278                         };
 279
 280                         cspi3: cspi@10017000 {
 281                                 #address-cells = <1>;
 282                                 #size-cells = <0>;
 283                                 compatible = "fsl,imx27-cspi";
 284                                 reg = <0x10017000 0x1000>;
 285                                 interrupts = <6>;
 286                                 clocks = <&clks 51>, <&clks 51>;
 287                                 clock-names = "ipg", "per";
 288                                 status = "disabled";
 289                         };
 290
 291                         gpt4: timer@10019000 {
 292                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 293                                 reg = <0x10019000 0x1000>;
 294                                 interrupts = <4>;
 295                                 clocks = <&clks 43>, <&clks 61>;
 296                                 clock-names = "ipg", "per";
 297                         };
 298
 299                         gpt5: timer@1001a000 {
 300                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 301                                 reg = <0x1001a000 0x1000>;
 302                                 interrupts = <3>;
 303                                 clocks = <&clks 42>, <&clks 61>;
 304                                 clock-names = "ipg", "per";
 305                         };
 306
 307                         uart5: serial@1001b000 {
 308                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 309                                 reg = <0x1001b000 0x1000>;
 310                                 interrupts = <49>;
 311                                 clocks = <&clks 77>, <&clks 61>;
 312                                 clock-names = "ipg", "per";
 313                                 status = "disabled";
 314                         };
 315
 316                         uart6: serial@1001c000 {
 317                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 318                                 reg = <0x1001c000 0x1000>;
 319                                 interrupts = <48>;
 320                                 clocks = <&clks 78>, <&clks 61>;
 321                                 clock-names = "ipg", "per";
 322                                 status = "disabled";
 323                         };
 324
 325                         i2c2: i2c@1001d000 {
 326                                 #address-cells = <1>;
 327                                 #size-cells = <0>;
 328                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 329                                 reg = <0x1001d000 0x1000>;
 330                                 interrupts = <1>;
 331                                 clocks = <&clks 39>;
 332                                 status = "disabled";
 333                         };
 334
 335                         sdhci3: sdhci@1001e000 {
 336                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 337                                 reg = <0x1001e000 0x1000>;
 338                                 interrupts = <9>;
 339                                 clocks = <&clks 28>, <&clks 60>;
 340                                 clock-names = "ipg", "per";
 341                                 dmas = <&dma 36>;
 342                                 dma-names = "rx-tx";
 343                                 status = "disabled";
 344                         };
 345
 346                         gpt6: timer@1001f000 {
 347                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 348                                 reg = <0x1001f000 0x1000>;
 349                                 interrupts = <2>;
 350                                 clocks = <&clks 41>, <&clks 61>;
 351                                 clock-names = "ipg", "per";
 352                         };
 353
 354                         iim: iim@10028000 {
 355                                 compatible = "fsl,imx27-iim";
 356                                 reg = <0x10028000 0x1000>;
 357                                 interrupts = <62>;
 358                                 clocks = <&clks 38>;
 359                         };
 360                 };
 361
 362                 aipi@10020000 { /* AIPI2 */
 363                         compatible = "fsl,aipi-bus", "simple-bus";
 364                         #address-cells = <1>;
 365                         #size-cells = <1>;
 366                         reg = <0x10020000 0x20000>;
 367                         ranges;
 368
 369                         fb: fb@10021000 {
 370                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
 371                                 interrupts = <61>;
 372                                 reg = <0x10021000 0x1000>;
 373                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
 374                                 clock-names = "ipg", "ahb", "per";
 375                                 status = "disabled";
 376                         };
 377
 378                         coda: coda@10023000 {
 379                                 compatible = "fsl,imx27-vpu";
 380                                 reg = <0x10023000 0x0200>;
 381                                 interrupts = <53>;
 382                                 clocks = <&clks 57>, <&clks 66>;
 383                                 clock-names = "per", "ahb";
 384                                 iram = <&iram>;
 385                         };
 386
 387                         sahara2: sahara@10025000 {
 388                                 compatible = "fsl,imx27-sahara";
 389                                 reg = <0x10025000 0x1000>;
 390                                 interrupts = <59>;
 391                                 clocks = <&clks 32>, <&clks 64>;
 392                                 clock-names = "ipg", "ahb";
 393                         };
 394
 395                         clks: ccm@10027000{
 396                                 compatible = "fsl,imx27-ccm";
 397                                 reg = <0x10027000 0x1000>;
 398                                 #clock-cells = <1>;
 399                         };
 400
 401                         fec: ethernet@1002b000 {
 402                                 compatible = "fsl,imx27-fec";
 403                                 reg = <0x1002b000 0x4000>;
 404                                 interrupts = <50>;
 405                                 clocks = <&clks 48>, <&clks 67>, <&clks 0>;
 406                                 clock-names = "ipg", "ahb", "ptp";
 407                                 status = "disabled";
 408                         };
 409                 };
 410
 411                 nfc: nand@d8000000 {
 412                         #address-cells = <1>;
 413                         #size-cells = <1>;
 414                         compatible = "fsl,imx27-nand";
 415                         reg = <0xd8000000 0x1000>;
 416                         interrupts = <29>;
 417                         clocks = <&clks 54>;
 418                         status = "disabled";
 419                 };
 420
 421                 iram: iram@ffff4c00 {
 422                         compatible = "mmio-sram";
 423                         reg = <0xffff4c00 0xb400>;
 424                 };
 425         };
 426 };