Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/exynos5250.dtsi

   1 /*
   2  * SAMSUNG EXYNOS5250 SoC device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
   8  * EXYNOS5250 based board files can include this file and provide
   9  * values for board specfic bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13  * additional nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos5.dtsi"
  21 #include "exynos5250-pinctrl.dtsi"
  22
  23 #include <dt-bindings/clk/exynos-audss-clk.h>
  24
  25 / {
  26         compatible = "samsung,exynos5250";
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 gsc0 = &gsc_0;
  33                 gsc1 = &gsc_1;
  34                 gsc2 = &gsc_2;
  35                 gsc3 = &gsc_3;
  36                 mshc0 = &mmc_0;
  37                 mshc1 = &mmc_1;
  38                 mshc2 = &mmc_2;
  39                 mshc3 = &mmc_3;
  40                 i2c0 = &i2c_0;
  41                 i2c1 = &i2c_1;
  42                 i2c2 = &i2c_2;
  43                 i2c3 = &i2c_3;
  44                 i2c4 = &i2c_4;
  45                 i2c5 = &i2c_5;
  46                 i2c6 = &i2c_6;
  47                 i2c7 = &i2c_7;
  48                 i2c8 = &i2c_8;
  49                 pinctrl0 = &pinctrl_0;
  50                 pinctrl1 = &pinctrl_1;
  51                 pinctrl2 = &pinctrl_2;
  52                 pinctrl3 = &pinctrl_3;
  53         };
  54
  55         cpus {
  56                 #address-cells = <1>;
  57                 #size-cells = <0>;
  58
  59                 cpu@0 {
  60                         device_type = "cpu";
  61                         compatible = "arm,cortex-a15";
  62                         reg = <0>;
  63                         clock-frequency = <1700000000>;
  64                 };
  65                 cpu@1 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a15";
  68                         reg = <1>;
  69                         clock-frequency = <1700000000>;
  70                 };
  71         };
  72
  73         pd_gsc: gsc-power-domain@10044000 {
  74                 compatible = "samsung,exynos4210-pd";
  75                 reg = <0x10044000 0x20>;
  76         };
  77
  78         pd_mfc: mfc-power-domain@10044040 {
  79                 compatible = "samsung,exynos4210-pd";
  80                 reg = <0x10044040 0x20>;
  81         };
  82
  83         clock: clock-controller@10010000 {
  84                 compatible = "samsung,exynos5250-clock";
  85                 reg = <0x10010000 0x30000>;
  86                 #clock-cells = <1>;
  87         };
  88
  89         clock_audss: audss-clock-controller@3810000 {
  90                 compatible = "samsung,exynos5250-audss-clock";
  91                 reg = <0x03810000 0x0C>;
  92                 #clock-cells = <1>;
  93         };
  94
  95         timer {
  96                 compatible = "arm,armv7-timer";
  97                 interrupts = <1 13 0xf08>,
  98                              <1 14 0xf08>,
  99                              <1 11 0xf08>,
 100                              <1 10 0xf08>;
 101                 /* Unfortunately we need this since some versions of U-Boot
 102                  * on Exynos don't set the CNTFRQ register, so we need the
 103                  * value from DT.
 104                  */
 105                 clock-frequency = <24000000>;
 106         };
 107
 108         mct@101C0000 {
 109                 compatible = "samsung,exynos4210-mct";
 110                 reg = <0x101C0000 0x800>;
 111                 interrupt-controller;
 112                 #interrups-cells = <2>;
 113                 interrupt-parent = <&mct_map>;
 114                 interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
 115                              <4 0>, <5 0>;
 116                 clocks = <&clock 1>, <&clock 335>;
 117                 clock-names = "fin_pll", "mct";
 118
 119                 mct_map: mct-map {
 120                         #interrupt-cells = <2>;
 121                         #address-cells = <0>;
 122                         #size-cells = <0>;
 123                         interrupt-map = <0x0 0 &combiner 23 3>,
 124                                         <0x1 0 &combiner 23 4>,
 125                                         <0x2 0 &combiner 25 2>,
 126                                         <0x3 0 &combiner 25 3>,
 127                                         <0x4 0 &gic 0 120 0>,
 128                                         <0x5 0 &gic 0 121 0>;
 129                 };
 130         };
 131
 132         pmu {
 133                 compatible = "arm,cortex-a15-pmu";
 134                 interrupt-parent = <&combiner>;
 135                 interrupts = <1 2>, <22 4>;
 136         };
 137
 138         pinctrl_0: pinctrl@11400000 {
 139                 compatible = "samsung,exynos5250-pinctrl";
 140                 reg = <0x11400000 0x1000>;
 141                 interrupts = <0 46 0>;
 142
 143                 wakup_eint: wakeup-interrupt-controller {
 144                         compatible = "samsung,exynos4210-wakeup-eint";
 145                         interrupt-parent = <&gic>;
 146                         interrupts = <0 32 0>;
 147                 };
 148         };
 149
 150         pinctrl_1: pinctrl@13400000 {
 151                 compatible = "samsung,exynos5250-pinctrl";
 152                 reg = <0x13400000 0x1000>;
 153                 interrupts = <0 45 0>;
 154         };
 155
 156         pinctrl_2: pinctrl@10d10000 {
 157                 compatible = "samsung,exynos5250-pinctrl";
 158                 reg = <0x10d10000 0x1000>;
 159                 interrupts = <0 50 0>;
 160         };
 161
 162         pinctrl_3: pinctrl@03860000 {
 163                 compatible = "samsung,exynos5250-pinctrl";
 164                 reg = <0x03860000 0x1000>;
 165                 interrupts = <0 47 0>;
 166         };
 167
 168         watchdog {
 169                 clocks = <&clock 336>;
 170                 clock-names = "watchdog";
 171         };
 172
 173         g2d@10850000 {
 174                 compatible = "samsung,exynos5250-g2d";
 175                 reg = <0x10850000 0x1000>;
 176                 interrupts = <0 91 0>;
 177                 clocks = <&clock 345>;
 178                 clock-names = "fimg2d";
 179         };
 180
 181         codec@11000000 {
 182                 compatible = "samsung,mfc-v6";
 183                 reg = <0x11000000 0x10000>;
 184                 interrupts = <0 96 0>;
 185                 samsung,power-domain = <&pd_mfc>;
 186                 clocks = <&clock 266>;
 187                 clock-names = "mfc";
 188         };
 189
 190         rtc@101E0000 {
 191                 clocks = <&clock 337>;
 192                 clock-names = "rtc";
 193                 status = "okay";
 194         };
 195
 196         tmu@10060000 {
 197                 compatible = "samsung,exynos5250-tmu";
 198                 reg = <0x10060000 0x100>;
 199                 interrupts = <0 65 0>;
 200                 clocks = <&clock 338>;
 201                 clock-names = "tmu_apbif";
 202         };
 203
 204         serial@12C00000 {
 205                 clocks = <&clock 289>, <&clock 146>;
 206                 clock-names = "uart", "clk_uart_baud0";
 207         };
 208
 209         serial@12C10000 {
 210                 clocks = <&clock 290>, <&clock 147>;
 211                 clock-names = "uart", "clk_uart_baud0";
 212         };
 213
 214         serial@12C20000 {
 215                 clocks = <&clock 291>, <&clock 148>;
 216                 clock-names = "uart", "clk_uart_baud0";
 217         };
 218
 219         serial@12C30000 {
 220                 clocks = <&clock 292>, <&clock 149>;
 221                 clock-names = "uart", "clk_uart_baud0";
 222         };
 223
 224         sata@122F0000 {
 225                 compatible = "samsung,exynos5-sata-ahci";
 226                 reg = <0x122F0000 0x1ff>;
 227                 interrupts = <0 115 0>;
 228                 clocks = <&clock 277>, <&clock 143>;
 229                 clock-names = "sata", "sclk_sata";
 230         };
 231
 232         sata-phy@12170000 {
 233                 compatible = "samsung,exynos5-sata-phy";
 234                 reg = <0x12170000 0x1ff>;
 235         };
 236
 237         i2c_0: i2c@12C60000 {
 238                 compatible = "samsung,s3c2440-i2c";
 239                 reg = <0x12C60000 0x100>;
 240                 interrupts = <0 56 0>;
 241                 #address-cells = <1>;
 242                 #size-cells = <0>;
 243                 clocks = <&clock 294>;
 244                 clock-names = "i2c";
 245                 pinctrl-names = "default";
 246                 pinctrl-0 = <&i2c0_bus>;
 247         };
 248
 249         i2c_1: i2c@12C70000 {
 250                 compatible = "samsung,s3c2440-i2c";
 251                 reg = <0x12C70000 0x100>;
 252                 interrupts = <0 57 0>;
 253                 #address-cells = <1>;
 254                 #size-cells = <0>;
 255                 clocks = <&clock 295>;
 256                 clock-names = "i2c";
 257                 pinctrl-names = "default";
 258                 pinctrl-0 = <&i2c1_bus>;
 259         };
 260
 261         i2c_2: i2c@12C80000 {
 262                 compatible = "samsung,s3c2440-i2c";
 263                 reg = <0x12C80000 0x100>;
 264                 interrupts = <0 58 0>;
 265                 #address-cells = <1>;
 266                 #size-cells = <0>;
 267                 clocks = <&clock 296>;
 268                 clock-names = "i2c";
 269                 pinctrl-names = "default";
 270                 pinctrl-0 = <&i2c2_bus>;
 271         };
 272
 273         i2c_3: i2c@12C90000 {
 274                 compatible = "samsung,s3c2440-i2c";
 275                 reg = <0x12C90000 0x100>;
 276                 interrupts = <0 59 0>;
 277                 #address-cells = <1>;
 278                 #size-cells = <0>;
 279                 clocks = <&clock 297>;
 280                 clock-names = "i2c";
 281                 pinctrl-names = "default";
 282                 pinctrl-0 = <&i2c3_bus>;
 283         };
 284
 285         i2c_4: i2c@12CA0000 {
 286                 compatible = "samsung,s3c2440-i2c";
 287                 reg = <0x12CA0000 0x100>;
 288                 interrupts = <0 60 0>;
 289                 #address-cells = <1>;
 290                 #size-cells = <0>;
 291                 clocks = <&clock 298>;
 292                 clock-names = "i2c";
 293                 pinctrl-names = "default";
 294                 pinctrl-0 = <&i2c4_bus>;
 295         };
 296
 297         i2c_5: i2c@12CB0000 {
 298                 compatible = "samsung,s3c2440-i2c";
 299                 reg = <0x12CB0000 0x100>;
 300                 interrupts = <0 61 0>;
 301                 #address-cells = <1>;
 302                 #size-cells = <0>;
 303                 clocks = <&clock 299>;
 304                 clock-names = "i2c";
 305                 pinctrl-names = "default";
 306                 pinctrl-0 = <&i2c5_bus>;
 307         };
 308
 309         i2c_6: i2c@12CC0000 {
 310                 compatible = "samsung,s3c2440-i2c";
 311                 reg = <0x12CC0000 0x100>;
 312                 interrupts = <0 62 0>;
 313                 #address-cells = <1>;
 314                 #size-cells = <0>;
 315                 clocks = <&clock 300>;
 316                 clock-names = "i2c";
 317                 pinctrl-names = "default";
 318                 pinctrl-0 = <&i2c6_bus>;
 319         };
 320
 321         i2c_7: i2c@12CD0000 {
 322                 compatible = "samsung,s3c2440-i2c";
 323                 reg = <0x12CD0000 0x100>;
 324                 interrupts = <0 63 0>;
 325                 #address-cells = <1>;
 326                 #size-cells = <0>;
 327                 clocks = <&clock 301>;
 328                 clock-names = "i2c";
 329                 pinctrl-names = "default";
 330                 pinctrl-0 = <&i2c7_bus>;
 331         };
 332
 333         i2c_8: i2c@12CE0000 {
 334                 compatible = "samsung,s3c2440-hdmiphy-i2c";
 335                 reg = <0x12CE0000 0x1000>;
 336                 interrupts = <0 64 0>;
 337                 #address-cells = <1>;
 338                 #size-cells = <0>;
 339                 clocks = <&clock 302>;
 340                 clock-names = "i2c";
 341         };
 342
 343         i2c@121D0000 {
 344                 compatible = "samsung,exynos5-sata-phy-i2c";
 345                 reg = <0x121D0000 0x100>;
 346                 #address-cells = <1>;
 347                 #size-cells = <0>;
 348                 clocks = <&clock 288>;
 349                 clock-names = "i2c";
 350         };
 351
 352         spi_0: spi@12d20000 {
 353                 compatible = "samsung,exynos4210-spi";
 354                 status = "disabled";
 355                 reg = <0x12d20000 0x100>;
 356                 interrupts = <0 66 0>;
 357                 dmas = <&pdma0 5
 358                         &pdma0 4>;
 359                 dma-names = "tx", "rx";
 360                 #address-cells = <1>;
 361                 #size-cells = <0>;
 362                 clocks = <&clock 304>, <&clock 154>;
 363                 clock-names = "spi", "spi_busclk0";
 364                 pinctrl-names = "default";
 365                 pinctrl-0 = <&spi0_bus>;
 366         };
 367
 368         spi_1: spi@12d30000 {
 369                 compatible = "samsung,exynos4210-spi";
 370                 status = "disabled";
 371                 reg = <0x12d30000 0x100>;
 372                 interrupts = <0 67 0>;
 373                 dmas = <&pdma1 5
 374                         &pdma1 4>;
 375                 dma-names = "tx", "rx";
 376                 #address-cells = <1>;
 377                 #size-cells = <0>;
 378                 clocks = <&clock 305>, <&clock 155>;
 379                 clock-names = "spi", "spi_busclk0";
 380                 pinctrl-names = "default";
 381                 pinctrl-0 = <&spi1_bus>;
 382         };
 383
 384         spi_2: spi@12d40000 {
 385                 compatible = "samsung,exynos4210-spi";
 386                 status = "disabled";
 387                 reg = <0x12d40000 0x100>;
 388                 interrupts = <0 68 0>;
 389                 dmas = <&pdma0 7
 390                         &pdma0 6>;
 391                 dma-names = "tx", "rx";
 392                 #address-cells = <1>;
 393                 #size-cells = <0>;
 394                 clocks = <&clock 306>, <&clock 156>;
 395                 clock-names = "spi", "spi_busclk0";
 396                 pinctrl-names = "default";
 397                 pinctrl-0 = <&spi2_bus>;
 398         };
 399
 400         mmc_0: mmc@12200000 {
 401                 compatible = "samsung,exynos5250-dw-mshc";
 402                 interrupts = <0 75 0>;
 403                 #address-cells = <1>;
 404                 #size-cells = <0>;
 405                 reg = <0x12200000 0x1000>;
 406                 clocks = <&clock 280>, <&clock 139>;
 407                 clock-names = "biu", "ciu";
 408                 fifo-depth = <0x80>;
 409                 status = "disabled";
 410         };
 411
 412         mmc_1: mmc@12210000 {
 413                 compatible = "samsung,exynos5250-dw-mshc";
 414                 interrupts = <0 76 0>;
 415                 #address-cells = <1>;
 416                 #size-cells = <0>;
 417                 reg = <0x12210000 0x1000>;
 418                 clocks = <&clock 281>, <&clock 140>;
 419                 clock-names = "biu", "ciu";
 420                 fifo-depth = <0x80>;
 421                 status = "disabled";
 422         };
 423
 424         mmc_2: mmc@12220000 {
 425                 compatible = "samsung,exynos5250-dw-mshc";
 426                 interrupts = <0 77 0>;
 427                 #address-cells = <1>;
 428                 #size-cells = <0>;
 429                 reg = <0x12220000 0x1000>;
 430                 clocks = <&clock 282>, <&clock 141>;
 431                 clock-names = "biu", "ciu";
 432                 fifo-depth = <0x80>;
 433                 status = "disabled";
 434         };
 435
 436         mmc_3: mmc@12230000 {
 437                 compatible = "samsung,exynos5250-dw-mshc";
 438                 reg = <0x12230000 0x1000>;
 439                 interrupts = <0 78 0>;
 440                 #address-cells = <1>;
 441                 #size-cells = <0>;
 442                 clocks = <&clock 283>, <&clock 142>;
 443                 clock-names = "biu", "ciu";
 444                 fifo-depth = <0x80>;
 445                 status = "disabled";
 446         };
 447
 448         i2s0: i2s@03830000 {
 449                 compatible = "samsung,s5pv210-i2s";
 450                 status = "disabled";
 451                 reg = <0x03830000 0x100>;
 452                 dmas = <&pdma0 10
 453                         &pdma0 9
 454                         &pdma0 8>;
 455                 dma-names = "tx", "rx", "tx-sec";
 456                 clocks = <&clock_audss EXYNOS_I2S_BUS>,
 457                         <&clock_audss EXYNOS_I2S_BUS>,
 458                         <&clock_audss EXYNOS_SCLK_I2S>;
 459                 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
 460                 samsung,idma-addr = <0x03000000>;
 461                 pinctrl-names = "default";
 462                 pinctrl-0 = <&i2s0_bus>;
 463         };
 464
 465         i2s1: i2s@12D60000 {
 466                 compatible = "samsung,s3c6410-i2s";
 467                 status = "disabled";
 468                 reg = <0x12D60000 0x100>;
 469                 dmas = <&pdma1 12
 470                         &pdma1 11>;
 471                 dma-names = "tx", "rx";
 472                 clocks = <&clock 307>, <&clock 157>;
 473                 clock-names = "iis", "i2s_opclk0";
 474                 pinctrl-names = "default";
 475                 pinctrl-0 = <&i2s1_bus>;
 476         };
 477
 478         i2s2: i2s@12D70000 {
 479                 compatible = "samsung,s3c6410-i2s";
 480                 status = "disabled";
 481                 reg = <0x12D70000 0x100>;
 482                 dmas = <&pdma0 12
 483                         &pdma0 11>;
 484                 dma-names = "tx", "rx";
 485                 clocks = <&clock 308>, <&clock 158>;
 486                 clock-names = "iis", "i2s_opclk0";
 487                 pinctrl-names = "default";
 488                 pinctrl-0 = <&i2s2_bus>;
 489         };
 490
 491         usb@12000000 {
 492                 compatible = "samsung,exynos5250-dwusb3";
 493                 clocks = <&clock 286>;
 494                 clock-names = "usbdrd30";
 495                 #address-cells = <1>;
 496                 #size-cells = <1>;
 497                 ranges;
 498
 499                 dwc3 {
 500                         compatible = "synopsys,dwc3";
 501                         reg = <0x12000000 0x10000>;
 502                         interrupts = <0 72 0>;
 503                         usb-phy = <&usb2_phy &usb3_phy>;
 504                 };
 505         };
 506
 507         usb3_phy: usbphy@12100000 {
 508                 compatible = "samsung,exynos5250-usb3phy";
 509                 reg = <0x12100000 0x100>;
 510                 clocks = <&clock 1>, <&clock 286>;
 511                 clock-names = "ext_xtal", "usbdrd30";
 512                 #address-cells = <1>;
 513                 #size-cells = <1>;
 514                 ranges;
 515
 516                 usbphy-sys {
 517                         reg = <0x10040704 0x8>;
 518                 };
 519         };
 520
 521         usb@12110000 {
 522                 compatible = "samsung,exynos4210-ehci";
 523                 reg = <0x12110000 0x100>;
 524                 interrupts = <0 71 0>;
 525
 526                 clocks = <&clock 285>;
 527                 clock-names = "usbhost";
 528         };
 529
 530         usb@12120000 {
 531                 compatible = "samsung,exynos4210-ohci";
 532                 reg = <0x12120000 0x100>;
 533                 interrupts = <0 71 0>;
 534
 535                 clocks = <&clock 285>;
 536                 clock-names = "usbhost";
 537         };
 538
 539         usb2_phy: usbphy@12130000 {
 540                 compatible = "samsung,exynos5250-usb2phy";
 541                 reg = <0x12130000 0x100>;
 542                 clocks = <&clock 1>, <&clock 285>;
 543                 clock-names = "ext_xtal", "usbhost";
 544                 #address-cells = <1>;
 545                 #size-cells = <1>;
 546                 ranges;
 547
 548                 usbphy-sys {
 549                         reg = <0x10040704 0x8>,
 550                               <0x10050230 0x4>;
 551                 };
 552         };
 553
 554         pwm: pwm@12dd0000 {
 555                 compatible = "samsung,exynos4210-pwm";
 556                 reg = <0x12dd0000 0x100>;
 557                 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 558                 #pwm-cells = <3>;
 559                 clocks = <&clock 311>;
 560                 clock-names = "timers";
 561         };
 562
 563         amba {
 564                 #address-cells = <1>;
 565                 #size-cells = <1>;
 566                 compatible = "arm,amba-bus";
 567                 interrupt-parent = <&gic>;
 568                 ranges;
 569
 570                 pdma0: pdma@121A0000 {
 571                         compatible = "arm,pl330", "arm,primecell";
 572                         reg = <0x121A0000 0x1000>;
 573                         interrupts = <0 34 0>;
 574                         clocks = <&clock 275>;
 575                         clock-names = "apb_pclk";
 576                         #dma-cells = <1>;
 577                         #dma-channels = <8>;
 578                         #dma-requests = <32>;
 579                 };
 580
 581                 pdma1: pdma@121B0000 {
 582                         compatible = "arm,pl330", "arm,primecell";
 583                         reg = <0x121B0000 0x1000>;
 584                         interrupts = <0 35 0>;
 585                         clocks = <&clock 276>;
 586                         clock-names = "apb_pclk";
 587                         #dma-cells = <1>;
 588                         #dma-channels = <8>;
 589                         #dma-requests = <32>;
 590                 };
 591
 592                 mdma0: mdma@10800000 {
 593                         compatible = "arm,pl330", "arm,primecell";
 594                         reg = <0x10800000 0x1000>;
 595                         interrupts = <0 33 0>;
 596                         clocks = <&clock 271>;
 597                         clock-names = "apb_pclk";
 598                         #dma-cells = <1>;
 599                         #dma-channels = <8>;
 600                         #dma-requests = <1>;
 601                 };
 602
 603                 mdma1: mdma@11C10000 {
 604                         compatible = "arm,pl330", "arm,primecell";
 605                         reg = <0x11C10000 0x1000>;
 606                         interrupts = <0 124 0>;
 607                         clocks = <&clock 271>;
 608                         clock-names = "apb_pclk";
 609                         #dma-cells = <1>;
 610                         #dma-channels = <8>;
 611                         #dma-requests = <1>;
 612                 };
 613         };
 614
 615         gsc_0:  gsc@13e00000 {
 616                 compatible = "samsung,exynos5-gsc";
 617                 reg = <0x13e00000 0x1000>;
 618                 interrupts = <0 85 0>;
 619                 samsung,power-domain = <&pd_gsc>;
 620                 clocks = <&clock 256>;
 621                 clock-names = "gscl";
 622         };
 623
 624         gsc_1:  gsc@13e10000 {
 625                 compatible = "samsung,exynos5-gsc";
 626                 reg = <0x13e10000 0x1000>;
 627                 interrupts = <0 86 0>;
 628                 samsung,power-domain = <&pd_gsc>;
 629                 clocks = <&clock 257>;
 630                 clock-names = "gscl";
 631         };
 632
 633         gsc_2:  gsc@13e20000 {
 634                 compatible = "samsung,exynos5-gsc";
 635                 reg = <0x13e20000 0x1000>;
 636                 interrupts = <0 87 0>;
 637                 samsung,power-domain = <&pd_gsc>;
 638                 clocks = <&clock 258>;
 639                 clock-names = "gscl";
 640         };
 641
 642         gsc_3:  gsc@13e30000 {
 643                 compatible = "samsung,exynos5-gsc";
 644                 reg = <0x13e30000 0x1000>;
 645                 interrupts = <0 88 0>;
 646                 samsung,power-domain = <&pd_gsc>;
 647                 clocks = <&clock 259>;
 648                 clock-names = "gscl";
 649         };
 650
 651         hdmi {
 652                 compatible = "samsung,exynos4212-hdmi";
 653                 reg = <0x14530000 0x70000>;
 654                 interrupts = <0 95 0>;
 655                 clocks = <&clock 344>, <&clock 136>, <&clock 137>,
 656                                 <&clock 159>, <&clock 1024>;
 657                 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 658                                 "sclk_hdmiphy", "mout_hdmi";
 659         };
 660
 661         mixer {
 662                 compatible = "samsung,exynos5250-mixer";
 663                 reg = <0x14450000 0x10000>;
 664                 interrupts = <0 94 0>;
 665                 clocks = <&clock 343>, <&clock 136>;
 666                 clock-names = "mixer", "sclk_hdmi";
 667         };
 668
 669         dp_phy: video-phy@10040720 {
 670                 compatible = "samsung,exynos5250-dp-video-phy";
 671                 reg = <0x10040720 4>;
 672                 #phy-cells = <0>;
 673         };
 674
 675         dp-controller@145B0000 {
 676                 clocks = <&clock 342>;
 677                 clock-names = "dp";
 678                 phys = <&dp_phy>;
 679                 phy-names = "dp";
 680         };
 681
 682         fimd@14400000 {
 683                 clocks = <&clock 133>, <&clock 339>;
 684                 clock-names = "sclk_fimd", "fimd";
 685         };
 686
 687         adc: adc@12D10000 {
 688                 compatible = "samsung,exynos-adc-v1";
 689                 reg = <0x12D10000 0x100>, <0x10040718 0x4>;
 690                 interrupts = <0 106 0>;
 691                 clocks = <&clock 303>;
 692                 clock-names = "adc";
 693                 #io-channel-cells = <1>;
 694                 io-channel-ranges;
 695                 status = "disabled";
 696         };
 697 };