Pileus Git - ~andy/linux/blob - arch/arm/boot/dts/at91rm9200.dtsi

   1 /*
   2  * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
   3  *
   4  *  Copyright (C) 2011 Atmel,
   5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
   6  *                2012 Joachim Eastwood <manabian@gmail.com>
   7  *
   8  * Based on at91sam9260.dtsi
   9  *
  10  * Licensed under GPLv2 or later.
  11  */
  12
  13 #include "skeleton.dtsi"
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Atmel AT91RM9200 family SoC";
  20         compatible = "atmel,at91rm9200";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 ssc0 = &ssc0;
  37                 ssc1 = &ssc1;
  38                 ssc2 = &ssc2;
  39         };
  40         cpus {
  41                 #address-cells = <0>;
  42                 #size-cells = <0>;
  43
  44                 cpu {
  45                         compatible = "arm,arm920t";
  46                         device_type = "cpu";
  47                 };
  48         };
  49
  50         memory {
  51                 reg = <0x20000000 0x04000000>;
  52         };
  53
  54         ahb {
  55                 compatible = "simple-bus";
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 ranges;
  59
  60                 apb {
  61                         compatible = "simple-bus";
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         ranges;
  65
  66                         aic: interrupt-controller@fffff000 {
  67                                 #interrupt-cells = <3>;
  68                                 compatible = "atmel,at91rm9200-aic";
  69                                 interrupt-controller;
  70                                 reg = <0xfffff000 0x200>;
  71                                 atmel,external-irqs = <25 26 27 28 29 30 31>;
  72                         };
  73
  74                         ramc0: ramc@ffffff00 {
  75                                 compatible = "atmel,at91rm9200-sdramc";
  76                                 reg = <0xffffff00 0x100>;
  77                         };
  78
  79                         pmc: pmc@fffffc00 {
  80                                 compatible = "atmel,at91rm9200-pmc";
  81                                 reg = <0xfffffc00 0x100>;
  82                         };
  83
  84                         st: timer@fffffd00 {
  85                                 compatible = "atmel,at91rm9200-st";
  86                                 reg = <0xfffffd00 0x100>;
  87                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  88                         };
  89
  90                         tcb0: timer@fffa0000 {
  91                                 compatible = "atmel,at91rm9200-tcb";
  92                                 reg = <0xfffa0000 0x100>;
  93                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
  94                                               18 IRQ_TYPE_LEVEL_HIGH 0
  95                                               19 IRQ_TYPE_LEVEL_HIGH 0>;
  96                         };
  97
  98                         tcb1: timer@fffa4000 {
  99                                 compatible = "atmel,at91rm9200-tcb";
 100                                 reg = <0xfffa4000 0x100>;
 101                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
 102                                               21 IRQ_TYPE_LEVEL_HIGH 0
 103                                               22 IRQ_TYPE_LEVEL_HIGH 0>;
 104                         };
 105
 106                         i2c0: i2c@fffb8000 {
 107                                 compatible = "atmel,at91rm9200-i2c";
 108                                 reg = <0xfffb8000 0x4000>;
 109                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
 110                                 pinctrl-names = "default";
 111                                 pinctrl-0 = <&pinctrl_twi>;
 112                                 #address-cells = <1>;
 113                                 #size-cells = <0>;
 114                                 status = "disabled";
 115                         };
 116
 117                         mmc0: mmc@fffb4000 {
 118                                 compatible = "atmel,hsmci";
 119                                 reg = <0xfffb4000 0x4000>;
 120                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
 121                                 #address-cells = <1>;
 122                                 #size-cells = <0>;
 123                                 status = "disabled";
 124                         };
 125
 126                         ssc0: ssc@fffd0000 {
 127                                 compatible = "atmel,at91rm9200-ssc";
 128                                 reg = <0xfffd0000 0x4000>;
 129                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 130                                 pinctrl-names = "default";
 131                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 132                                 status = "disable";
 133                         };
 134
 135                         ssc1: ssc@fffd4000 {
 136                                 compatible = "atmel,at91rm9200-ssc";
 137                                 reg = <0xfffd4000 0x4000>;
 138                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 139                                 pinctrl-names = "default";
 140                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 141                                 status = "disable";
 142                         };
 143
 144                         ssc2: ssc@fffd8000 {
 145                                 compatible = "atmel,at91rm9200-ssc";
 146                                 reg = <0xfffd8000 0x4000>;
 147                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 148                                 pinctrl-names = "default";
 149                                 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
 150                                 status = "disable";
 151                         };
 152
 153                         macb0: ethernet@fffbc000 {
 154                                 compatible = "cdns,at91rm9200-emac", "cdns,emac";
 155                                 reg = <0xfffbc000 0x4000>;
 156                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 157                                 phy-mode = "rmii";
 158                                 pinctrl-names = "default";
 159                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 160                                 status = "disabled";
 161                         };
 162
 163                         pinctrl@fffff400 {
 164                                 #address-cells = <1>;
 165                                 #size-cells = <1>;
 166                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 167                                 ranges = <0xfffff400 0xfffff400 0x800>;
 168
 169                                 atmel,mux-mask = <
 170                                         /*    A         B     */
 171                                          0xffffffff 0xffffffff  /* pioA */
 172                                          0xffffffff 0x083fffff  /* pioB */
 173                                          0xffff3fff 0x00000000  /* pioC */
 174                                          0x03ff87ff 0x0fffff80  /* pioD */
 175                                         >;
 176
 177                                 /* shared pinctrl settings */
 178                                 dbgu {
 179                                         pinctrl_dbgu: dbgu-0 {
 180                                                 atmel,pins =
 181                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A */
 182                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA31 periph with pullup */
 183                                         };
 184                                 };
 185
 186                                 uart0 {
 187                                         pinctrl_uart0: uart0-0 {
 188                                                 atmel,pins =
 189                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 190                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
 191                                         };
 192
 193                                         pinctrl_uart0_rts: uart0_rts-0 {
 194                                                 atmel,pins =
 195                                                         <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
 196                                         };
 197
 198                                         pinctrl_uart0_cts: uart0_cts-0 {
 199                                                 atmel,pins =
 200                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
 201                                         };
 202                                 };
 203
 204                                 uart1 {
 205                                         pinctrl_uart1: uart1-0 {
 206                                                 atmel,pins =
 207                                                         <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB20 periph A with pullup */
 208                                                          AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
 209                                         };
 210
 211                                         pinctrl_uart1_rts: uart1_rts-0 {
 212                                                 atmel,pins =
 213                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
 214                                         };
 215
 216                                         pinctrl_uart1_cts: uart1_cts-0 {
 217                                                 atmel,pins =
 218                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
 219                                         };
 220
 221                                         pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
 222                                                 atmel,pins =
 223                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB19 periph A */
 224                                                          AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
 225                                         };
 226
 227                                         pinctrl_uart1_dcd: uart1_dcd-0 {
 228                                                 atmel,pins =
 229                                                         <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
 230                                         };
 231
 232                                         pinctrl_uart1_ri: uart1_ri-0 {
 233                                                 atmel,pins =
 234                                                         <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
 235                                         };
 236                                 };
 237
 238                                 uart2 {
 239                                         pinctrl_uart2: uart2-0 {
 240                                                 atmel,pins =
 241                                                         <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA22 periph A */
 242                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
 243                                         };
 244
 245                                         pinctrl_uart2_rts: uart2_rts-0 {
 246                                                 atmel,pins =
 247                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 248                                         };
 249
 250                                         pinctrl_uart2_cts: uart2_cts-0 {
 251                                                 atmel,pins =
 252                                                         <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
 253                                         };
 254                                 };
 255
 256                                 uart3 {
 257                                         pinctrl_uart3: uart3-0 {
 258                                                 atmel,pins =
 259                                                         <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
 260                                                          AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PA6 periph B */
 261                                         };
 262
 263                                         pinctrl_uart3_rts: uart3_rts-0 {
 264                                                 atmel,pins =
 265                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 266                                         };
 267
 268                                         pinctrl_uart3_cts: uart3_cts-0 {
 269                                                 atmel,pins =
 270                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 271                                         };
 272                                 };
 273
 274                                 nand {
 275                                         pinctrl_nand: nand-0 {
 276                                                 atmel,pins =
 277                                                         <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PC2 gpio RDY pin pull_up */
 278                                                          AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;    /* PB1 gpio CD pin pull_up */
 279                                         };
 280                                 };
 281
 282                                 macb {
 283                                         pinctrl_macb_rmii: macb_rmii-0 {
 284                                                 atmel,pins =
 285                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA7 periph A */
 286                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA8 periph A */
 287                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 288                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
 289                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
 290                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 291                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 292                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 293                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 294                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
 295                                         };
 296
 297                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 298                                                 atmel,pins =
 299                                                         <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB12 periph B */
 300                                                          AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB13 periph B */
 301                                                          AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB14 periph B */
 302                                                          AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB15 periph B */
 303                                                          AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB16 periph B */
 304                                                          AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB17 periph B */
 305                                                          AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB18 periph B */
 306                                                          AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
 307                                         };
 308                                 };
 309
 310                                 mmc0 {
 311                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 312                                                 atmel,pins =
 313                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
 314                                         };
 315
 316                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 317                                                 atmel,pins =
 318                                                         <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
 319                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA29 periph A with pullup */
 320                                         };
 321
 322                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 323                                                 atmel,pins =
 324                                                         <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
 325                                                          AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
 326                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PB5 periph B with pullup */
 327                                         };
 328
 329                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 330                                                 atmel,pins =
 331                                                         <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
 332                                                          AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA9 periph B with pullup */
 333                                         };
 334
 335                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 336                                                 atmel,pins =
 337                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA10 periph B with pullup */
 338                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 339                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA12 periph B with pullup */
 340                                         };
 341                                 };
 342
 343                                 ssc0 {
 344                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 345                                                 atmel,pins =
 346                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A */
 347                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A */
 348                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A */
 349                                         };
 350
 351                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 352                                                 atmel,pins =
 353                                                         <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB3 periph A */
 354                                                          AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A */
 355                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
 356                                         };
 357                                 };
 358
 359                                 ssc1 {
 360                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 361                                                 atmel,pins =
 362                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A */
 363                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB7 periph A */
 364                                                          AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
 365                                         };
 366
 367                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 368                                                 atmel,pins =
 369                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A */
 370                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A */
 371                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
 372                                         };
 373                                 };
 374
 375                                 ssc2 {
 376                                         pinctrl_ssc2_tx: ssc2_tx-0 {
 377                                                 atmel,pins =
 378                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A */
 379                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A */
 380                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
 381                                         };
 382
 383                                         pinctrl_ssc2_rx: ssc2_rx-0 {
 384                                                 atmel,pins =
 385                                                         <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A */
 386                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A */
 387                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
 388                                         };
 389                                 };
 390
 391                                 twi {
 392                                         pinctrl_twi: twi-0 {
 393                                                 atmel,pins =
 394                                                         <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE    /* PA25 periph A with multi drive */
 395                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>;  /* PA26 periph A with multi drive */
 396                                         };
 397
 398                                         pinctrl_twi_gpio: twi_gpio-0 {
 399                                                 atmel,pins =
 400                                                         <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
 401                                                          AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA26 GPIO with multi drive */
 402                                         };
 403                                 };
 404
 405                                 tcb0 {
 406                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 407                                                 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 408                                         };
 409
 410                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 411                                                 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 412                                         };
 413
 414                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 415                                                 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 416                                         };
 417
 418                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 419                                                 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 420                                         };
 421
 422                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 423                                                 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 424                                         };
 425
 426                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 427                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 428                                         };
 429
 430                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 431                                                 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 432                                         };
 433
 434                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 435                                                 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 436                                         };
 437
 438                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 439                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 440                                         };
 441                                 };
 442
 443                                 tcb1 {
 444                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 445                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 446                                         };
 447
 448                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 449                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 450                                         };
 451
 452                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 453                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 454                                         };
 455
 456                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 457                                                 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 458                                         };
 459
 460                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 461                                                 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 462                                         };
 463
 464                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 465                                                 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 466                                         };
 467
 468                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 469                                                 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 470                                         };
 471
 472                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 473                                                 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 474                                         };
 475
 476                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 477                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 478                                         };
 479                                 };
 480
 481                                 spi0 {
 482                                         pinctrl_spi0: spi0-0 {
 483                                                 atmel,pins =
 484                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
 485                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
 486                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
 487                                         };
 488                                 };
 489
 490                                 pioA: gpio@fffff400 {
 491                                         compatible = "atmel,at91rm9200-gpio";
 492                                         reg = <0xfffff400 0x200>;
 493                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 494                                         #gpio-cells = <2>;
 495                                         gpio-controller;
 496                                         interrupt-controller;
 497                                         #interrupt-cells = <2>;
 498                                 };
 499
 500                                 pioB: gpio@fffff600 {
 501                                         compatible = "atmel,at91rm9200-gpio";
 502                                         reg = <0xfffff600 0x200>;
 503                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 504                                         #gpio-cells = <2>;
 505                                         gpio-controller;
 506                                         interrupt-controller;
 507                                         #interrupt-cells = <2>;
 508                                 };
 509
 510                                 pioC: gpio@fffff800 {
 511                                         compatible = "atmel,at91rm9200-gpio";
 512                                         reg = <0xfffff800 0x200>;
 513                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 514                                         #gpio-cells = <2>;
 515                                         gpio-controller;
 516                                         interrupt-controller;
 517                                         #interrupt-cells = <2>;
 518                                 };
 519
 520                                 pioD: gpio@fffffa00 {
 521                                         compatible = "atmel,at91rm9200-gpio";
 522                                         reg = <0xfffffa00 0x200>;
 523                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 524                                         #gpio-cells = <2>;
 525                                         gpio-controller;
 526                                         interrupt-controller;
 527                                         #interrupt-cells = <2>;
 528                                 };
 529                         };
 530
 531                         dbgu: serial@fffff200 {
 532                                 compatible = "atmel,at91rm9200-usart";
 533                                 reg = <0xfffff200 0x200>;
 534                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 535                                 pinctrl-names = "default";
 536                                 pinctrl-0 = <&pinctrl_dbgu>;
 537                                 status = "disabled";
 538                         };
 539
 540                         usart0: serial@fffc0000 {
 541                                 compatible = "atmel,at91rm9200-usart";
 542                                 reg = <0xfffc0000 0x200>;
 543                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 544                                 atmel,use-dma-rx;
 545                                 atmel,use-dma-tx;
 546                                 pinctrl-names = "default";
 547                                 pinctrl-0 = <&pinctrl_uart0>;
 548                                 status = "disabled";
 549                         };
 550
 551                         usart1: serial@fffc4000 {
 552                                 compatible = "atmel,at91rm9200-usart";
 553                                 reg = <0xfffc4000 0x200>;
 554                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 555                                 atmel,use-dma-rx;
 556                                 atmel,use-dma-tx;
 557                                 pinctrl-names = "default";
 558                                 pinctrl-0 = <&pinctrl_uart1>;
 559                                 status = "disabled";
 560                         };
 561
 562                         usart2: serial@fffc8000 {
 563                                 compatible = "atmel,at91rm9200-usart";
 564                                 reg = <0xfffc8000 0x200>;
 565                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 566                                 atmel,use-dma-rx;
 567                                 atmel,use-dma-tx;
 568                                 pinctrl-names = "default";
 569                                 pinctrl-0 = <&pinctrl_uart2>;
 570                                 status = "disabled";
 571                         };
 572
 573                         usart3: serial@fffcc000 {
 574                                 compatible = "atmel,at91rm9200-usart";
 575                                 reg = <0xfffcc000 0x200>;
 576                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 577                                 atmel,use-dma-rx;
 578                                 atmel,use-dma-tx;
 579                                 pinctrl-names = "default";
 580                                 pinctrl-0 = <&pinctrl_uart3>;
 581                                 status = "disabled";
 582                         };
 583
 584                         usb1: gadget@fffb0000 {
 585                                 compatible = "atmel,at91rm9200-udc";
 586                                 reg = <0xfffb0000 0x4000>;
 587                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
 588                                 status = "disabled";
 589                         };
 590
 591                         spi0: spi@fffe0000 {
 592                                 #address-cells = <1>;
 593                                 #size-cells = <0>;
 594                                 compatible = "atmel,at91rm9200-spi";
 595                                 reg = <0xfffe0000 0x200>;
 596                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 597                                 pinctrl-names = "default";
 598                                 pinctrl-0 = <&pinctrl_spi0>;
 599                                 status = "disabled";
 600                         };
 601                 };
 602
 603                 nand0: nand@40000000 {
 604                         compatible = "atmel,at91rm9200-nand";
 605                         #address-cells = <1>;
 606                         #size-cells = <1>;
 607                         reg = <0x40000000 0x10000000>;
 608                         atmel,nand-addr-offset = <21>;
 609                         atmel,nand-cmd-offset = <22>;
 610                         pinctrl-names = "default";
 611                         pinctrl-0 = <&pinctrl_nand>;
 612                         nand-ecc-mode = "soft";
 613                         gpios = <&pioC 2 GPIO_ACTIVE_HIGH
 614                                  0
 615                                  &pioB 1 GPIO_ACTIVE_HIGH
 616                                 >;
 617                         status = "disabled";
 618                 };
 619
 620                 usb0: ohci@00300000 {
 621                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 622                         reg = <0x00300000 0x100000>;
 623                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
 624                         status = "disabled";
 625                 };
 626         };
 627
 628         i2c@0 {
 629                 compatible = "i2c-gpio";
 630                 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
 631                          &pioA 26 GPIO_ACTIVE_HIGH /* scl */
 632                         >;
 633                 i2c-gpio,sda-open-drain;
 634                 i2c-gpio,scl-open-drain;
 635                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 636                 pinctrl-names = "default";
 637                 pinctrl-0 = <&pinctrl_twi_gpio>;
 638                 #address-cells = <1>;
 639                 #size-cells = <0>;
 640                 status = "disabled";
 641         };
 642 };