1 Allwinner SoCs High Speed Timer Controller
5 - compatible : should be "allwinner,sun5i-a13-hstimer" or
6 "allwinner,sun7i-a20-hstimer"
7 - reg : Specifies base physical address and size of the registers.
8 - interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
10 - clocks: phandle to the source clock (usually the AHB clock)
15 compatible = "allwinner,sun7i-a20-hstimer";
16 reg = <0x01c60000 0x1000>;
17 interrupts = <0 51 1>,
21 clocks = <&ahb1_gates 19>;