1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
4 controller. It controls the input/output settings on the available pads/pins
5 and also provides ability to multiplex and configure the output of various
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller.
11 - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller.
12 - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller.
14 - reg: Base address of the pin controller hardware module and length of
15 the address space it occupies.
17 - Pin banks as child nodes: Pin banks of the controller are represented by child
18 nodes of the controller node. Bank name is taken from name of the node. Each
19 bank node must contain following properties:
21 - gpio-controller: identifies the node as a gpio controller and pin bank.
22 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
23 binding is used, the amount of cells must be specified as 2. See generic
24 GPIO binding documentation for description of particular cells.
26 - Pin mux/config groups as child nodes: The pin mux (selecting pin function
27 mode) and pin config (pull up/down, driver strength) settings are represented
28 as child nodes of the pin-controller node. There should be atleast one
29 child node and there is no limit on the count of these child nodes.
31 The child node should contain a list of pin(s) on which a particular pin
32 function selection or pin configuration (or both) have to applied. This
33 list of pins is specified using the property name "samsung,pins". There
34 should be atleast one pin specfied for this property and there is no upper
35 limit on the count of pins that can be specified. The pins are specified
36 using pin names which are derived from the hardware manual of the SoC. As
37 an example, the pins in GPA0 bank of the pin controller can be represented
38 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
39 The format of the pin names should be (as per the hardware manual)
40 "[pin bank name]-[pin number within the bank]".
42 The pin function selection that should be applied on the pins listed in the
43 child node is specified using the "samsung,pin-function" property. The value
44 of this property that should be applied to each of the pins listed in the
45 "samsung,pins" property should be picked from the hardware manual of the SoC
46 for the specified pin group. This property is optional in the child node if
47 no specific function selection is desired for the pins listed in the child
48 node. The value of this property is used as-is to program the pin-controller
49 function selector register of the pin-bank.
51 The child node can also optionally specify one or more of the pin
52 configuration that should be applied on all the pins listed in the
53 "samsung,pins" property of the child node. The following pin configuration
54 properties are supported.
56 - samsung,pin-pud: Pull up/down configuration.
57 - samsung,pin-drv: Drive strength configuration.
58 - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
59 - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
61 The values specified by these config properties should be derived from the
62 hardware manual and these values are programmed as-is into the pin
63 pull up/down and driver strength register of the pin-controller.
65 Note: A child should include atleast a pin function selection property or
66 pin configuration property (one or more) or both.
68 The client nodes that require a particular pin function selection and/or
69 pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
72 External GPIO and Wakeup Interrupts:
74 The controller supports two types of external interrupts over gpio. The first
75 is the external gpio interrupt and second is the external wakeup interrupts.
76 The difference between the two is that the external wakeup interrupts can be
77 used as system wakeup events.
79 A. External GPIO Interrupts: For supporting external gpio interrupts, the
80 following properties should be specified in the pin-controller device node.
82 - interrupt-parent: phandle of the interrupt parent to which the external
83 GPIO interrupts are forwarded to.
84 - interrupts: interrupt specifier for the controller. The format and value of
85 the interrupt specifier depends on the interrupt parent for the controller.
87 In addition, following properties must be present in node of every bank
88 of pins supporting GPIO interrupts:
90 - interrupt-controller: identifies the controller node as interrupt-parent.
91 - #interrupt-cells: the value of this property should be 2.
92 - First Cell: represents the external gpio interrupt number local to the
93 external gpio interrupt space of the controller.
94 - Second Cell: flags to identify the type of the interrupt
95 - 1 = rising edge triggered
96 - 2 = falling edge triggered
97 - 3 = rising and falling edge triggered
98 - 4 = high level triggered
99 - 8 = low level triggered
101 B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
102 child node representing the external wakeup interrupt controller should be
103 included in the pin-controller device node. This child node should include
104 the following properties.
106 - compatible: identifies the type of the external wakeup interrupt controller
107 The possible values are:
108 - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
109 found on Samsung Exynos4210 SoC.
110 - interrupt-parent: phandle of the interrupt parent to which the external
111 wakeup interrupts are forwarded to.
112 - interrupts: interrupt used by multiplexed wakeup interrupts.
114 In addition, following properties must be present in node of every bank
115 of pins supporting wake-up interrupts:
117 - interrupt-controller: identifies the node as interrupt-parent.
118 - #interrupt-cells: the value of this property should be 2
119 - First Cell: represents the external wakeup interrupt number local to
120 the external wakeup interrupt space of the controller.
121 - Second Cell: flags to identify the type of the interrupt
122 - 1 = rising edge triggered
123 - 2 = falling edge triggered
124 - 3 = rising and falling edge triggered
125 - 4 = high level triggered
126 - 8 = low level triggered
128 Node of every bank of pins supporting direct wake-up interrupts (without
129 multiplexing) must contain following properties:
131 - interrupt-parent: phandle of the interrupt parent to which the external
132 wakeup interrupts are forwarded to.
133 - interrupts: interrupts of the interrupt parent which are used for external
134 wakeup interrupts from pins of the bank, must contain interrupts for all
139 All the pin controller nodes should be represented in the aliases node using
140 the following format 'pinctrl{n}' where n is a unique number for the alias.
142 Example: A pin-controller node with pin banks:
144 pinctrl_0: pinctrl@11400000 {
145 compatible = "samsung,pinctrl-exynos4210";
146 reg = <0x11400000 0x1000>;
147 interrupts = <0 47 0>;
151 /* Pin bank without external interrupts */
159 /* Pin bank with external GPIO or muxed wake-up interrupts */
164 interrupt-controller;
165 #interrupt-cells = <2>;
170 /* Pin bank with external direct wake-up interrupts */
175 interrupt-controller;
176 interrupt-parent = <&gic>;
177 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
178 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
179 #interrupt-cells = <2>;
185 Example 1: A pin-controller node with pin groups.
187 pinctrl_0: pinctrl@11400000 {
188 compatible = "samsung,pinctrl-exynos4210";
189 reg = <0x11400000 0x1000>;
190 interrupts = <0 47 0>;
194 uart0_data: uart0-data {
195 samsung,pins = "gpa0-0", "gpa0-1";
196 samsung,pin-function = <2>;
197 samsung,pin-pud = <0>;
198 samsung,pin-drv = <0>;
201 uart0_fctl: uart0-fctl {
202 samsung,pins = "gpa0-2", "gpa0-3";
203 samsung,pin-function = <2>;
204 samsung,pin-pud = <0>;
205 samsung,pin-drv = <0>;
208 uart1_data: uart1-data {
209 samsung,pins = "gpa0-4", "gpa0-5";
210 samsung,pin-function = <2>;
211 samsung,pin-pud = <0>;
212 samsung,pin-drv = <0>;
215 uart1_fctl: uart1-fctl {
216 samsung,pins = "gpa0-6", "gpa0-7";
217 samsung,pin-function = <2>;
218 samsung,pin-pud = <0>;
219 samsung,pin-drv = <0>;
223 samsung,pins = "gpa0-6", "gpa0-7";
224 samsung,pin-function = <3>;
225 samsung,pin-pud = <3>;
226 samsung,pin-drv = <0>;
230 Example 2: A pin-controller node with external wakeup interrupt controller node.
232 pinctrl_1: pinctrl@11000000 {
233 compatible = "samsung,pinctrl-exynos4210";
234 reg = <0x11000000 0x1000>;
235 interrupts = <0 46 0>
239 wakeup-interrupt-controller {
240 compatible = "samsung,exynos4210-wakeup-eint";
241 interrupt-parent = <&gic>;
242 interrupts = <0 32 0>;
246 Example 3: A uart client node that supports 'default' and 'flow-control' states.
249 compatible = "samsung,exynos4210-uart";
250 reg = <0x13800000 0x100>;
251 interrupts = <0 52 0>;
252 pinctrl-names = "default", "flow-control;
253 pinctrl-0 = <&uart0_data>;
254 pinctrl-1 = <&uart0_data &uart0_fctl>;
257 Example 4: Set up the default pin state for uart controller.
259 static int s3c24xx_serial_probe(struct platform_device *pdev) {
260 struct pinctrl *pinctrl;
264 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);